CN202679734U - Integrated dimming control circuit - Google Patents
Integrated dimming control circuit Download PDFInfo
- Publication number
- CN202679734U CN202679734U CN2012202851226U CN201220285122U CN202679734U CN 202679734 U CN202679734 U CN 202679734U CN 2012202851226 U CN2012202851226 U CN 2012202851226U CN 201220285122 U CN201220285122 U CN 201220285122U CN 202679734 U CN202679734 U CN 202679734U
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- Prior art keywords
- control circuit
- signal
- adjusting control
- dim
- integrated adjusting
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
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Abstract
The utility model provides an integrated dimming control circuit, which is externally connected with a power converter and a load. A gate signal generation unit is used for receiving a pulse width modulation signal and generating a gate signal according to the pulse width modulation signal. A dimming signal generation unit is used for receiving an original dimming signal and generating a plurality of dimming signals and a predetermined clock pulse according to a capacitance resistance time constant determined by the external resistor and the external capacitor and the original dimming signal. The dimming signal generation unit can be used to determine a phase difference between each two adjacent dimming signals according to the capacitance resistance time constant. A user can adjust the resistance value of the external resistor and the capacitance value of the external capacitor to adjust the phase difference between each two adjacent dimming signals, therefore the dimming procedure can be greatly simplified.
Description
Technical field
The utility model relates to a kind of adjusting control circuit, and especially a kind of capacity resistance cime constant and original dim signal that can determine according to outer meeting resistance and external capacitor produces the integrated adjusting control circuit of a plurality of dim signals.
Background technology
Please refer to Fig. 1, Fig. 1 is the schematic diagram of a kind of adjusting control circuit 100 in the prior art.As shown in Figure 1, adjusting control circuit 100 comprises microprocessor 102 and light modulation boost pressure controller 104.Microprocessor 102 is to receive original pulse width modulation signal OPWM, and according to original pulse width modulation signal OPWM, produce a plurality of pulse width modulation signal PWM1-PWMn, wherein n is determined by the load number that is coupled to light modulation boost pressure controller 104, and has phase difference between every adjacent two pulse width modulation signals.Light modulation boost pressure controller 104 is coupled to microprocessor 102, in order to producing gate signal GS, and in order to according to a plurality of pulse width modulation signal PWM1-PWMn, produces a plurality of dim signal DS1-DSn.As shown in Figure 1, gate signal GS is the open and close in order to the primary side switch 1202 of power ratio control transducer 120, with the purpose that realizes boosting; A plurality of dim signal DS1-DSn are average currents of the load L1-Ln of the secondary side that is coupled to power converter 120 in order to flow through by switch S 1-Sn control, to realize the purpose of light modulation.
Yet, if when the user wanted to adjust phase difference between every adjacent two pulse width modulation signals, the user must again write firmware program and be burned onto microprocessor 102.Then, microprocessor 102 is adjusted the whenever phase difference between adjacent two pulse width modulation signals according to firmware program.Therefore, for the user, adjusting control circuit 100 is not a very convenient and practical adjusting control circuit.
The utility model content
In order to change the loaded down with trivial details step of light modulation in the prior art, constantly simplify control method, so that the user can more convenient, simply finish the light modulation to load, so the utility model proposes a kind of integrated adjusting control circuit.
The utility model provides a kind of integrated adjusting control circuit, is circumscribed with power converter and load, and it comprises: gate signal generation unit in order to received pulse width modulation signal, and according to this pulse width modulation signal, produces a gate signal; The dim signal generation unit, in order to receive original dim signal, and capacity resistance cime constant and this original dim signal of determining according to outer meeting resistance and external capacitor, produce a plurality of dim signals and a predetermined clock pulse, wherein this dim signal generation unit is according to this capacity resistance cime constant, determines the phase difference between every adjacent two dim signals.
This gate signal is the open and close of controlling the primary side switch of this power converter in described integrated adjusting control circuit.
In described integrated adjusting control circuit, also comprise the overcurrent protection unit; when the electric current of the primary side switch of this power converter of flowing through during greater than a predetermined current value; this overcurrent protection unit then produces the overcurrent protection signal, so that this primary side switch is closed.
In described integrated adjusting control circuit, also comprise overvoltage protective unit; when the output voltage of the secondary side of this power converter during greater than a predeterminated voltage value; this overvoltage protective unit then produces the overvoltage protection signal, so that the primary side switch of this power converter is closed.
In described integrated adjusting control circuit, also comprise the over-temperature protection unit; when the temperature of this load that is coupled to this power converter secondary side during greater than a preset temperature value; this over-temperature protection unit produces the over-temperature protection signal, so that the primary side switch of this power converter is closed.
This predetermined clock pulse is followed in the integrated adjusting control circuit in order to input to one in described integrated adjusting control circuit, follows the original dim signal of integrated adjusting control circuit as this.
This dim signal generation unit comprises the logic lock in described integrated adjusting control circuit, in order to according to this original dim signal and this capacity resistance cime constant, produces according to the order of sequence these a plurality of dim signals.
When work period of these a plurality of dim signals during less than a preset critical, this logic lock is deenergized and these a plurality of dim signals carry out signal and upgrade synchronously in described integrated adjusting control circuit.
These a plurality of dim signals are in order to the flow through average current of load of the secondary side that is coupled to this power converter of control in described integrated adjusting control circuit.
In described integrated adjusting control circuit, also comprise the current boost unit, in order to receiving a current boost signal, and according to this current boost signal, the work period of these a plurality of dim signals of convergent-divergent.
Compared with prior art, when utilizing integrated adjusting control circuit provided by the utility model to adjust phase difference between every adjacent two pulse width modulation signals, the user only needs to adjust the resistance value of outer meeting resistance and the capacitance of external capacitor, can control the phase difference between every adjacent two dim signals, and do not need again to write the firmware program that drives microprocessor, so just greatly simplified the light modulation step.
Description of drawings
Fig. 1 is the schematic diagram of a kind of adjusting control circuit in the prior art.
Fig. 2 is the application schematic diagram of integrated adjusting control circuit among the utility model one embodiment.
Embodiment
For making the purpose of this utility model, structure, feature and function thereof there are further understanding, hereby cooperate embodiment to be described in detail as follows.
Please refer to Fig. 2, Fig. 2 is the application schematic diagram of integrated adjusting control circuit 200 among the utility model one embodiment.As shown in Figure 2, integrated adjusting control circuit 200 comprises gate signal generation unit 202, dim signal generation unit 204 and current boost unit 206.Gate signal generation unit 202 is in order to received pulse width modulation signal PWM, and according to pulse width modulation signal PWM, produces gate signal GS; Dim signal generation unit 204 is to receive original dim signal ODS, and the capacity resistance cime constant (RCTC) and the original dim signal ODS that determine according to outer meeting resistance R and external capacitor C, produce a plurality of dim signals (for example 4 dim signal DS1-DS4) and predetermined clock pulse CLK, wherein dim signal generation unit 204 is according to capacity resistance cime constant (RCTC), determines the phase difference (for example 90 °) between every adjacent two dim signals.But the utility model is not limited to dim signal generation unit 204 according to capacity resistance cime constant (RCTC) and original dim signal ODS, produces 4 dim signal DS1-DS4.Current boost unit 206 is to promote signal CBS in order to received current, and according to current boost signal CBS, the work period of 4 dim signal DS1-DS4 of convergent-divergent.
As shown in Figure 2, gate signal GS is the open and close in order to the primary side switch 2202 of power ratio control transducer 220, becomes output voltage VO UT thereby input voltage VIN boosted.Dim signal generation unit 204 comprises logic lock 2042.Logic lock 2042 is in order to according to original dim signal ODS and capacity resistance cime constant (RCTC), sequentially produce 4 dim signal DS1-DS4, be that logic lock 2042 is first according to original dim signal ODS and capacity resistance cime constant (RCTC), produce dim signal DS1; Then according to dim signal DS1 and capacity resistance cime constant (RCTC), produce dim signal DS2; Then according to dim signal DS2 and capacity resistance cime constant (RCTC), produce dim signal DS3; According to dim signal DS3 and capacity resistance cime constant (RCTC), produce dim signal DS4 at last.Because dim signal generation unit 204 is to decide the whenever phase difference between adjacent two dim signals according to capacity resistance cime constant (RCTC), so when the user wanted to change capacity resistance cime constant (RCTC), the user only needs to change the resistance value of outer meeting resistance R and the capacitance of external capacitor C gets final product.In addition, predetermined clock pulse CLK is used as to input to the original dim signal of following (slave) integrated adjusting control circuit 240.Therefore, follow integrated adjusting control circuit 240 and can according to predetermined clock pulse CLK, produce 4 new dim signals and a new predetermined clock pulse.So, the user can according to number of loads (for example string number of light-emittingdiode), determine to follow the number of integrated adjusting control circuit.But it is the light-emittingdiode string that the utility model is not limited to load.
As shown in Figure 2,4 dim signal DS1-DS4 are respectively by the flow through average current (average current of load is the work period that is proportional to dim signal because flow through) of load (for example 4 light-emittingdiode string LD1-LD4) of the secondary side that is coupled to power converter 220 of switch S 1-S4 control.So, 4 light-emittingdiode string LD1-LD4 can be luminous according to corresponding average current.In another embodiment of the present utility model, switch S 1-S4 is incorporated in the integrated adjusting control circuit 200.Current boost unit 206 in the integrated adjusting control circuit 200 can be according to current boost signal CBS, the work period of 4 dim signal DS1-DS4 of convergent-divergent.Be that current boost unit 206 can be according to current boost signal CBS, the work period of 4 dim signal DS1-DS4 of convergent-divergent, with adjustment flow through the secondary side that is coupled to power converter 220 load (4 light-emittingdiode string LD1-LD4) average current and avoid 4 light-emittingdiode string LD1-LD4 to burn.Yet, when current boost unit 206 according to current boost signal CBS, during work period of 4 dim signal DS1-DS4 of convergent-divergent, if the work period of 4 dim signal DS1-DS4 is less than preset critical, then logic lock 2042 is deenergized and 4 dim signal DS1-DS4 carry out signal and upgrade synchronously.Namely when work period of 4 dim signal DS1-DS4 during less than preset critical, because logic lock 2042 is deenergized, so 4 light-emittingdiode string LD1-LD4 can open or close simultaneously simultaneously according to 4 synchronous dim signal DS1-DS4.
As shown in Figure 2, integrated adjusting control circuit 200 comprises overcurrent protection unit 208 in addition.The electric current I F of primary side switch 2202 is flowed through greater than predetermined current value in order to judgement in overcurrent protection unit 208 whether, if the signal OCPS that then produces an overcurrent protection greater than this predetermined current value is to gate signal generation unit 202.Then, the gate signal generation unit 202 gate signal GS that can deenergize, thus realize overcurrent protections to close primary side switch 2202.As shown in Figure 2, integrated adjusting control circuit 200 comprises overvoltage protective unit 210 in addition.Overvoltage protective unit in order to the dividing potential drop VD of the output voltage VO UT of the secondary side of judging power converter 220 whether greater than scheduled voltage, if the signal OVPS that then produces an overvoltage protection greater than this scheduled voltage is to gate signal generation unit 202.Then, the gate signal generation unit 202 gate signal GS that can deenergize, thus realize overvoltage protections to close primary side switch 2202.As shown in Figure 2, integrated adjusting control circuit 200 comprises over-temperature protection unit 212 in addition.Whether over-temperature protection unit 212 is coupled to the temperature of 4 light-emittingdiode string LD1-LD4 of secondary side of power converter 220 greater than a predetermined temperature value in order to judgement, if the signal OTPS that then produces an over-temperature protection greater than this predetermined temperature value is to gate signal generation unit 202.Then, the gate signal generation unit 202 gate signal GS that can deenergize, thus realize over-temperature protections to close primary side switch 2202.
In sum, integrated adjusting control circuit provided by the utility model is capacity resistance cime constant and the original dim signal that determines according to outer meeting resistance and external capacitor, produce a plurality of dim signals and predetermined clock pulse, and according to the current boost signal, the work period of a plurality of dim signals of convergent-divergent.Because integrated adjusting control circuit is to decide the whenever phase difference between adjacent two dim signals according to capacity resistance cime constant, so the user only needs to adjust the resistance value of outer meeting resistance and the capacitance of external capacitor, can control the phase difference between every adjacent two dim signals, and not need again to write the firmware program that drives microprocessor.In addition, integrated adjusting control circuit can be according to the current boost signal, the work period of a plurality of dim signals of convergent-divergent, burns with the load of the secondary side of avoiding being coupled to power converter.Therefore, compared to prior art, integrated adjusting control circuit provided by the utility model is not only convenient, practical, and has lower cost.
The utility model is described by above-mentioned related embodiment, yet above-described embodiment is only for implementing example of the present utility model.Must be pointed out that the embodiment that has disclosed does not limit scope of the present utility model.On the contrary, the change of doing within not breaking away from spirit and scope of the present utility model and retouching all belong to scope of patent protection of the present utility model.
Claims (10)
1. an integrated adjusting control circuit is circumscribed with power converter and load, it is characterized in that comprising: gate signal generation unit in order to received pulse width modulation signal, and according to this pulse width modulation signal, produces a gate signal;
The dim signal generation unit, in order to receive original dim signal, and capacity resistance cime constant and this original dim signal of determining according to outer meeting resistance and external capacitor, produce a plurality of dim signals and a predetermined clock pulse, wherein this dim signal generation unit is according to this capacity resistance cime constant, determines the phase difference between every adjacent two dim signals.
2. integrated adjusting control circuit as claimed in claim 1 is characterized in that this gate signal is the open and close of controlling the primary side switch of this power converter.
3. integrated adjusting control circuit as claimed in claim 1; it is characterized in that also comprising the overcurrent protection unit; when the electric current of the primary side switch of this power converter of flowing through during greater than a predetermined current value; this overcurrent protection unit then produces the overcurrent protection signal, so that this primary side switch is closed.
4. integrated adjusting control circuit as claimed in claim 1; it is characterized in that also comprising overvoltage protective unit; when the output voltage of the secondary side of this power converter during greater than a predeterminated voltage value; this overvoltage protective unit then produces the overvoltage protection signal, so that the primary side switch of this power converter is closed.
5. integrated adjusting control circuit as claimed in claim 1; it is characterized in that also comprising the over-temperature protection unit; when the temperature of this load that is coupled to this power converter secondary side during greater than a preset temperature value; this over-temperature protection unit produces the over-temperature protection signal, so that the primary side switch of this power converter is closed.
6. integrated adjusting control circuit as claimed in claim 1, it is characterized in that being external to one and follow integrated adjusting control circuit, this predetermined clock pulse is followed in the integrated adjusting control circuit in order to input to this, follows the original dim signal of integrated adjusting control circuit as this.
7. integrated adjusting control circuit as claimed in claim 1 is characterized in that this dim signal generation unit comprises the logic lock, in order to according to this original dim signal and this capacity resistance cime constant, produces according to the order of sequence these a plurality of dim signals.
8. integrated adjusting control circuit as claimed in claim 7, when it is characterized in that work period when these a plurality of dim signals is less than a preset critical, this logic lock is deenergized and these a plurality of dim signals carry out signal and upgrade synchronously.
9. integrated adjusting control circuit as claimed in claim 1 is characterized in that these a plurality of dim signals are in order to the flow through average current of load of the secondary side that is coupled to this power converter of control.
10. integrated adjusting control circuit as claimed in claim 1 is characterized in that also comprising the current boost unit, in order to receiving a current boost signal, and according to this current boost signal, the work period of these a plurality of dim signals of convergent-divergent.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101118703A TW201349932A (en) | 2012-05-25 | 2012-05-25 | Integrated dimming control circuit |
| CN2012101989464A CN102752920A (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
| CN2012202851226U CN202679734U (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101118703A TW201349932A (en) | 2012-05-25 | 2012-05-25 | Integrated dimming control circuit |
| CN2012101989464A CN102752920A (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
| CN2012202851226U CN202679734U (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202679734U true CN202679734U (en) | 2013-01-16 |
Family
ID=55079904
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012101989464A Pending CN102752920A (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
| CN2012202851226U Expired - Fee Related CN202679734U (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012101989464A Pending CN102752920A (en) | 2012-05-25 | 2012-06-15 | Integrated dimming control circuit |
Country Status (2)
| Country | Link |
|---|---|
| CN (2) | CN102752920A (en) |
| TW (1) | TW201349932A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102752920A (en) * | 2012-05-25 | 2012-10-24 | 苏州达方电子有限公司 | Integrated dimming control circuit |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI352949B (en) * | 2006-11-01 | 2011-11-21 | Chunghwa Picture Tubes Ltd | Light source driving circuit |
| JP5256943B2 (en) * | 2008-09-01 | 2013-08-07 | サンケン電気株式会社 | LED lighting device |
| TWI420965B (en) * | 2009-05-26 | 2013-12-21 | Richtek Technology Corp | Led controller with phase-shift dimming function and led phase-shift dimming circuit and method thereof |
| CN102076146B (en) * | 2009-11-25 | 2014-04-16 | 立锜科技股份有限公司 | Digital dimming device and digital dimming method |
| CN201904951U (en) * | 2010-12-09 | 2011-07-20 | 中山品上照明有限公司 | LED intelligent control drive power supply based on digital processing unit |
| TW201349932A (en) * | 2012-05-25 | 2013-12-01 | Darfon Electronics Corp | Integrated dimming control circuit |
-
2012
- 2012-05-25 TW TW101118703A patent/TW201349932A/en unknown
- 2012-06-15 CN CN2012101989464A patent/CN102752920A/en active Pending
- 2012-06-15 CN CN2012202851226U patent/CN202679734U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102752920A (en) * | 2012-05-25 | 2012-10-24 | 苏州达方电子有限公司 | Integrated dimming control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102752920A (en) | 2012-10-24 |
| TW201349932A (en) | 2013-12-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130116 Termination date: 20160615 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |