CN202654128U - EIT (Electrical Impedance Tomography) experimental resistance board simulation device - Google Patents

EIT (Electrical Impedance Tomography) experimental resistance board simulation device Download PDF

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Publication number
CN202654128U
CN202654128U CN 201220269662 CN201220269662U CN202654128U CN 202654128 U CN202654128 U CN 202654128U CN 201220269662 CN201220269662 CN 201220269662 CN 201220269662 U CN201220269662 U CN 201220269662U CN 202654128 U CN202654128 U CN 202654128U
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China
Prior art keywords
resistance
model
eit
experimental
network model
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Expired - Lifetime
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CN 201220269662
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Chinese (zh)
Inventor
费智胜
吴梓敬
徐现红
余华章
蒲洋
戴涛
卜力宁
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SILAN TECHNOLOGY (CHENGDU) Co Ltd
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SILAN TECHNOLOGY (CHENGDU) Co Ltd
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Priority to CN 201220269662 priority Critical patent/CN202654128U/en
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Abstract

The utility model discloses an EIT (Electrical Impedance Tomography) experimental resistance board simulation device, which is used for solving the problems of the influence of the external environment on an experimental device for simulating human bodies and non-ideal experimental environment in the prior art. The EIT experimental resistance board simulation device comprises a resistance board, a resistance network model and an impedance model, wherein the resistance network model is arranged on a circuit board; the impedance model is electrically connected with the resistance network model; the resistance network model comprises a resistance network provided with at least two contact points, a resistor or a control switch arranged between adjacent contact points, and a lead-out port formed on each contact point and used for realizing connection with the impedance model; and the resistance network model is electrically connected with the impedance model through the lead-out port. The EIT experimental resistance board simulation device is convenient to operate, and is simple in structure; and moreover, the influence of the external environment is eliminated, and the experimental environment is more ideal.

Description

EIT experiment resistance board analog
Technical field
This utility model belongs to the biomedical measurement field, is specifically related to EIT experiment resistance board analog.
Background technology
Electrical impedance tomography technology (Electrical Impedance Tomography) is the emerging technology that development in recent years is got up, for present chromatography X-shadowgraph method, Computed tomography (CT), NMR (Nuclear Magnetic Resonance)-imaging (MRI) and ultrasonic diagnosis technology, the EIT technology has the relevant information that can reflect biological tissue, organism is injured the advantages such as little, cheap.The EIT technology shows is that the electrology characteristic of human body distributes such as distribution of conductivity, electric permittivity distribution etc., organize the difference of electrical characteristic parameter according to interior of articles, by its surface is applied safe exciting current or voltage, voltage or the current signal on Measuring Object surface are known the distribution of interior of articles electrical characteristic parameter simultaneously, and then reconstruct the image of reflection internal structure of body.
The assessment of system often require to the EIT system verify, verification.The EIT system needs hardware components and software section to combine closely.If any part of the system of modification all must be verified the result who whether reaches expectation with the performance of determining whole system by experiment.The experiment of carrying out in the above-mentioned process all must relate to some experimental provisions, and a suitable test model can improve development efficiency in design, simplify debugging step in test, can simple, intuitive in system optimization observe effect of optimization.
The experimental model of EIT system designs according to the distribution of impedance of human body, uses the uniform medium experimental situation of having idealized, and can allow the experimenter accurately the problem that runs in the experimentation be investigated.
In experimentation, usually use the saline slot experimental provision to carry out the experiment of electrode system.The saline slot experimental provision is to use insulant to be made into the kerve that has of respective shapes according to requirement of experiment, at the experimental electrode of cell wall installed inside respective numbers, seals outside the contact conductor lead-out groove and with fairlead.The saline that adds suitable conductivity during use in the bucket is connected to circuit on the lead-in wire in the cell wall outside and can tests.This device is polarized and the impact of distributed constant, and experimental situation is not ideal enough.
The utility model content
The purpose of this utility model is to provide EIT experiment resistance board analog, and the experimental provision that solves simulation human body in the prior art is affected by the external environment the dissatisfactory problem of experimental situation.
To achieve these goals, the technical solution adopted in the utility model is as follows:
EIT experiment resistance board analog comprises resistance board, and is arranged at the resistance network model on this circuit board, and the impedance model that is electrically connected with this resistance network model.
Further, described resistance network model comprises the resistor network that is provided with at least two contacts, be arranged on resistance or gauge tap between the adjacent contact, and be arranged on the described contact and be used for realizing the port of drawing that is connected with described impedance model, described resistance network model is drawn port by this and is electrically connected with described impedance model.
Again further, described resistor network is made of the loop of two concentric reducings at least, and all contacts then are uniformly distributed on all loop, and the described port of drawing then is arranged on the contact on the outermost layer loop; Described resistance network model is without cross link.
Further, described impedance model comprises output port, with the connectivity port of drawing port and being connected, and is arranged at the resistance between this output port and the connectivity port and the parallel branch of connecting with this resistance; This parallel branch is made of resistance and Capacitance parallel connection.
This utility model compared with prior art has the following advantages and beneficial effect:
What (1) impedance in this utility model and distributed constant can be artificial controls, and namely can observe the imaging effect of different impedances in experiment, the experimental situation of having idealized;
(2) there are not polarization phenomena in setting of the present utility model, and distributed constant is less, and experiment effect is more accurate;
(3) resistance network model of the present utility model is provided with switch, can according to practical situation, by the impedance transformation of closing and disconnect the adjusting resistance network internal of switch, can be good at the testing inner impedance variation to the impact of EIT system;
(4) this utility model is simple in structure, and is easy to operate, is fit to large-scale promotion application.
Description of drawings
Fig. 1 is the schematic diagram of this utility model resistance network model.
Fig. 2 is the schematic diagram of this utility model impedance model.
The specific embodiment
The utility model is described in further detail below in conjunction with drawings and Examples, and embodiment of the present utility model includes but not limited to the following example.
Embodiment
As shown in Figure 1, EIT experiment resistance board analog comprises resistance board, and is arranged at the resistance network model on this circuit board, and the impedance model that is electrically connected with this resistance network model.
Present embodiment is made as collar plate shape with resistance board, is provided with the loop of 7 concentric reducings on this resistance board as the center of circle take disc centre, is provided with altogether 124 contacts on above-mentioned 7 loop, and disc centre is provided with a contact equally; Specifically set gradually 4,8,16,16,16,32,32 contacts on the loop from the disc centre to the outside, the contact on each loop is evenly distributed on the loop that is positioned at; Present embodiment also is provided with 12 gauge taps on resistance board, be arranged at uniformly from outside within second layer loop, the 3rd layer conductor circle, layer 6 loop on, and four gauge taps are set on each loop, all between adjacent contact, this switch is used for the impedance transformation of adjusting resistance network internal; Between all the other adjacent contacts resistance is set all, and this resistance network model is without cross link; Present embodiment also is provided with 16 and draws port, and is evenly distributed on the contact on the outermost layer loop.
As shown in Figure 2, described impedance model comprises output port, with the connectivity port of drawing port and being connected, and be arranged at a resistance between this output port and the connectivity port and the parallel branch of connecting with this resistance, this parallel branch is made of a resistance and a Capacitance parallel connection.
During use, the connectivity port of impedance model is connected to the port of drawing of resistance network model, output port is connected to lower level system, then the impedance transformation of closing and disconnect the adjusting resistance network internal by switch, thereby the imaging data in the different impedance situations is sent to lower level system, carry out imaging processing, observe its imaging effect.
According to above-described embodiment, just can realize well this utility model.

Claims (5)

1.EIT experiment resistance board analog is characterized in that, comprises resistance board, and is arranged at the resistance network model on this circuit board, and the impedance model that is electrically connected with this resistance network model.
2. EIT according to claim 1 tests the resistance board analog, it is characterized in that, described resistance network model comprises the resistor network that is provided with at least two contacts, be arranged on resistance or gauge tap between the adjacent contact, and be arranged on the described contact and be used for realizing the port of drawing that is connected with described impedance model, described resistance network model is drawn port by this and is electrically connected with described impedance model.
3. EIT according to claim 2 tests the resistance board analog, it is characterized in that, described resistor network is made of the loop of two concentric reducings at least, and all contacts then are uniformly distributed on all loop, and the described port of drawing then is arranged on the contact on the outermost layer loop.
4. according to claim 2 or 3 described EIT experiment resistance board analog, it is characterized in that described resistance network model is without cross link.
5. EIT according to claim 4 tests the resistance board analog, it is characterized in that, described impedance model comprises output port, with the connectivity port of drawing port and being connected, and is arranged at the resistance between this output port and the connectivity port and the parallel branch of connecting with this resistance; This parallel branch is made of resistance and Capacitance parallel connection.
CN 201220269662 2012-06-08 2012-06-08 EIT (Electrical Impedance Tomography) experimental resistance board simulation device Expired - Lifetime CN202654128U (en)

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Application Number Priority Date Filing Date Title
CN 201220269662 CN202654128U (en) 2012-06-08 2012-06-08 EIT (Electrical Impedance Tomography) experimental resistance board simulation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220269662 CN202654128U (en) 2012-06-08 2012-06-08 EIT (Electrical Impedance Tomography) experimental resistance board simulation device

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CN202654128U true CN202654128U (en) 2013-01-09

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104083169A (en) * 2014-08-01 2014-10-08 思澜科技(成都)有限公司 BIS system verifying method based on even impedance model
CN104224173A (en) * 2014-09-23 2014-12-24 思澜科技(成都)有限公司 Electrode detection tool used for electrical impedance tomography
CN114024522A (en) * 2021-12-20 2022-02-08 广州国家实验室 Resistor network, device and method for simulating lung respiration

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104083169A (en) * 2014-08-01 2014-10-08 思澜科技(成都)有限公司 BIS system verifying method based on even impedance model
CN104083169B (en) * 2014-08-01 2019-03-05 思澜科技(成都)有限公司 BIS system Authentication method based on uniform impedance model
CN104224173A (en) * 2014-09-23 2014-12-24 思澜科技(成都)有限公司 Electrode detection tool used for electrical impedance tomography
CN114024522A (en) * 2021-12-20 2022-02-08 广州国家实验室 Resistor network, device and method for simulating lung respiration
CN114024522B (en) * 2021-12-20 2023-02-17 广州国家实验室 Resistor network, device and method for simulating lung respiration

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