CN202634274U - Converter circuit - Google Patents
Converter circuit Download PDFInfo
- Publication number
- CN202634274U CN202634274U CN 201220215302 CN201220215302U CN202634274U CN 202634274 U CN202634274 U CN 202634274U CN 201220215302 CN201220215302 CN 201220215302 CN 201220215302 U CN201220215302 U CN 201220215302U CN 202634274 U CN202634274 U CN 202634274U
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- control chip
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- oxide
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Abstract
The utility model relates to a converter circuit. The converter circuit is formed by connecting two control chips IC1 and IC2, a MOS transistor Q, two diodes D1 and D2, two inductors L1 and L2, three resistors R1, R2 and R3 and four capacitors C1, C2, C3 and C4. According to the converter circuit consisting of the two control chips, the requirements of startup under low input voltage can be met, and 5V voltage can be output under a full-load condition.
Description
Technical field
The utility model relates to circuit field, particularly a kind of converter circuit.
Background technology
The application scenario that utilizes solar cell to make power supply needs 5V voltage usually.Yet the terminal voltage that solar cell generally can provide is merely 0.8-1.4V, and its current capacity can reach 3-4A.Most DC/DC converter can not start under low like this voltage, can not under full-load conditions, start again.
Summary of the invention
The utility model provides a kind of simple and effective converter circuit in order to overcome the deficiency of above technology.
The utility model is realized through following technical scheme:
A kind of converter circuit, by two control chip IC1, IC2, a metal-oxide-semiconductor Q, two diode D1, D2, two inductance L 1, L2, three resistance R 1, R2, R3 and four capacitor C 1, C2, C3, C4 are formed by connecting,
Be connected on behind the voltage input end Vin series inductance L1 on No. 1 port of control chip IC1, also be connected to a ground capacity C1 on the voltage input end Vin;
Be connected in series diode D1 between No. 1 port of control chip IC1 and No. 2 ports, No. 2 ports of control chip IC1 directly are connected in series with No. 3 ports; No. 4 ports of control chip IC1 directly meet a ground capacity C2; No. 5 ports of control chip IC1 are connected in series back ground connection with No. 6 ports;
No. 1 port of control chip IC2 is connected on the grid of metal-oxide-semiconductor Q; Be connected on the voltage input end Vin behind the drain electrode tandem electric inductance L2 of metal-oxide-semiconductor Q; Be connected on the voltage output end Vout behind the drain electrode of the metal-oxide-semiconductor Q serial connection diode D2 simultaneously, be connected to a ground capacity C4 on the voltage output end Vout;
No. 2 ports of control chip IC2 link to each other with the source electrode of metal-oxide-semiconductor Q, and connect an earth resistance R1 on the source electrode of metal-oxide-semiconductor Q;
Be connected on the voltage output end Vout behind No. 3 port series resistor R2 of control chip IC2, and also meet an earth resistance R3 on No. 3 ports of control chip IC2;
No. 4 ports of control chip IC2 link to each other with No. 2 ports of control chip IC1, and also are connected to a ground capacity C3 on No. 4 ports of control chip IC2;
No. 5 ports and No. 6 direct ground connection in port serial connection back of control chip IC2.
Preferably, the input voltage of said voltage input end Vin is 0.5V-5V, and then the output voltage of voltage output end Vout is 5V.
The beneficial effect of the utility model is: the converter circuit that constitutes by two control chips of the utility model, can satisfy the demand of starting under low defeated people's voltage, and under full-load conditions the voltage of output 5V.
Above-mentioned explanation only is the general introduction of the utility model technical scheme, in order more to know the technological means of understanding the utility model, and can implement according to the content of specification, preferred embodiment of following the utility model and conjunction with figs. specify as after.The embodiment of the utility model is provided by following examples and accompanying drawing thereof in detail.
Description of drawings
Fig. 1 is the circuit theory diagrams of the converter circuit of the utility model.
Embodiment
Do bright specifically below in conjunction with accompanying drawing and embodiment to the utility model.
The circuit theory diagrams of the converter circuit of present embodiment:
A kind of converter circuit, by two control chip IC1, IC2, a metal-oxide-semiconductor Q, two diode D1, D2, two inductance L 1, L2, three resistance R 1, R2, R3 and four capacitor C 1, C2, C3, C4 are formed by connecting,
Be connected on behind the voltage input end Vin series inductance L1 on No. 1 port of control chip IC1, also be connected to a ground capacity C1 on the voltage input end Vin;
Be connected in series diode D1 between No. 1 port of control chip IC1 and No. 2 ports, No. 2 ports of control chip IC1 directly are connected in series with No. 3 ports; No. 4 ports of control chip IC1 directly meet a ground capacity C2; No. 5 ports of control chip IC1 are connected in series back ground connection with No. 6 ports;
No. 1 port of control chip IC2 is connected on the grid of metal-oxide-semiconductor Q; Be connected on the voltage input end Vin behind the drain electrode tandem electric inductance L2 of metal-oxide-semiconductor Q; Be connected on the voltage output end Vout behind the drain electrode of the metal-oxide-semiconductor Q serial connection diode D2 simultaneously, be connected to a ground capacity C4 on the voltage output end Vout;
No. 2 ports of control chip IC2 link to each other with the source electrode of metal-oxide-semiconductor Q, and connect an earth resistance R1 on the source electrode of metal-oxide-semiconductor Q;
Be connected on the voltage output end Vout behind No. 3 port series resistor R2 of control chip IC2, and also meet an earth resistance R3 on No. 3 ports of control chip IC2;
No. 4 ports of control chip IC2 link to each other with No. 2 ports of control chip IC1, and also are connected to a ground capacity C3 on No. 4 ports of control chip IC2;
No. 5 ports and No. 6 ports of control chip IC2 also connect directly ground connection of back.
Preferably, the capacity of said capacitor C 1 is 220 μ F, and the capacity of capacitor C 2 is 0.1 μ F; The capacity of capacitor C 3 is 15 μ F, and the capacity of capacitor C 4 is 480 μ F, and the inductance value of inductance L 1 is 330 μ H; The inductance value of inductance L 2 is 22 μ H; The resistance of resistance R 1 is 0.02 Ω, and the resistance of resistance R 2 is 91k Ω, and the resistance of resistance R 3 is 36k Ω.
Preferably, the input voltage of said voltage input end Vin is 0.5V-5V, and then the output voltage of voltage output end Vout is 5V.
The physical circuit of the converter circuit of the utility model is set forth as follows:
Control chip IC1 is operated in boot mode, obtains power from its output, and input voltage boosts to 5V from minimum 0.5V.From the power that obtains by 5V voltage of control chip (converter) IC2 output, produce output current up to 0.5A.Draft the output voltage of control chip (converter) IC2 by resistance R 2 and resistance R 3.Like this no matter loading condition how, control chip IC1 can both make control chip IC2 start.For control chip IC2 provides complete 5V voltage,, make drain-source conducting resistance Rds (on) value of external N-channel MOS FET minimum also through MOSFET is provided maximum drain-to-gate voltage (amplitude is 0-5V).
Be the input ripple that suppresses to be produced by mains switch, capacitor C 1 can be selected the capacitor of 220 low μ F of series equivalent resistance, and this capacitor also can make mains ripple little through the output impedance that reduces solar cell.The inductance of inductance L 1 is 330 μ H, and it allows control chip IC1 under low-voltage, to start.The capacitor C2 of the 15 μ F that equivalent series resistance is low places the output of control chip IC1, can be the ripple that control chip IC2 reduces supply power voltage.
Current viewing resistor R3 makes peak current limit in this inductor on 100mV/R3.The output capacitance C3 of control chip IC2 adopts the low capacitor of 480 μ F, and capacitor C 3 can the peak value of time output ripple voltage be reduced to and be not more than 80mA up to 600mA at load current.If output load current hour, can reduce the capacity of capacitor C 1, C2.The conversion efficiency of this circuit all about 80%, can obtain 200mA or bigger electric current when Vin=0.8V in the input voltage range of 0.5V-5V, when Vin=1.5V, can obtain the electric current more than the 450mA.
The foregoing description is technical conceive and the characteristics for the utility model is described just, its objective is to be the content that lets the one of ordinary skilled in the art can understand the utility model and to implement according to this, can not limit the protection range of the utility model with this.The variation or the modification of every equivalence of having done according to the essence of the utility model content all should be encompassed in the protection range of the utility model.
Claims (2)
1. a converter circuit is characterized in that, by two control chip IC1, IC2, and a metal-oxide-semiconductor Q, two diode D1, D2, two inductance L 1, L2, three resistance R 1, R2, R3 and four capacitor C 1, C2, C3, C4 are formed by connecting,
Be connected on behind the voltage input end Vin series inductance L1 on No. 1 port of control chip IC1, also be connected to a ground capacity C1 on the voltage input end Vin;
Be connected in series diode D1 between No. 1 port of control chip IC1 and No. 2 ports, No. 2 ports of control chip IC1 directly are connected in series with No. 3 ports; No. 4 ports of control chip IC1 directly meet a ground capacity C2; No. 5 ports of control chip IC1 are connected in series back ground connection with No. 6 ports;
No. 1 port of control chip IC2 is connected on the grid of metal-oxide-semiconductor Q; Be connected on the voltage input end Vin behind the drain electrode tandem electric inductance L2 of metal-oxide-semiconductor Q; Be connected on the voltage output end Vout behind the drain electrode of the metal-oxide-semiconductor Q serial connection diode D2 simultaneously, be connected to a ground capacity C4 on the voltage output end Vout;
No. 2 ports of control chip IC2 link to each other with the source electrode of metal-oxide-semiconductor Q, and connect an earth resistance R1 on the source electrode of metal-oxide-semiconductor Q;
Be connected on the voltage output end Vout behind No. 3 port series resistor R2 of control chip IC2, and also meet an earth resistance R3 on No. 3 ports of control chip IC2;
No. 4 ports of control chip IC2 link to each other with No. 2 ports of control chip IC1, and also are connected to a ground capacity C3 on No. 4 ports of control chip IC2;
No. 5 ports and No. 6 direct ground connection in port serial connection back of control chip IC2.
2. converter circuit according to claim 1 is characterized in that, the input voltage of said voltage input end Vin is 0.5V-5V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220215302 CN202634274U (en) | 2012-05-15 | 2012-05-15 | Converter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220215302 CN202634274U (en) | 2012-05-15 | 2012-05-15 | Converter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202634274U true CN202634274U (en) | 2012-12-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220215302 Expired - Fee Related CN202634274U (en) | 2012-05-15 | 2012-05-15 | Converter circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202634274U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102664522A (en) * | 2012-05-15 | 2012-09-12 | 苏州工业园区华锐装饰工程有限公司 | Converter circuit |
-
2012
- 2012-05-15 CN CN 201220215302 patent/CN202634274U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102664522A (en) * | 2012-05-15 | 2012-09-12 | 苏州工业园区华锐装饰工程有限公司 | Converter circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121226 Termination date: 20130515 |