CN202586275U - Comprehensive anti-super runaway position-restricted counting timing control circuit - Google Patents
Comprehensive anti-super runaway position-restricted counting timing control circuit Download PDFInfo
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- CN202586275U CN202586275U CN2011202019269U CN201120201926U CN202586275U CN 202586275 U CN202586275 U CN 202586275U CN 2011202019269 U CN2011202019269 U CN 2011202019269U CN 201120201926 U CN201120201926 U CN 201120201926U CN 202586275 U CN202586275 U CN 202586275U
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Abstract
The utility model relates to a comprehensive anti-super runaway position-restricted counting timing control circuit, wherein a super protection circuit is in connection with input parallel contacts of upper and lower limit comparison circuits to sense signals; bottom and top limits of the super protection circuit are in connection with two limit reference potentials and the output is in connection with super input of a logic control circuit; a KSR bidirectional line of the logic control circuit is in connection with a mode control / show/ reset circuit, a LTH control and protection line is in connection with trigger input of a super/ out-of-limit trigger circuit and mode input of a counting / timing circuit, the input Vb is in connection with output of two current limiting protection circuits and the output Vf controls two three-state gates; output V0 and Q of the limiting control and timing current limiting protection circuit are in connection with a driving execution circuit. Thereby when a sensor or a circuit breaks down, output can be preferentially closed to effectively prevent out of control. The comprehensive anti-super runaway position-restricted counting timing control circuit can be used for temperature, voltage, water level and timing control electric appliances, raises safe performance and avoids fire hazards or blast accidents.
Description
Technical field
The utility model relates to a kind of spacing counting and timing control electronic circuit; Relate in particular to a kind of master control (up and down ultra spacing control or counting/timing controlled) circuit of guaranteeing, anti-out of controlly when various extreme abnormal failure surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively.Be applied in temperature, pressure, water level, the timing electrical equipment, can improve security performance, take place like fire or blast and so on serious accident when avoiding the use of.Therefore, the utility model is of many uses in small household appliances and simple and easy spacing control, counting/timing controlled, security protection applications such as (comprising the nuclear power safety protection control), and makes electric equipment products property/price ratio high.
Background technology
In order to examine the novelty of the utility model; I have consulted a large amount of correlation technique data (professional book, newpapers and periodicals); Retrieved the related patent U.S. Patent No. document; The circuit of all only finding only to accomplish basic master control (ultra spacing control and counting/timing controlled up and down) function is more; Like the control circuit with 555 time-base circuits (IC), general/special circuit (IC), single chip circuit (IC) design is exactly its classical representative, never finds to monitor and to monitor the various abnormal failures of governor circuit (protection control), prevents unusual correlation function and technical data out of control.Also only be provided with regard to the three-limit time-base circuit (application number is 200810048942.1) of my previous application and elementary can fall the function that control was monitored and protected to lowest limit fault input signal at circuit input end.
At present; Electronic application field be used widely through canonical form 555 time-base circuits; As most basic versatility function element; Enjoy electronic application professional designer and electrophile's favor, and obtained the generally approval of academia at present, its structure and principle have become the most important theories in university's electronics specialty " digital circuit " textbook.
Though it is, of many uses through canonical form 555 time-base circuit highly versatiles.But have only single master control (ultra spacing control up and down) function, internal structure is complicated, roughly is made up of five parts such as voltage divider, comparator, R-S trigger, rp-drive, discharge switch.8 of leading foot positions are if CMOS type 555 circuit are also wanted many two inverters (is used to reset, and another is located between R-S trigger Q end and the driver).Its principle is: voltage divider is provided with upper and lower bound, and comparator will import current potential and upper and lower bound is made comparisons, if the input current potential exceeds the upper limit or lower limit current potential; Two comparators trigger the R end or the S end of R-S trigger respectively, Q end output respective electrical mean longitude driver output control load, this control procedure and principle; Can only accomplish ultra spacing controlled function up and down, not have the error protection controlled function fully, be void item; On performance, there is not good part in addition; It is improper that reset terminal MR (the 4th pin) reset potential is provided with, and discreteness is too big, can not make comparisons with the input current potential again.Control end V
c(the 5th pin) upper limit of can only transfering to other localities, lower limit is built-in fixing, V
cDirect-to-ground capacitance is essential.By the RC circuit regularly, the time is short, error is big.Discharge end DIS effect is very little, waste pin (port) resource.
In addition; Present widely used single chip circuit (IC) internal hardware structure is more complicated; Cost is higher, and anti-basic resources out of control is not set yet, though can realize the anti-function out of control of a part with software; But performance is not good, thereby can not improve and realize that the utility model is described and surpass in reverse function extremely out of control comprehensively.
Summary of the invention
It is often out of control because of abnormal failure that the utility model mainly solves original basic master control (ultra spacing control and counting/timing controlled up and down) circuit, has the technical problem of hidden danger safe in utilization; Provide a kind of can comprehensive monitoring core circuit module each port generation of any I/O/settings/control/power supply unusual open fault and with the extreme abnormal failure of two poles short circuit or adjacent port short circuit; And have prevent comprehensively input surmount the lowest limit or top limit and the various faults of output short-circuit current rush and power supply power-fail or the like out of control surpass in reverse utmost point lost-control protection function comprehensively; Prevent that governor circuit is out of control; Avoid controlled device to take place as serious accidents such as fire or pressure blast (causing the fault superhigh temperature that causes out of control/high pressure crushing accident of exploding and so on because of earthquake), guarantee the spacing counting and timing control circuit extremely out of control that comprehensively surpasses in reverse safe in utilization like the Fukushima, Japan nuclear power station.
The utility model solves original realization time-controlled bad timing of RC and the short technical problem of timing simultaneously; Provide a kind of timing error little with timing long also can surpass in reverse counting and timing control circuit extremely out of control comprehensively.
The utility model has adopted following technique measures and technical scheme for solving the problems of the technologies described above:
The utility model is provided with circuit (2), upper limit comparison circuit (3), lower limit comparison circuit (4), pattern control/guarantor by existing sensing or integrating circuit (1), upper limit lower limit benchmark and shows/and reset circuit (5), driving execution circuit (15) and ultra utmost point protective circuit (6), the limit benchmark newly established be provided with circuit (7), logic control circuit (8), the ultra utmost point/out-of-limit circuits for triggering (9), limit and control output current limiting protective circuit (10), timing output current limiting protective circuit (11), counting/timing circuit (18) formation, and its connected mode is following:
Two signal input parts of the signal output part of sensing or integrating circuit (1) and upper limit comparison circuit (3), lower limit comparison circuit (4) and two signal input parts in the ultra utmost point protective circuit (6) are connected to same point, as the transducing signal input (V of core circuit module
i); The upper limit of upper limit comparison circuit (3) is provided with end (V
h) connecting the upper limit benchmark that upper limit lower limit benchmark is provided with circuit (2), the lower limit of lower limit comparison circuit (4) is provided with end (V
l) connect the lower limit benchmark that upper limit lower limit benchmark is provided with circuit (2); The required lowest limit reference potential of ultra utmost point protective circuit (6) is provided with the lowest limit (V in the circuit (7) by limit benchmark
d) provide, the required top limit reference potential of ultra utmost point protective circuit (6) is provided with the top limit (V in the circuit (7) by limit benchmark
p) provide, the control output end of ultra utmost point protective circuit (6) connects the ultra utmost point control input end of logic control circuit (8); Logic control circuit (8) and pattern control/guarantor show/and bidirectional port that reset circuit (5) is corresponding is connected by two-way control line (KSR), and pattern control/guarantor is apparent/the output connection transducing signal input (V of reset circuit (5)
i), the current-limiting protection input (V of logic control circuit (8)
b) connect and limit two current-limiting protection control output end (V controlling output current limiting protective circuit (10) and timing output current limiting protective circuit (11)
b), the protection control line (LTH) of logic control circuit (8) output connects the ultra utmost point triggering input of the ultra utmost point/out-of-limit circuits for triggering (9) and the pattern control input end of counting/timing circuit (18), the control gate output terminal (V of logic control circuit (8)
f) connect and limit tristate gate control end and the middle tristate gate control end of timing output current limiting protective circuit (11) in the control output current limiting protective circuit (10); The ultra utmost point/upper and lower spacing triggering the input of out-of-limit circuits for triggering (9) connects the control output end of upper limit comparison circuit (3) and lower limit comparison circuit (4) respectively, and the output of the ultra utmost point/out-of-limit circuits for triggering (9) connects the limit control input of limit control output current limiting protective circuit (10); Two current limliting benchmark of limit control output current limiting protective circuit (10) and timing output current limiting protective circuit (11) are provided with end and are connected the lower limit benchmark (V1) that upper limit lower limit benchmark is provided with circuit (2); The output of the time control input connection count/timing circuit (18) of timing output current limiting protective circuit (11), the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l), the count pulse input (V of counting/timing circuit (18)
c) connect and limit the limit control output (V of controlling output current limiting protective circuit (10)
o) or the inner of output current-limiting resistance; The limit control output (V of limit control output current limiting protective circuit (10)
o) be connected two drive controlling inputs of driving execution circuit (15) respectively with the timing output (Q) of timing output current limiting protective circuit (11); Driving execution circuit (15) output series connection control relay coil working power supply, or directly relay coil is connected and be connected to limit control output (V behind the isolating diode
o) and timing output (Q); Need outage to fall the electrothermal load of heat/step-down with relay normally open contact control; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in the control of relay normally-closed contact, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
When the circuit operate as normal, input V
iWhen current potential fluctuates variation in the upper limit between lower limit; Ultra utmost point protective circuit (6), logic control circuit (8) and limit control output current limiting protective circuit (10), timing output current limiting protective circuit (11) all are in the defence state; Having only two outputs of upper limit comparison circuit (3), lower limit comparison circuit (4) alternately to trigger the ultra utmost point/out-of-limit circuits for triggering (9) carries out the normal circulation upset and controls between the upper limit to lower limit; Promote driving execution circuit (15) through limit control output current limiting protective circuit (10) circulation and switch on or off load power source, and count/timing circuit (18) can be by certain preset control model through timing output current limiting protective circuit (11) to its load (providing clock signal for oneself) timing controlled of booting.
The unusual open fault that takes place when each port of any I/O/setting/control/power supply of sensing circuit or core circuit module and with the extreme abnormal failure of two poles short circuit or adjacent port short circuit, make input V
iCurrent potential surmounts the two poles of the earth and (is lower than lowest limit reference potential V
dOr be higher than top limit reference potential V
p), or power supply power-fail, start ultra utmost point protective circuit (6), or make limit control output current limiting protective circuit (10) and timing output current limiting protective circuit (11) produce current-limiting protection action, logic control circuit
(8) the reverse control ultra utmost point/out-of-limit circuits for triggering (9); Preferentially close simultaneously two triple gates in limit control output current limiting protective circuit (10) and the timing output current limiting protective circuit (11); Positive drive executive circuit (15) cut-out electrothermal load power supply or startup are fallen heat drop and are press-fited work fully; Reach and prevent purpose out of control, avoid controlled device to take place as serious accidents such as fire or high pressure blast (causing the fault superhigh temperature that causes out of control/high pressure crushing accident of exploding and so on because of earthquake) like the Fukushima, Japan nuclear power station.
Therefore, the utility model has surmounted 555 time-base circuits, also different with single chip circuit, and what increase newly surpasses in reverse utmost point lost-control protection function comprehensively, has important practical value and wider purposes.Be a kind of guarantee electric equipment safe in utilization surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively.
The technical advantage and the beneficial effect of the utility model are following:
1, compatible outside all functions of canonical form 555 time-base circuits fully; Expanded new critical function; Promptly increased and surpassed in reverse utmost point lost-control protection function and counting/timing function comprehensively; The control model of counting/timing circuit can variation, can carry out temperature control (or controlled pressure) and regularly simultaneously, the more important thing is that to prevent comprehensively reliably that various extreme abnormal failures (comprising the power supply power-fail fault) from causing out of control; Improve security performance, thereby had prior practical value and purposes widely.
2, expand and improved the function and the performance of reset terminal, make the control model variation of counting/timing circuit, and have both the error protection Presentation Function and the function of shaking is faced in elimination, the undesirable feature in the time of can also improving NTC low temperature.
3, can be provided with or regulate its inner bound reference potential and return difference flexibly from the core circuit module-external, but the transducer of flexible adaptation different qualities, and make transducing signal input (V
i) the institute's sensing circuit that connects simplification, the convenient application.
4, have only a transducing signal input, high electronegative potential triggers all effective, uses easy.
5, because the ultra utmost point/out-of-limit circuits for triggering (9) do not adopt rest-set flip-flop, but adopt Schmidt trigger, trigger, but trigger, thereby anti-impulse disturbances ability is stronger, also can save anti-interference capacitor with the input current potential without input pulse.
6, by the opposite output V of two phase places of core circuit module
oWith Q series connection controlling and driving executive circuit (11), surpassing in reverse of system terminal ability extremely out of control and security performance have further been improved.
Description of drawings
Fig. 1 is the schematic block circuit diagram of the utility model.
Fig. 2 is the physical circuit schematic diagram of the utility model embodiment 1.
Fig. 3 is the physical circuit schematic diagram of the utility model embodiment 2.
Among Fig. 1: (1) is sensing or integrating circuit, and (2) are provided with circuit for upper limit lower limit benchmark, and (3) are upper limit comparison circuit, and (4) are the lower limit comparison circuit; (5) for pattern control/guarantor shows/reset circuit, (6) are ultra utmost point protective circuit, and (7) are provided with circuit for limit benchmark; (8) be logic control circuit, (9) are the ultra utmost point/out-of-limit circuits for triggering, and (10) are exceeded and controlled the output current limiting protective circuit; (11) be timing output current limiting protective circuit, (15) are the driving execution circuit, and (18) are counting/timing circuit.
Embodiment
Below by embodiment, and in conjunction with the accompanying drawings, do further bright specifically to the technical scheme of the utility model.
The schematic block circuit diagram of embodiment 1 and embodiment 2, as shown in Figure 1, (1) is sensing or integrating circuit; (2) for the upper limit lower limit benchmark circuit is set, (3) are upper limit comparison circuit, and (4) are the lower limit comparison circuit; (5) for pattern control/guarantor shows/reset circuit, (6) are ultra utmost point protective circuit, and (7) are provided with circuit for limit benchmark; (8) be logic control circuit, (9) are the ultra utmost point/out-of-limit circuits for triggering, and (10) are exceeded and controlled the output current limiting protective circuit; (11) be timing output current limiting protective circuit, (15) are the driving execution circuit, and (18) are counting/timing circuit.
Embodiment 1:
Present embodiment is an instance of making temperature control (or regularly) circuit application, and its physical circuit schematic diagram is as shown in Figure 2, is the core circuit module in the frame of broken lines among the figure.Described sensing or integrating circuit (1) comprise negative tempperature coefficient thermistor Ntc21 or variable resistor RP21 and resistance R 29 or capacitor C 21; Described upper limit lower limit benchmark is provided with circuit (2) and comprises resistance R 211, R212, R213; Described upper limit comparison circuit (3) is a voltage comparator B 22; Described lower limit comparison circuit (4) is a voltage comparator B 23; Described pattern control/guarantor shows/and reset circuit (5) comprises LED 21 and resistance R 26, R27, R28, R218; Described ultra utmost point protective circuit (6) comprises lowest limit voltage comparator B 21, diode D22 and top limit voltage comparator B24; Described limit benchmark is provided with circuit (7) and comprises resistance R 20, R21, R210; Described logic control circuit (8) comprises operational amplifier A 22, resistance R 216 and protection control line (LTH); The described ultra utmost point/out-of-limit circuits for triggering (9) comprise operational amplifier A 21 and resistance R 22, R23, R24, R25; Described limit control output current limiting protective circuit (10) comprises voltage comparator B 25, triple gate ST21, rectifier bridge heap ZD21 and current limliting/sample resistance IR21, and described timing output current limiting protective circuit (11) comprises voltage comparator B 26, triple gate ST22, rectifier bridge heap ZD22 and current limliting/sample resistance IR22, and described driving execution circuit (15) comprises resistance R 205 and R215, voltage stabilizing didoe WD21 and WD22, diode D21, triode T21 and T22, relay J 21.
Fig. 2 circuit connecting mode:
Described negative tempperature coefficient thermistor Ntc21 or variable resistor RP21 one termination dc power anode (V+); The other end connects resistance R 28, R29 or capacitor C 21 positive poles, and resistance R 29 other ends or capacitor C 21 negative poles connect dc power cathode (V-) or circuit ground end (GND); Resistance R 28 other ends connect two-way control line port (KSR) and resistance R 218, LED 21 negative poles; The LED 21 anodal also connecting resistance R218 other ends and resistance R 26, R27; Resistance R 26 another termination dc power anodes (V+), resistance R 27 another termination dc power cathodes (V-); After resistance R 210, R20, R21 connect in proper order, another termination positive source (V+) of resistance R 210, resistance R 21 another termination dc power cathodes (V-), its top limit (V
p) connect and push up positive (+) input of limitting voltage comparator B24, its lowest limit (V
d) connecting diode D22 negative pole, diode D22 positive pole connects anti-phase (-) input (diode D22 can guarantee the minimum) of lowest limit voltage comparator B 21 here when fault; After resistance R 211, R212, R213 connect in proper order; Another termination dc power anode (V+) of resistance R 211; Resistance 213 another termination dc power cathodes (V-), resistance R 211 connects voltage comparator B 22 anti-phase (-) inputs with the R212 tie point, as the upper limit reference potential end (V is set
h), resistance R 212, R213 tie point connect voltage comparator B 23 anti-phase (-) inputs, as the lower limit reference potential end (V are set
L); Anti-phase (-) input of three positives (+) input of voltage comparator B 21, B22, B23 and voltage comparator B 24 is connected to a bit, is connected on the thermistor Ntc21 series resistor R29 dividing point, as the transducing signal input (V of core circuit module again
i); Resistance R 22 connects voltage comparator B 22 outputs; Resistance R 23 connects voltage comparator B 23 outputs; The other end of resistance R 22, R23 and resistance R 24 all are connected anti-phase (-) input of operational amplifier A 21; Positive (+) input of operational amplifier A 21 connects resistance R 25 and protection control line (LTH), and the output of operational amplifier A 21 connects the other end of resistance R 25 and the input of triple gate ST21; One of the reversed-phase output connection current limliting/sample resistance IR21 the inner of triple gate ST21 and rectifier bridge heap ZD21 exchanges end, and another of current limliting/sample resistance IR21 outer end and rectifier bridge heap ZD21 exchanges the count pulse input (V of end and counting/timing circuit (18)
C2) be connected to a bit, as the limit control output (V of core circuit module
O2), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD21, the direct-flow positive pole of rectifier bridge heap ZD21 connects anti-phase (-) input of voltage comparator B 25; Positive (+) input of voltage comparator B 25 and B26 and anti-phase (-) input of operational amplifier A 22 are connected the lower limit reference potential end (V are set
L), the current-limiting protection control output end (V of voltage comparator B 25 and B26
b) meet the current-limiting protection input (V of logic control circuit (8)
b), in logic control circuit (8), control input end (V
b) and two outputs of top limit voltage comparator B24 and lowest limit voltage comparator B 21 and resistance R 216 all be connected in and protect on the control line (LTH); Constitute the line logical relation; The other end of resistance R 216 connects the two-way control line port (KSR) of core circuit module; On protection control line (LTH), the pattern control input end of counting/timing circuit (18) and positive (+) input of operational amplifier A 22 have also been connected, the control gate output terminal (V of operational amplifier A 22
f) connect two control ends of triple gate ST21, ST22; The output of input connection count/timing circuit (18) of triple gate ST22, the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l); One of the reversed-phase output connection current limliting/sample resistance IR22 the inner of triple gate ST22 and rectifier bridge heap ZD22 exchanges end; Another of current limliting/sample resistance IR22 outer end and rectifier bridge heap ZD22 exchanges end and is connected to a bit, as the timing output (Q of core circuit module
2), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD22, the direct-flow positive pole of rectifier bridge heap ZD22 connects anti-phase (-) input of voltage comparator B 26; The limit control output (V of module
O2) connection resistance R 205; It is anodal that resistance R 205 connects voltage stabilizing didoe WD21; Voltage stabilizing didoe WD21 negative pole connects triode T21 base stage, and triode T21 emitter connects dc power anode (V+), triode T21 collector connection relay J21 coil and diode D21 negative pole; Timing output (the Q of module
2) connection resistance R 215; Resistance R 215 other ends connect voltage stabilizing didoe WD22 negative pole; The anodal triode T22 base stage that connects of voltage stabilizing didoe WD22; Triode T22 emitter connects dc power cathode (V-) or circuit ground end (GND), and triode T22 collector electrode connects the anodal and relay J 21 coil other ends of diode D21, needs outage to fall the electrothermal load that heat drop is pressed with the control of relay J 21 normally opened contacts; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in relay J 21 normally-closed contact controls, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
Fig. 2 circuit working principle:
At the beginning of circuit powers on,, make its dividing point that is connected in series with resistance R 29 (transducing signal input V because of negative tempperature coefficient thermistor Ntc21 is in the low temperature high-impedance state
i) current potential is also lower, is lower than lower limit reference potential V
L, but greater than the lowest limit (V
d) reference potential (diode D22 can guarantee the minimum when fault); So voltage comparator B 21 output high level are given protection control line (LTH) in the logic control circuit (8); Make operational amplifier A 21 positive (+) inputs obtain high potential; Also make the pattern control input end of counting/timing circuit (18) be in certain control model, also make the control end of triple gate ST21, ST22 also obtain high potential and be in opening state, protect this moment control line (LTH) and bidirectional port KSR current potential just to be decided by the voltage ratio of resistance R 26 string R27; LED 21 is not luminous, representes that each protective circuit is in the defence state; Voltage comparator B 22 is because of positive (+) input current potential (V
i) be lower than its anti-phase (-) input current potential (V
h) output low level gives resistance R 22; Voltage comparator B 23 positive (+) input current potentials also are lower than anti-phase (-) terminal potential and export electronegative potential and give resistance R 23; And the current potential on the protection control line (LTH) that this moment, operational amplifier A 21 anti-phase (-) input current potentials were connect less than its positive (+) input; So operational amplifier A 21 outputs output high level feeds back to protection control line (LTH) through resistance R 25 on the one hand, make operational amplifier A 21 produce the schmidt trigger effect; Be locked as high output state; Output low level is given current limliting/sample resistance IR21 after the triple gate ST21 anti-phase of opening, and the voltage drop that just often on current limliting/sample resistance IR21, produces is less, so at limit control output (V
O2) obtain low level, make anti-phase (-) input of voltage comparator B 25 obtain current potential on the one hand less than its positive (+) input current potential (V
L) and the output high level, on the other hand through resistance R 205, voltage stabilizing didoe D21 drives triode T21 conducting; And the low level of counting/timing circuit this moment (18) output is exported high level to current limliting/sample resistance IR22 after the triple gate ST22 anti-phase of opening, and the voltage drop that just often on current limliting/sampling appearance resistance IR22, produces is less, so at timing output (Q
2) obtain high level, through resistance R 215, voltage stabilizing didoe D22 drives triode T22 conducting, two triode T21, T22 conducting simultaneously, relay J 21 coil electricity adhesives, the J21 normally opened contact is connected load power source, makes the load heating up.
Behind the power on circuitry certain hour, Ntc21 rises with load temperature because of negative tempperature coefficient thermistor, and resistance diminishes, and makes transducing signal input V
iCurrent potential rises, and works as V
iCurrent potential is greater than V
lCurrent potential, but still be lower than V
hDuring current potential; Voltage comparator B 23 output high level, voltage comparator B 22 is output low level still, and this moment, operational amplifier A 21 anti-phase (-) input current potentials were decided by the voltage ratio of resistance R 24 series connection R22; Still the current potential on the protection control line (LTH) that is connect less than its positive (+) input; So operational amplifier A 21 outputs are kept former high level state, triode T21 continues to let relay J 21 keep the energising attracting state, and load temperature continues to raise; Make negative tempperature coefficient thermistor Ntc21 resistance continue to reduce input V
iCurrent potential continues to rise, and works as V
iCurrent potential rises to greater than upper limit reference potential V
hThe time; Voltage comparator B 22 output high level; And this moment operational amplifier A 21 anti-phase (-) input current potentials near positive source (V+) voltage is higher than its positive (+) input current potential output low level, feed back to operational amplifier A 21 normal phase input ends through feedback resistance R25 on the one hand, the current potential on the protection control line (LTH) is slightly reduced; LED 21 does not still work, and indication circuit still is in normal operating conditions; The low level of operational amplifier A 21 outputs is after the triple gate ST21 anti-phase of opening is high level on the other hand; Give current limliting/sample resistance IR21; The voltage drop that just often on current limliting/sample resistance IR21, produces is less, makes voltage comparator B 25 also export high level, limit control output (V
O2) high level that obtains makes triode T21 lose base flow and end, relay J 21 coil blackouts discharge (its back-emf is eliminated by diode D21), and its normally opened contact breaks off, and cuts off electric, and load temperature begins to descend.Thermistor Ntc21 descends with temperature, and resistance becomes greatly gradually, input V
iCurrent potential descends, limit control output V
O2Continue to keep high potential state, work as V
iPotential drop is extremely less than V
lDuring current potential, voltage comparator B 23 outputs become low level by high level, trigger the Schmidt circuit upset, and promptly operational amplifier A 21 is exported high level again, after the triple gate ST21 anti-phase of opening, make limit control output (V
O2) output low level, drive the triode conducting again, the adhesive again of relay J 21 coils; Load electricity again heats up; Make circuit get into next temperature control cyclic process, between the upper limit to lower limit, carry out in the normal circulation temperature control process, voltage comparator B 21, B24, B25, B26 and operational amplifier A 22 are exported high level all the time; LED 21 is not luminous, and indication circuit is in the defence state.And count/timing circuit (18) can be by certain preset control model to its load timing controlled of booting.
When any I/O/setting/each port of control/power supply of sensing circuit or core circuit module unusual open fault takes place and during with the extreme abnormal failure of two poles short circuit or adjacent port short circuit, makes input V
iCurrent potential surmounts the two poles of the earth and (is lower than lowest limit reference potential V
dOr be higher than top limit reference potential V
p); Or power supply power-fail, start ultra utmost point protective circuit (6), or make limit control output current limiting protective circuit (10) and timing output current limiting protective circuit (11) produce the current-limiting protection action; Logic control circuit (8) drags down the current potential on the protection control line (LTH); The reverse control ultra utmost point/out-of-limit circuits for triggering (9) and counting/timing circuit (18), simultaneously, the control gate output terminal (V of operational amplifier A 22
f) output low level gives two control ends of triple gate ST21, ST22; Preferentially close triple gate ST21, ST22; Make its output high-impedance state; Positive drive executive circuit (15) cut-out electrothermal load power supply or startup are fallen heat drop and are press-fited work fully, reach to prevent purpose out of control, avoid the controlled device generation like serious accidents such as fire or high pressure blast (causing the fault superhigh temperature that causes out of control/high pressure blast and so on crushing accident because of earthquake like the Fukushima, Japan nuclear power station).
Therefore, the utility model has surmounted 555 time-base circuits, also different with single chip circuit, and what increase newly surpasses in reverse utmost point lost-control protection function comprehensively, has important practical value and wider purposes.Be a kind of guarantee electric equipment safe in utilization surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively.
Embodiment 2:
Present embodiment also is an instance of making temperature control (or regularly) circuit application, and the physical circuit schematic diagram is as shown in Figure 3, is the core circuit module in the frame of broken lines among the figure.Described sensing or integrating circuit (1) comprise negative tempperature coefficient thermistor NTC31 or variable resistor RP31 and resistance R 39 or capacitor C 31; Described upper limit lower limit benchmark is provided with circuit (2) and comprises resistance R 311, R312, R313; Described upper limit comparison circuit (3) is a voltage comparator B 32; Described lower limit comparison circuit (4) is a voltage comparator B 33; Described pattern control/guarantor shows/and reset circuit (5) comprises LED 31 and resistance R 36, R37, R38, R318; Described ultra utmost point protective circuit (6) comprises lowest limit voltage comparator B 31, diode D32 and top limit voltage comparator B34; Described limit benchmark is provided with circuit (7) and comprises resistance R 30, R31, R310; Described logic control circuit (8) comprises operational amplifier A 32, resistance R 316 and protection control line (LTH), and the described ultra utmost point/out-of-limit circuits for triggering (9) comprise operational amplifier A 31 and resistance R 32, R33, R34, R35, and described limit control output current limiting protective circuit (10) comprises voltage comparator B 35, triple gate ST31, rectifier bridge heap ZD31 and current limliting/sample resistance IR31; Described timing output current limiting protective circuit (11) comprises voltage comparator B 36, triple gate ST32, rectifier bridge heap ZD32 and current limliting/sample resistance IR32, and described driving execution circuit (15) comprises diode D30, D31, relay J 31.
Fig. 3 circuit connecting mode:
Described negative tempperature coefficient thermistor NTC31 or variable resistor RP31 one termination dc power anode (V+); The other end connects resistance R 38, R39 or capacitor C 31 positive poles, and resistance R 39 other ends or capacitor C 31 negative poles connect dc power cathode (V-) or circuit ground end (GND); Resistance R 38 other ends connect two-way control line port (KSR) and resistance R 318 and LED 31 negative poles; The LED 31 anodal also connecting resistance R318 other ends and resistance R 36, R37; Resistance R 36 another termination dc power anodes (V+), resistance R 37 another termination dc power cathodes (V-); After resistance R 310, R30, R31 connect in proper order, another termination positive source (V+) of resistance R 310, resistance R 31 another termination dc power cathodes (V-), its top limit (V
p) connect and push up positive (+) input of limitting voltage comparator B34, its lowest limit (V
d) connecting diode D32 negative pole, diode D32 positive pole connects anti-phase (-) input (diode D32 can guarantee the minimum) of lowest limit voltage comparator B 31 here when fault; After resistance R 311, R312, R313 connect in proper order; Another termination dc power anode (V+) of resistance R 311; Resistance R 313 another termination dc power cathodes (V-), resistance R 311 connects voltage comparator B 32 positive (+) inputs with the R312 tie point, as the upper limit reference potential end (V is set
h), resistance R 312, R313 tie point connect voltage comparator B 33 anti-phase (-) inputs, as the lower limit reference potential end (V are set
L); Two anti-phases (-) input of two positives (+) input of voltage comparator B 31, B33 and voltage comparator B 32, B34 is connected to a bit; Be connected to again on the dividing point of thermistor Ntc31 series resistor R39, as the transducing signal input (V of core circuit module
i); Anti-phase (-) input of resistance R 32 1 termination voltage comparator B32 outputs and operational amplifier A 31; On the output of resistance R 32 another termination voltage comparator B 31, B34 and the protection control line (LTH); Resistance R 33 connects voltage comparator B 33 outputs; Positive (+) input of resistance R 33 another termination operational amplifier A 31 and resistance R 34, R35; Resistance R 34 another termination dc power anodes (V+), the output of resistance R 35 another termination operational amplifier A 31 and the input of triple gate ST31; One of the reversed-phase output connection current limliting/sample resistance IR31 the inner of triple gate ST31 and rectifier bridge heap ZD31 exchanges end, goes back the count pulse input (V of connection count/timing circuit (18)
C3), another of current limliting/sample resistance IR31 outer end and rectifier bridge heap ZD31 exchanges end and is connected to a bit, as the limit control output (V of core circuit module
O3); The direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD31; The direct-flow positive pole of rectifier bridge heap ZD31 connects anti-phase (-) input of voltage comparator B 35, and positive (+) input of voltage comparator B 35 and B36 and anti-phase (-) input of operational amplifier A 32 are connected the lower limit reference potential end (V is set
L), the current-limiting protection control output end (V of voltage comparator B 35 and B36
b) meet the current-limiting protection input (V of logic control circuit (8)
b); In logic control circuit (8), control input end (V
b) and two outputs of top limit voltage comparator B34 and lowest limit voltage comparator B 31 and resistance R 316 all be connected in and protect on the control line (LTH); Constitute the line logical relation; The other end of resistance R 316 connects the two-way control line port (KSR) of core circuit module; On protection control line (LTH), the pattern control input end of counting/timing circuit (18) and positive (+) input of operational amplifier A 32 have also been connected, the control gate output terminal (V of operational amplifier A 32
f) connect two control ends of triple gate ST31, ST32; The output of input connection count/timing circuit (18) of triple gate ST32, the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l); One of the reversed-phase output connection current limliting/sample resistance IR32 the inner of triple gate ST32 and rectifier bridge heap ZD32 exchanges end; Another of current limliting/sample resistance IR32 outer end and rectifier bridge heap ZD32 exchanges end and is connected to a bit, as the timing output (Q of core circuit module
3), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD32, the direct-flow positive pole of rectifier bridge heap ZD32 connects anti-phase (-) input of voltage comparator B 36; The limit control output (V of module
O3) connecting diode D30 positive pole, diode D30 negative pole connects relay J 31 coils and diode D31 negative pole; Timing output (the Q of module
3) the anodal and relay J 31 coil other ends of connection diode D31; The control of relay J 31 normally opened contacts needs outage to fall the electrothermal load that heat drop is pressed; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in relay J 31 normally-closed contact controls, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
Fig. 3 circuit working principle:
At the beginning of circuit powers on,, make its dividing point that is connected in series with resistance R 39 (transducing signal input V because of negative tempperature coefficient thermistor Ntc31 is in the low temperature high-impedance state
i) current potential is also lower, is lower than lower limit reference potential V
L, but greater than lowest limit reference potential V
dSo voltage comparator B 31 output high level are given protection control line (LTH) in the logic control circuit (8); Make the pattern control input end of counting/timing circuit (18) be in certain control model; Also make operational amplifier A 32 output high level, be in opening state so the control end of triple gate ST31, ST32 also obtains high potential, protect this moment control line (LTH) and bidirectional port KSR current potential just to be decided by the voltage ratio of resistance R 36 string R37; LED 31 is not luminous, representes that each protective circuit is in the defence state.Voltage comparator B 32 is because of anti-phase (-) input (transducing signal input V
i) current potential is lower than its positive (+) input (V
h) current potential, the output high level is given resistance R 32; Voltage comparator B 33 positive (+) input current potentials are lower than anti-phase (-) terminal potential and export electronegative potential and give resistance R 33, drag down operational amplifier A 31 positive (+) input current potentials.Again because operational amplifier A 31 input impedance are very big; Much larger than resistance R 32; Make operational amplifier A 31 anti-phase (-) input current potentials approaching with the current potential in protection control line (LTH), so the time because of operational amplifier A 31 positive (+) input current potentials less than its anti-phase (-) input current potential output low level, feed back to protection control line (LTH) through resistance R 35 on the one hand; Make operational amplifier A 31 produce the schmidt trigger effect, be locked as low output state; The output high level is given current limliting/sample resistance IR31 after the triple gate ST31 anti-phase of opening on the other hand.The voltage drop that just often on current limliting/sample resistance IR31, produces is less, makes anti-phase (-) input of voltage comparator B 35 obtain current potential less than its positive (+) input current potential (V on the one hand
L) and the output high level is given protection control line (LTH); On the other hand at limit control output (V
O3) also obtaining high level, this high level directly is added on relay J 31 coils through diode D30.And the high level of counting/timing circuit this moment (18) output output low level after the triple gate ST32 anti-phase of opening is given current limliting/sample resistance IR32, and the voltage drop that just often on current limliting/sample resistance IR32, produces is less, so at timing output (Q
3) also obtain low level, thereby relay J 31 coil two ends are at limit control output (V
O3) high level and timing output (Q
3) low level effect energising adhesive down, relay J 31 normally opened contacts are connected load power source, make the load heating up.
Behind the power on circuitry certain hour, Ntc31 rises with load temperature because of negative tempperature coefficient thermistor, and resistance diminishes, and makes transducing signal input V
iCurrent potential rises, and works as V
iCurrent potential is greater than V
lCurrent potential, but still be lower than V
hDuring current potential; Voltage comparator B 33 output high level, voltage comparator B 32 is still exported high level, and this moment, operational amplifier A 31 positive (+) input current potentials were decided by the voltage ratio of resistance R 34 series connection R35; Still less than the current potential on the protection control line (LTH); So make operational amplifier A 31 outputs keep former low level state, after the triple gate ST31 anti-phase of opening, at limit control output (V
O3) be high level still, let relay J 31 keep the energising attracting state, load temperature continues to raise, and makes negative tempperature coefficient thermistor Ntc31 resistance continue to reduce input V
iCurrent potential continues to rise; Work as V
iCurrent potential rises to greater than upper limit reference potential V
hThe time, the electronegative potential of voltage comparator B 32 outputs approaches circuit ground end (GND) current potential, and because of the support of resistance R 32, very little to the influence of the current potential on the protection control line (LTH), LED 31 does not still work, and indication circuit still is in normal operating conditions.And operational amplifier A 31 anti-phase (-) input current potentials were lower than its positive (+) input current potential and exported high level this moment; Feed back to amplifier A31 normal phase input end through feedback resistance R35 on the one hand, the output of locking high level is on the other hand after the triple gate ST31 anti-phase of opening; Output low level is given current limliting/sample resistance IR31; The voltage drop that just often on current limliting/sample resistance IR31, produces is less, makes voltage comparator B 35 output low levels, limit control output (V
O3) low level that obtains makes relay J 31 coil blackouts discharge (its back-emf is eliminated by diode D31), its normally opened contact breaks off, and cuts off electric, and load temperature begins to descend.Thermistor Ntc31 descends with temperature, and resistance becomes greatly gradually, input V
iCurrent potential descends, and works as V
iCurrent potential drops to less than upper limit reference potential V
hThe time; The high potential of voltage comparator B 32 outputs still is lower than operational amplifier A 31 positive (+) input current potentials near the current potential on the protection control line (LTH), and operational amplifier A 31 outputs still are locked as high level output; After triple gate ST31 anti-phase, continue to keep limit control output (V
O3) low level state; Work as V
iPotential drop is extremely less than V
lDuring current potential; Voltage comparator B 33 outputs become low level by high level; Make operational amplifier A 31 positive (+) input current potentials be lower than the current potential on the protection control line (LTH), trigger operational amplifier A 31 (Schmidt circuit) upset, again output low level; After the triple gate ST31 anti-phase of opening, at limit control output (V
O3) obtain high level output; Drive relay J 31 coil adhesives again, load electricity again heats up, and makes circuit get into next temperature control cyclic process; Between the upper limit to lower limit, carry out in the normal circulation temperature control process voltage comparator B 31, B34, B35, B36 and operational amplifier
A32 exports high level all the time, and LED 31 is not luminous, and indication circuit is in the defence state.And count/timing circuit (18) can be by certain preset control model to its load timing controlled of booting.
When any I/O/setting/each port of control/power supply of sensing circuit or core circuit module unusual open fault takes place and during with the extreme abnormal failure of two poles short circuit or adjacent port short circuit, makes input V
iCurrent potential surmounts the two poles of the earth and (is lower than lowest limit reference potential V
dOr be higher than top limit reference potential V
p); Or power supply power-fail, start ultra utmost point protective circuit (6), or make limit control output current limiting protective circuit (10) and timing output current limiting protective circuit (11) produce the current-limiting protection action; Logic control circuit (8) drags down the current potential on the protection control line (LTH); The reverse control ultra utmost point/out-of-limit circuits for triggering (9) and counting/timing circuit (18), simultaneously, the control gate output terminal (V of operational amplifier A 32
f) output low level gives two control ends; Preferentially close triple gate ST31, ST32; Make its output high-impedance state; Positive drive executive circuit (15) cut-out electrothermal load power supply or startup are fallen heat drop and are press-fited work fully, reach to prevent purpose out of control, avoid the controlled device generation like serious accidents such as fire or high pressure blast (causing the fault superhigh temperature that causes out of control/high pressure blast and so on crushing accident because of earthquake like the Fukushima, Japan nuclear power station).
Therefore, the utility model has surmounted 555 time-base circuits, also different with single chip circuit, and what increase newly surpasses in reverse utmost point lost-control protection function comprehensively, has important practical value and wider purposes.Be a kind of guarantee electric equipment safe in utilization surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively.
Claims (3)
1. surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively; Comprise that sensing or integrating circuit (1), upper limit lower limit benchmark are provided with circuit (2), upper limit comparison circuit (3), lower limit comparison circuit (4), pattern control/guarantor and show/reset circuit (5), driving execution circuit (15), is characterized in that: comprise that also ultra utmost point protective circuit (6), limit benchmark are provided with circuit (7), logic control circuit (8), the ultra utmost point/out-of-limit circuits for triggering (9), limit and control output current limiting protective circuit (10), timing output current limiting protective circuit (11), counting/timing circuit (18); The signal output part of described sensing or integrating circuit (1) and upper limit comparison circuit
(3), two signal input parts of lower limit comparison circuit (4) and two signal input parts in the ultra utmost point protective circuit (6) are connected to same point, as the transducing signal input (V of core circuit module
i); The upper limit of described upper limit comparison circuit (3) is provided with end and connects the upper limit benchmark (V that upper limit lower limit benchmark is provided with circuit (2)
h), the lower limit of lower limit comparison circuit (4) is provided with end and connects the lower limit benchmark (V that upper limit lower limit benchmark is provided with circuit (2)
l); The required lowest limit reference potential of described ultra utmost point protective circuit (6) is provided with the lowest limit (V in the circuit (7) by limit benchmark
d) provide, the required top limit reference potential of ultra utmost point protective circuit (6) is provided with the top limit (V in the circuit (7) by limit benchmark
p) provide, the control output end of ultra utmost point protective circuit (6) connects the ultra utmost point control input end of logic control circuit (8); Described logic control circuit (8) and pattern control/guarantor show/and bidirectional port that reset circuit (5) is corresponding is connected by two-way control line (KSR), and pattern control/guarantor is apparent/the output connection transducing signal input (V of reset circuit (5)
i), the current-limiting protection input (V of logic control circuit (8)
b) connect and limit two current-limiting protection control output end (V controlling output current limiting protective circuit (10) and timing output current limiting protective circuit (11)
b), the protection control line (LTH) of logic control circuit (8) output connects the ultra utmost point triggering input of the ultra utmost point/out-of-limit circuits for triggering (9) and the pattern control input end of counting/timing circuit (18), the control gate output terminal (V of logic control circuit (8)
f) connect and limit tristate gate control end and the middle tristate gate control end of timing output current limiting protective circuit (11) in the control output current limiting protective circuit (10); The described ultra utmost point/upper and lower spacing triggering input of out-of-limit circuits for triggering (9) connects the control output end of upper limit comparison circuit (3) and lower limit comparison circuit (4) respectively, and the output of the ultra utmost point/out-of-limit circuits for triggering (9) connects the limit control input of limit control output current limiting protective circuit (10); Two current limliting benchmark of described limit control output current limiting protective circuit (10) and timing output current limiting protective circuit (11) are provided with end and are connected the lower limit benchmark (V that upper limit lower limit benchmark is provided with circuit (2)
l); The output of the time control input connection count/timing circuit (18) of timing output current limiting protective circuit (11), the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l), the count pulse input (V of counting/timing circuit (18)
c) connect and limit the limit control output (V of controlling output current limiting protective circuit (10)
o) or the inner of output current-limiting resistance; The limit control output (V of described limit control output current limiting protective circuit (10)
o) be connected two drive controlling inputs of driving execution circuit (15) respectively with the timing output (Q) of timing output current limiting protective circuit (11); Driving execution circuit (15) output series connection control relay coil working power supply, or directly relay coil is connected and be connected to limit control output (V behind the isolating diode
o) and timing output (Q); Need outage to fall the electrothermal load of heat/step-down with relay normally open contact control; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in the control of relay normally-closed contact, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
2. according to claim 1ly surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively; It is characterized in that: described sensing or integrating circuit (1) comprise negative tempperature coefficient thermistor Ntc21 or variable resistor RP21 and resistance R 29 or capacitor C 21; Described upper limit lower limit benchmark is provided with circuit (2) and comprises resistance R 211, R212, R213; Described upper limit comparison circuit (3) is a voltage comparator B 22; Described lower limit comparison circuit (4) is a voltage comparator B 23; Described pattern control/guarantor shows/and reset circuit (5) comprises LED 21 and resistance R 26, R27, R28, R218; Described ultra utmost point protective circuit (6) comprises lowest limit voltage comparator B 21, diode D22 and top limit voltage comparator B24; Described limit benchmark is provided with circuit (7) and comprises resistance R 20, R21, R210; Described logic control circuit (8) comprises operational amplifier A 22, resistance R 216 and protection control line (LTH); The described ultra utmost point/out-of-limit circuits for triggering (9) comprise operational amplifier A 21 and resistance R 22, R23, R24, R25; Described limit control output current limiting protective circuit (10) comprises voltage comparator B 25, triple gate ST21, rectifier bridge heap ZD21 and current limliting/sample resistance IR21, and described timing output current limiting protective circuit (11) comprises voltage comparator B 26, triple gate ST22, rectifier bridge heap ZD22 and current limliting/sample resistance IR22, and described driving execution circuit (15) comprises resistance R 205 and R215, voltage stabilizing didoe WD21 and WD22, diode D21, triode T21 and T22, relay J 21; Described negative tempperature coefficient thermistor Ntc21 or variable resistor RP21 one termination dc power anode (V+); The other end connects resistance R 28, R29 or capacitor C 21 positive poles, and resistance R 29 other ends or capacitor C 21 negative poles connect dc power cathode (V-) or circuit ground end (GND); Resistance R 28 other ends connect two-way control line port (KSR) and resistance R 218, LED 21 negative poles; The LED 21 anodal also connecting resistance R218 other ends and resistance R 26, R27; Resistance R 26 another termination dc power anodes (V+), resistance R 27 another termination dc power cathodes (V-); After resistance R 210, R20, R21 connect in proper order, another termination positive source (V+) of resistance R 210, resistance R 21 another termination dc power cathodes (V-), its top limit (V
p) connect and push up the normal phase input end of limitting voltage comparator B24, its lowest limit (V
d) connecting diode D22 negative pole, diode D22 positive pole connects the inverting input of lowest limit voltage comparator B 21; After resistance R 211, R212, R213 connect in proper order; Another termination dc power anode (V+) of resistance R 211; Resistance R 213 another termination dc power cathodes (V-), resistance R 211 connects voltage comparator B 22 inverting inputs with the R212 tie point, as the upper limit reference potential end (V is set
h), resistance R 212, R213 tie point connect voltage comparator B 23 inverting inputs, as the lower limit reference potential end (V are set
L); Three normal phase input ends of voltage comparator B 21, B22, B23 and the inverting input of voltage comparator B 24 are connected to a bit, are connected on the thermistor Ntc21 series resistor R29 dividing point, as the transducing signal input (V of core circuit module again
i); Resistance R 22 connects voltage comparator B 22 outputs; Resistance R 23 connects voltage comparator B 23 outputs; The other end of resistance R 22, R23 and resistance R 24 all are connected the inverting input of operational amplifier A 21; The normal phase input end of operational amplifier A 21 connects resistance R 25 and protection control line (LTH), and the output of operational amplifier A 21 connects the other end of resistance R 25 and the input of triple gate ST21; One of the reversed-phase output connection current limliting/sample resistance IR21 the inner of triple gate ST21 and rectifier bridge heap ZD21 exchanges end, and another of current limliting/sample resistance IR21 outer end and rectifier bridge heap ZD21 exchanges the count pulse input (V of end and counting/timing circuit (18)
C2) be connected to a bit, as the limit control output (V of core circuit module
O2), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD21, the direct-flow positive pole of rectifier bridge heap ZD21 connects the inverting input of voltage comparator B 25; The normal phase input end of voltage comparator B 25 and B26 and the inverting input of operational amplifier A 22 are connected the lower limit reference potential end (V are set
L), the current-limiting protection control output end (V of voltage comparator B 25 and B26
b) meet the current-limiting protection input (V of logic control circuit (8)
b), in logic control circuit (8), control input end (V
b) and two outputs of top limit voltage comparator B24 and lowest limit voltage comparator B 21 and resistance R 216 all be connected in and protect on the control line (LTH); The other end of resistance R 216 connects the two-way control line port (KSR) of core circuit module; On protection control line (LTH), the pattern control input end of counting/timing circuit (18) and the normal phase input end of operational amplifier A 22 have also been connected, the control gate output terminal (V of operational amplifier A 22
f) connect two control ends of triple gate ST21, ST22; The output of input connection count/timing circuit (18) of triple gate ST22, the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l); One of the reversed-phase output connection current limliting/sample resistance IR22 the inner of triple gate ST22 and rectifier bridge heap ZD22 exchanges end; Another of current limliting/sample resistance IR22 outer end and rectifier bridge heap ZD22 exchanges end and is connected to a bit, as the timing output (Q of core circuit module
2), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD22, the direct-flow positive pole of rectifier bridge heap ZD22 connects the inverting input of voltage comparator B 26; The limit control output (V of module
O2) connection resistance R 205; It is anodal that resistance R 205 connects voltage stabilizing didoe WD21; Voltage stabilizing didoe WD21 negative pole connects triode T21 base stage, and triode T21 emitter connects dc power anode (V+), triode T21 collector connection relay J21 coil and diode D21 negative pole; Timing output (the Q of module
2) connection resistance R 215; Resistance R 215 other ends connect voltage stabilizing didoe WD22 negative pole; The anodal triode T22 base stage that connects of voltage stabilizing didoe WD22; Triode T22 emitter connects dc power cathode (V-) or circuit ground end (GND), and triode T22 collector electrode connects the anodal and relay J 21 coil other ends of diode D21, needs outage to fall the electrothermal load that heat drop is pressed with the control of relay J 21 normally opened contacts; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in relay J 21 normally-closed contact controls, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
3. according to claim 1ly surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively; It is characterized in that: described sensing or integrating circuit (1) comprise negative tempperature coefficient thermistor NTC31 or variable resistor RP31 and resistance R 39 or capacitor C 31; Described upper limit lower limit benchmark is provided with circuit (2) and comprises resistance R 311, R312, R313; Described upper limit comparison circuit (3) is a voltage comparator B 32; Described lower limit comparison circuit (4) is a voltage comparator B 33; Described pattern control/guarantor shows/and reset circuit (5) comprises LED 31 and resistance R 36, R37, R38, R318; Described ultra utmost point protective circuit (6) comprises lowest limit voltage comparator B 31, diode D32 and top limit voltage comparator B34; Described limit benchmark is provided with circuit (7) and comprises resistance R 30, R31, R310; Described logic control circuit (8) comprises operational amplifier A 32, resistance R 316 and protection control line (LTH), and the described ultra utmost point/out-of-limit circuits for triggering (9) comprise operational amplifier A 31 and resistance R 32, R33, R34, R35, and described limit control output current limiting protective circuit (10) comprises voltage comparator B 35, triple gate ST31, rectifier bridge heap ZD31 and current limliting/sample resistance IR31; Described timing output current limiting protective circuit (11) comprises voltage comparator B 36, triple gate ST32, rectifier bridge heap ZD32 and current limliting/sample resistance IR32, and described driving execution circuit (15) comprises diode D30, D31, relay J 31; Described negative tempperature coefficient thermistor NTC31 or variable resistor RP31 one termination dc power anode (V+); The other end connects resistance R 38, R39 or capacitor C 31 positive poles, and resistance R 39 other ends or capacitor C 31 negative poles connect dc power cathode (V-) or circuit ground end (GND); Resistance R 38 other ends connect two-way control line port (KSR) and resistance R 318 and LED 31 negative poles; The LED 31 anodal also connecting resistance R318 other ends and resistance R 36, R37; Resistance R 36 another termination dc power anodes (V+), resistance R 37 another termination dc power cathodes (V-); After resistance R 310, R30, R31 connect in proper order, another termination positive source (V+) of resistance R 310, resistance R 31 another termination dc power cathodes (V-), its top limit (V
p) connect and push up the normal phase input end of limitting voltage comparator B34, its lowest limit (V
d) connecting diode D32 negative pole, diode D32 positive pole connects the inverting input of lowest limit voltage comparator B 31; After resistance R 311, R312, R313 connect in proper order; Another termination dc power anode (V+) of resistance R 311; Resistance R 313 another termination dc power cathodes (V-), resistance R 311 connects voltage comparator B 32 normal phase input ends with the R312 tie point, as the upper limit reference potential end (V is set
h), resistance R 312, R313 tie point connect voltage comparator B 33 inverting inputs, as the lower limit reference potential end (V are set
L); Two inverting inputs of two normal phase input ends of voltage comparator B 31, B33 and voltage comparator B 32, B34 are connected to a bit, are connected on the dividing point of thermistor Ntc31 series resistor R39, as the transducing signal input (V of core circuit module again
i); The inverting input of resistance R 32 1 termination voltage comparator B32 outputs and operational amplifier A 31; On the output of resistance R 32 another termination voltage comparator B 31, B34 and the protection control line (LTH); Resistance R 33 connects voltage comparator B 33 outputs; The normal phase input end of resistance R 33 another termination operational amplifier A 31 and resistance R 34, R35, resistance R 34 another termination dc power anodes (V+), the output of resistance R 35 another termination operational amplifier A 31 and the input of triple gate ST31; One of the reversed-phase output connection current limliting/sample resistance IR31 the inner of triple gate ST31 and rectifier bridge heap ZD31 exchanges end, goes back the count pulse input (V of connection count/timing circuit (18)
C3), another of current limliting/sample resistance IR31 outer end and rectifier bridge heap ZD31 exchanges end and is connected to a bit, as the limit control output (V of core circuit module
O3); The direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD31; The direct-flow positive pole of rectifier bridge heap ZD31 connects the inverting input of voltage comparator B 35, and the normal phase input end of voltage comparator B 35 and B36 and the inverting input of operational amplifier A 32 are connected the lower limit reference potential end (V is set
L), the current-limiting protection control output end (V of voltage comparator B 35 and B36
b) meet the current-limiting protection input (V of logic control circuit (8)
b); In logic control circuit (8), control input end (V
b) and two outputs of top limit voltage comparator B34 and lowest limit voltage comparator B 31 and resistance R 316 all be connected in and protect on the control line (LTH); The other end of resistance R 316 connects the two-way control line port (KSR) of core circuit module; On protection control line (LTH), the pattern control input end of counting/timing circuit (18) and the normal phase input end of operational amplifier A 32 have also been connected, the control gate output terminal (V of operational amplifier A 32
f) connect two control ends of triple gate ST31, ST32; The output of input connection count/timing circuit (18) of triple gate ST32, the high potential of counting/timing circuit (18) programming input and electronegative potential programming input are connected upper limit lower limit benchmark respectively and the middle upper limit benchmark of circuit (2) are set end (V is set
h) and the lower limit benchmark end (V is set
l); One of the reversed-phase output connection current limliting/sample resistance IR32 the inner of triple gate ST32 and rectifier bridge heap ZD32 exchanges end; Another of current limliting/sample resistance IR32 outer end and rectifier bridge heap ZD32 exchanges end and is connected to a bit, as the timing output (Q of core circuit module
3), the direct current negative pole connection circuit ground end (GND) of rectifier bridge heap ZD32, the direct-flow positive pole of rectifier bridge heap ZD32 connects the inverting input of voltage comparator B 36; The limit control output (V of module
O3) connecting diode D30 positive pole, diode D30 negative pole connects relay J 31 coils and diode D31 negative pole; Timing output (the Q of module
3) the anodal and relay J 31 coil other ends of connection diode D31; The control of relay J 31 normally opened contacts needs outage to fall the electrothermal load that heat drop is pressed; The load equipment of heat/step-down need fall to non-electric heat type increasing temperature and pressure device in relay J 31 normally-closed contact controls, and this equipment comprises that the heat drop that falls of nuclear power nuclear reactor press-fits fully.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202019269U CN202586275U (en) | 2011-06-06 | 2011-06-06 | Comprehensive anti-super runaway position-restricted counting timing control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202019269U CN202586275U (en) | 2011-06-06 | 2011-06-06 | Comprehensive anti-super runaway position-restricted counting timing control circuit |
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| Publication Number | Publication Date |
|---|---|
| CN202586275U true CN202586275U (en) | 2012-12-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011202019269U Expired - Fee Related CN202586275U (en) | 2011-06-06 | 2011-06-06 | Comprehensive anti-super runaway position-restricted counting timing control circuit |
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| CN (1) | CN202586275U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237671A (en) * | 2011-06-06 | 2011-11-09 | 刘圣平 | Comprehensive out-of-limit and out-of-control prevention potential limiting counting timing control circuit |
| CN104330992A (en) * | 2014-10-16 | 2015-02-04 | 刘圣平 | Capping bottom safety control circuit and safety temperature-control time-control electric appliance thereof |
-
2011
- 2011-06-06 CN CN2011202019269U patent/CN202586275U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237671A (en) * | 2011-06-06 | 2011-11-09 | 刘圣平 | Comprehensive out-of-limit and out-of-control prevention potential limiting counting timing control circuit |
| CN102237671B (en) * | 2011-06-06 | 2016-10-05 | 刘圣平 | Surpass in reverse spacing counting and timing control circuit extremely out of control comprehensively |
| CN104330992A (en) * | 2014-10-16 | 2015-02-04 | 刘圣平 | Capping bottom safety control circuit and safety temperature-control time-control electric appliance thereof |
| CN104330992B (en) * | 2014-10-16 | 2019-01-04 | 刘圣平 | Electric appliance when the rebasing peace that binds controls circuit and its safety temperature control control |
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| CF01 | Termination of patent right due to non-payment of annual fee |
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