CN202584718U - Digital audio compression device - Google Patents
Digital audio compression device Download PDFInfo
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- CN202584718U CN202584718U CN 201120544803 CN201120544803U CN202584718U CN 202584718 U CN202584718 U CN 202584718U CN 201120544803 CN201120544803 CN 201120544803 CN 201120544803 U CN201120544803 U CN 201120544803U CN 202584718 U CN202584718 U CN 202584718U
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Abstract
The utility model discloses a digital audio compression device which includes a microphone, an operational amplifier, a filter, and an A/D converter which are connected in order. A communication serial port and an FLASH 1 are connected with an RAM. A dual-port RAM, and SDRAM, and the FLASH1 are connected with a DSP. The dual-port RAM, the A/D converter, and the ARM are connected with an FPGA. The digital audio compression device takes the FPGA as the main logic control chip and the DSP as the voice compression algorithm processing chip, and realizes an ARM+FPGA+DSP multiple processor integration platform through realizing the data exchange among the three parts, thus greatly improving the processing capability and the periphery expansion capability of the entire system.
Description
Technical field
The utility model relates to electronics art field, and a kind of digital audio compression device is provided.
Background technology
Under growing electronic technology and the stimulation that improve constantly of every profession and trade to product demand; Original voice recording device has satisfied not existing application demand; Become a kind of inevitable trend so develop novel voice recording device, and constantly the chip technology of development, manufacturing process etc. provide technical guarantee also for the development of novel voice recording device.The traditional voice recording device is to adopt 51 single-chip microcomputers to add the pattern of encoding and decoding speech DSP, and the embedded fixed voice compression algorithm of phonetic codec chip is by 51 Single-chip Controlling logics.Because the restriction of traditional voice plate system hardware and software, in practice, it is too short to run into storage time, and externally transmission speed is limited, many deficiencies such as decompress(ion) inconvenient operation.
The utility model content
The purpose of the utility model is to provide a kind of accuracy of identification high, a kind of digital audio compression device simple in structure.
The utility model is for realizing that above-mentioned purpose adopts following technical scheme:
A kind of digital audio compression device, its composition comprises:
Microphone: be used to gather simulated audio signal;
Operational amplifier: be used for the analogue audio frequency of input is amplified;
Wave filter: the simulated audio signal to after amplifying carries out filtering;
A/D converter: convert filtered audio signal to digital audio and video signals;
DSP: to digital encoding/decoding audio signal, compression, decompress(ion);
ARM: as main control unit, mainly be responsible for external communication, transmission data, control peripheral devices;
FPGA: major control phonetic codec chip, the string and the conversion of control speech data, and the exchanges data between the responsible DSP, ARM;
FLASH2: the speech data after the storage system compression;
FLASH1: the setup code of storage system and configuration information;
SDRAM: as data-carrier store;
Dual port RAM: as the buffering of the high-speed data of data from FPGA to DSP;
Communication serial port: be used for data communication with PC;
Said microphone, operational amplifier, wave filter and A/D converter are linked in sequence, and communication serial port is connected with ARM with FLASH1, and dual port RAM, SDRAM and FLASH1 all are connected with DSP, and dual port RAM, A/D converter and ARM all are connected with FPGA.
[0005]The utlity model has following beneficial effect:
The utility model adopts FPGA as main logic control chip; DSP is as the voice compression algorithm process chip; Through realizing the exchanges data between the three; Thereby realize the multiprocessor integration platform of ARM+FPGA+DSP, make the processing power of total system and peripheral expansion ability all be greatly improved.
Description of drawings
Fig. 1 is the system construction drawing of the utility model.
Embodiment
A kind of digital audio compression device, its composition comprises:
Microphone: be used to gather simulated audio signal;
Operational amplifier: be used for the analogue audio frequency of input is amplified;
Wave filter: the simulated audio signal to after amplifying carries out filtering;
A/D converter: convert filtered audio signal to digital audio and video signals;
DSP: to digital encoding/decoding audio signal, compression, decompress(ion);
ARM: main control unit mainly is responsible for external communication, transmission data, control peripheral devices;
FPGA: major control phonetic codec chip, the string and the conversion of control speech data, and the exchanges data between the responsible DSP, ARM;
FLASH2: the speech data after the storage system compression;
FLASH1: the setup code of storage system and configuration information;
SDRAM: as data-carrier store;
Dual port RAM: FPGA is to the buffering of the high-speed data of DSP;
Communication serial port: be used for data communication with PC;
Said microphone, operational amplifier, wave filter and A/D converter are linked in sequence, and communication serial port is connected with RAM with FLASH1, and dual port RAM, SDRAM and FLASH1 all are connected with DSP, and dual port RAM, A/D converter and ARM all are connected with FPGA.
The utility model adopts FPGA as main logic control chip; DSP is as the voice compression algorithm process chip; Through realizing the exchanges data between the three; Thereby realize the multiprocessor integration platform of ARM+FPGA+DSP, make the processing power of total system and peripheral expansion ability all be greatly improved.
Claims (1)
1. digital audio compression device, its composition comprises:
Microphone: be used to gather simulated audio signal;
Operational amplifier: be used for the analogue audio frequency of input is amplified;
Wave filter: the simulated audio signal to after amplifying carries out filtering;
A/D converter: convert filtered audio signal to digital audio and video signals;
DSP: to digital encoding/decoding audio signal, compression, decompress(ion);
ARM: as main control unit, mainly be responsible for external communication, transmission data, control peripheral devices;
FPGA: major control phonetic codec chip, the string and the conversion of control speech data, and the exchanges data between the responsible DSP, ARM;
FLASH2: the speech data after the storage system compression;
FLASH1: the setup code of storage system and configuration information;
SDRAM: as data-carrier store;
Dual port RAM: as the buffering of the high-speed data of data from FPGA to DSP;
Communication serial port: be used for data communication with PC;
Said microphone, operational amplifier, wave filter and A/D converter are linked in sequence, and communication serial port is connected with ARM with FLASH1, and dual port RAM, SDRAM and FLASH1 all are connected with DSP, and dual port RAM, A/D converter and ARM all are connected with FPGA.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120544803 CN202584718U (en) | 2011-12-23 | 2011-12-23 | Digital audio compression device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120544803 CN202584718U (en) | 2011-12-23 | 2011-12-23 | Digital audio compression device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202584718U true CN202584718U (en) | 2012-12-05 |
Family
ID=47254106
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201120544803 Expired - Fee Related CN202584718U (en) | 2011-12-23 | 2011-12-23 | Digital audio compression device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202584718U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106911907A (en) * | 2017-02-09 | 2017-06-30 | 聊城大学 | A kind of accompanying flying opto-electric tracking and measurement gondola high definition compression and storage device |
| WO2017143642A1 (en) * | 2016-02-25 | 2017-08-31 | 邦彦技术股份有限公司 | Device and system and method for pcm audio acquisition on basis of fpga |
| CN112147918A (en) * | 2019-06-26 | 2020-12-29 | 中车株洲电力机车研究所有限公司 | Asynchronous data interaction method and system based on ARM + FPGA + DSP architecture |
| CN115497486A (en) * | 2022-09-21 | 2022-12-20 | 广州市保伦电子有限公司 | Audio transmission modulation method, demodulation method and system based on FPGA |
-
2011
- 2011-12-23 CN CN 201120544803 patent/CN202584718U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017143642A1 (en) * | 2016-02-25 | 2017-08-31 | 邦彦技术股份有限公司 | Device and system and method for pcm audio acquisition on basis of fpga |
| CN106911907A (en) * | 2017-02-09 | 2017-06-30 | 聊城大学 | A kind of accompanying flying opto-electric tracking and measurement gondola high definition compression and storage device |
| CN112147918A (en) * | 2019-06-26 | 2020-12-29 | 中车株洲电力机车研究所有限公司 | Asynchronous data interaction method and system based on ARM + FPGA + DSP architecture |
| CN112147918B (en) * | 2019-06-26 | 2022-02-11 | 中车株洲电力机车研究所有限公司 | Asynchronous data interaction method and system based on ARM + FPGA + DSP architecture |
| CN115497486A (en) * | 2022-09-21 | 2022-12-20 | 广州市保伦电子有限公司 | Audio transmission modulation method, demodulation method and system based on FPGA |
| CN115497486B (en) * | 2022-09-21 | 2023-05-16 | 广东保伦电子股份有限公司 | Modulation method, demodulation method and system for audio transmission based on FPGA |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121205 Termination date: 20131223 |