CN202564272U - 无基岛单圈多芯片堆叠正装倒装封装结构 - Google Patents

无基岛单圈多芯片堆叠正装倒装封装结构 Download PDF

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CN202564272U
CN202564272U CN201220204412.3U CN201220204412U CN202564272U CN 202564272 U CN202564272 U CN 202564272U CN 201220204412 U CN201220204412 U CN 201220204412U CN 202564272 U CN202564272 U CN 202564272U
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chip
pin
pins
metal
packaging structure
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王新潮
李维平
梁志忠
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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Abstract

本实用新型涉及一种无基岛单圈多芯片堆叠正装倒装封装结构，它包括引脚（1）、第一芯片（2）和第二芯片（3），所述第一芯片设置于引脚正面，所述第二芯片倒装于第一芯片正面，所述第一芯片正面与引脚正面之间用金属线（6）相连接，所述引脚与引脚之间的区域、引脚上部的区域、引脚下部的区域以及第一芯片、第二芯片和金属线外均包封有塑封料（7），所述引脚背面的塑封料上开设有小孔（8），所述小孔与引脚背面相连通，所述小孔内设置有金属球（10），所述金属球与引脚背面相接触。本实用新型的有益效果是：降低了制造成本，提高了封装体的安全性和可靠性，减少了环境污染，能够真正做到高密度线路的设计和制造。

Description

无基岛单圈多芯片堆叠正装倒装封装结构
技术领域
本实用新型涉及一种无基岛单圈多芯片堆叠正装倒装封装结构。属于半导体封装技术领域。
背景技术
传统的高密度基板封装结构的制造工艺流程如下所示：
步骤一、参见图3，取一玻璃纤维材料制成的基板，
步骤二、参见图4，在玻璃纤维基板上所需的位置上开孔，
步骤三、参见图5，在玻璃纤维基板的背面披覆一层铜箔，
步骤四、参见图6，在玻璃纤维基板打孔的位置填入导电物质，
步骤五、参见图7，在玻璃纤维基板的正面披覆一层铜箔，
步骤六、参见图8，在玻璃纤维基板表面披覆光阻膜，
步骤七、参见图9，将光阻膜在需要的位置进行曝光显影开窗，
步骤八、参见图10，将完成开窗的部分进行蚀刻，
步骤九、参见图11，将基板表面的光阻膜剥除，
步骤十、参见图12，在铜箔线路层的表面进行防焊漆（俗称绿漆）的披覆，
步骤十一、参见图13，在防焊漆需要进行后工序的装片以及打线键合的区域进行开窗，
步骤十二、参见图14，在步骤十一进行开窗的区域进行电镀，相对形成基岛和引脚，
步骤十三、完成后续的装片、打线、包封、切割等相关工序。
上述传统高密度基板封装结构存在以下不足和缺陷：
1、多了一层的玻璃纤维材料，同样的也多了一层玻璃纤维的成本；
2、因为必须要用到玻璃纤维，所以就多了一层玻璃纤维厚度约100~150μm的厚度空间；
3、玻璃纤维本身就是一种发泡物质，所以容易因为放置的时间与环境吸入水分以及湿气，直接影响到可靠性的安全能力或是可靠性等级；
4、玻璃纤维表面被覆了一层约50~100μm的铜箔金属层厚度，而金属层线路与线路的蚀刻距离也因为蚀刻因子的特性只能做到50~100μm的蚀刻间隙（蚀刻因子: 最好制做的能力是蚀刻间隙约等同于被蚀刻物体的厚度，参见图15），所以无法真正的做到高密度线路的设计与制造；
5、因为必须要使用到铜箔金属层，而铜箔金属层是采用高压粘贴的方式，所以铜箔的厚度很难低于50μm的厚度，否则就很难操作如不平整或是铜箔破损或是铜箔延展移位等等；
6、也因为整个基板材料是采用玻璃纤维材料，所以明显的增加了玻璃纤维层的厚度100~150μm，无法真正的做到超薄的封装；
7、传统玻璃纤维加贴铜箔的工艺技术因为材质特性差异很大（膨胀系数），在恶劣环境的工序中容易造成应力变形，直接的影响到元件装载的精度以及元件与基板粘着性与可靠性。
发明内容
本实用新型的目的在于克服上述不足，提供一种无基岛单圈多芯片堆叠正装倒装封装结构，其工艺简单，不需使用玻璃纤维层，减少了制作成本，提高了封装体的安全性和可靠性，减少了玻璃纤维材料带来的环境污染，而且金属基板线路层采用的是电镀方法，能够真正做到高密度线路的设计和制造。
本实用新型的目的是这样实现的：一种无基岛单圈多芯片堆叠正装倒装封装结构，它包括引脚、第一芯片和第二芯片，所述第一芯片通过导电或不导电粘结物质设置于引脚正面，所述第二芯片倒装于第一芯片正面，所述第二芯片底部与第一芯片正面之间设置有底部填充胶，所述第一芯片正面与引脚正面之间用金属线相连接，所述引脚与引脚之间的区域、引脚上部的区域、引脚下部的区域以及第一芯片、第二芯片和金属线外均包封有塑封料，所述引脚背面的塑封料上开设有小孔，所述小孔与引脚背面相连通，所述小孔内设置有金属球，所述金属球与引脚背面相接触。
在所述引脚背面与金属球之间还设置有金属保护层。
所述引脚包括引脚上部、引脚下部和中间阻挡层，所述引脚上部和引脚下部均由单层或多层金属电镀而成，所述中间阻挡层为镍层或钛层或铜层。
与现有技术相比，本实用新型具有以下有益效果：
1、本实用新型不需要使用玻璃纤维层，所以可以减少玻璃纤维层所带来的成本；
2、本实用新型没有使用玻璃纤维层的发泡物质，所以可靠性的等级可以再提高，相对对封装体的安全性就会提高；
3、本实用新型不需要使用玻璃纤维层物质，所以就可以减少玻璃纤维材料所带来的环境污染；
4、本实用新型的二维金属基板线路层所采用的是电镀方法，而电镀层的总厚度约在10~15μm，而线路与线路之间的间隙可以轻松的达到25μm以下的间隙，所以可以真正地做到高密度內引腳線路平铺的技术能力；
5、本实用新型的二维金属基板因采用的是金属层电镀法，所以比玻璃纤维高压铜箔金属层的工艺来得简单，且不会有金属层因为高压产生金属层不平整、金属层破损以及金属层延展移位的不良或困惑；
6、本实用新型的二维金属基板线路层是在金属基材的表面进行金属电镀，所以材质特性基本相同，所以镀层线路与金属基材的内应力基本相同，可以轻松的进行恶劣环境的后工程（如高温共晶装片、高温锡材焊料装片以及高温被动元件的表面贴装工作）而不容易产生应力变形。
附图说明
图1为本实用新型无基岛单圈多芯片堆叠正装倒装封装结构的结构示意图。
图2为图1的俯视图。
图3~图14为传统的高密度基板封结构的制造工艺流程图。
图15为玻璃纤维表面铜箔金属层的蚀刻状况示意图。
其中： 
引脚1
第一芯片2
第二芯片3
导电或不导电粘结物质4
底部填充胶5
金属线6
塑封料7
小孔8
金属保护层9
金属球10。
具体实施方式
参见图1和图2，图1本实用新型无基岛单圈多芯片堆叠正装倒装封装结构的结构示意图。图2为图1的俯视图。由图1和图2可以看出，本实用新型无基岛单圈多芯片堆叠正装倒装封装结构，它包括引脚1、第一芯片2和第二芯片3，所述第一芯片2通过导电或不导电粘结物质4设置于引脚1正面，所述第二芯片3倒装于第一芯片2正面，所述第二芯片3底部与第一芯片2正面之间设置有底部填充胶5，所述第一芯片2正面与引脚1正面之间通过金属线6连接，所述引脚1与引脚1之间的区域、引脚1上部的区域、引脚1下部的区域以及第一芯片2、第二芯片3和金属线6外均包封有塑封料7，所述引脚1背面的塑封料7上开设有小孔8，所述小孔8与引脚1背面相连通，所述小孔8内设置有金属球10，所述金属球10与引脚1背面之间设置有金属保护层9，所述金属球10采用锡或锡合金材料，所述引脚1由引脚上部、中间阻挡层和引脚下部组成，引脚上部和引脚下部均由单层或多层金属电镀而成，中间阻挡层为镍层或钛层或铜层。

Claims (3)

1.一种无基岛单圈多芯片堆叠正装倒装封装结构，其特征在于它包括引脚（1）、第一芯片（2）和第二芯片（3），所述第一芯片（2）通过导电或不导电粘结物质（4）设置于引脚（1）正面，所述第二芯片（3）倒装于第一芯片（2）正面，所述第二芯片（3）底部与第一芯片（2）正面之间设置有底部填充胶（5），所述第一芯片（2）正面与引脚（1）正面之间用金属线（6）相连接，所述引脚（1）与引脚（1）之间的区域、引脚（1）上部的区域、引脚（1）下部的区域以及第一芯片（2）、第二芯片（3）和金属线（6）外均包封有塑封料（7），所述引脚（1）背面的塑封料（7）上开设有小孔（8），所述小孔（8）与引脚（1）背面相连通，所述小孔（8）内设置有金属球（10），所述金属球（10）与引脚（1）背面相接触。
2.根据权利要求1所述的一种无基岛单圈多芯片堆叠正装倒装封装结构，其特征在于：在所述引脚（1）背面与金属球（10）之间还设置有金属保护层（9）。
3.根据权利要求1所述的一种无基岛单圈多芯片堆叠正装倒装封装结构，其特征在于：所述引脚（1）包括引脚上部、引脚下部和中间阻挡层，所述引脚上部和引脚下部均由单层或多层金属电镀而成，所述中间阻挡层为镍层或钛层或铜层。
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