CN202503528U - Signaling link access and identification device - Google Patents
Signaling link access and identification device Download PDFInfo
- Publication number
- CN202503528U CN202503528U CN2012201218433U CN201220121843U CN202503528U CN 202503528 U CN202503528 U CN 202503528U CN 2012201218433 U CN2012201218433 U CN 2012201218433U CN 201220121843 U CN201220121843 U CN 201220121843U CN 202503528 U CN202503528 U CN 202503528U
- Authority
- CN
- China
- Prior art keywords
- inserts
- pcie
- signaling
- signaling link
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Abstract
The utility model discloses a signaling link access and identification device, comprises a signaling collection card used for accessing a signaling link and collecting signaling data, and a data processing card for processing and forwarding the signaling data, wherein the signaling collection card is connected with the data processing card through a PCIE bus. By adopting an embodiment of the utility model, high-density signaling link access and processing can be achieved during high-capacity signaling interface collection.
Description
Technical field
The utility model relates to communication technical field, relates in particular to the device that a kind of signaling link inserts and discerns.
Background technology
At present; Further improvement along with transmission network; Select the medium of optical cable in China Mobile's existing network more and more for use, particularly arrive BTS (Base Transceiver Station at BSC (Base Station Controller, base station controller) as transmission; Base transceiver station) in the transmission network between, this is because the interface quantity between BSC and the BTS is bigger.Adopt optical cable to adopt cable transmission relatively, can reduce the quantity of circuit and the space of the transmission room that takies, greatly reduce the transmission maintenance cost, therefore become the development trend of telecommunication transmission as medium with optical cable as medium.
Along with the transition of transmission means, traditional signaling data collecting device will face very big problem.Generally speaking; When unusual or fault appear in network; Network optimization personnel at first are with signaling instrument to collect data, and utilize some to be directed against the instrument that network data is analyzed and added up, and the data analysis that collects is got corresponding results.But under the extensive situation of laying of optical interface, the signalling analysis instrument of traditional circuit interface just seems powerless.And it is expensive to adopt dedicated optical scsi sid, price generally all to compare, and it is less to insert density, and link identification efficient is low.When handling big capacity signaling link, general way is a PCI allocation card on server, realizes through pci card access signaling link at present.This then way can cause interface density not high; Costing an arm and a leg of complete equipment; Simultaneously also do not cause in time knowing the link change situation because there being specific aim optimization, therefore this way is not suitable for large-scale application in network is done long-term complete data acquisition in 7 * 24 hours.
Summary of the invention
The utility model proposes the device that a kind of signaling link inserts and discerns, and can solve when big capacity signaling interface is gathered, and realizes that highdensity signaling link inserts and handles.
The device that the utility model embodiment provides a kind of signaling link to insert and discern comprises: be used for access signaling link and the signal collecting card of gathering signaling data; And be used to handle the data processing card with the transmitting signaling data;
Said signal collecting cartoon is crossed the PCIE bus and is connected with said data processing card.
Further, the device of said signaling link access and identification also comprises cabinet.
One preferred embodiment in, said signaling link inserts and the device of identification comprises at least four signal collecting cards; Said signal collecting card is arranged on the rear portion of said cabinet.Said signaling link inserts and the device of identification comprises at least five data transaction cards; Said data processing card is arranged on the front portion of said cabinet.
Further again, said signaling link inserts and the device of identification also comprises the PCIE backboard, and is arranged on the PCIE exchange chip on the PCIE backboard; Said PCIE backboard is arranged on the middle part of said cabinet;
The PCIE bus of said data processing card is connected with said PCIE backboard, expands N PCIE interface through the PCIE exchange chip on the said PCIE backboard; Said N PCIE interface is interconnected with a plurality of signal collecting cards with N road PCIE passage; Wherein, N >=4.
Signaling link that the utility model embodiment provides inserts and the device of identification, has adopted the special-purpose PCIE cabinet framework of structure optimization, ins conjunction with multilayer signal collecting card and data processing card, through interconnected between PCIE bus realization signal collecting card and the data processing card; This signal collecting card is used for the access signaling link and gathers signaling data; This data processing card is used for handling and the transmitting signaling data; Can solve when big capacity signaling interface is gathered, realize that highdensity signaling link inserts and the identification of quick signaling reliably.
Description of drawings
Fig. 1 is that the signaling link that provides of the utility model embodiment one inserts and the structural representation of the device of identification;
Fig. 2 is that the signaling link that provides of the utility model embodiment two inserts and the structural representation of the device of identification;
Fig. 3 is that the signaling link that provides of the utility model embodiment three inserts and the structural representation of the device of identification;
Fig. 4 is that the signaling link that provides of the utility model embodiment four inserts and the structural representation of the device of identification.
Embodiment
To combine the accompanying drawing among the utility model embodiment below, the technical scheme among the utility model embodiment is carried out clear, intactly description, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.
The device that the utility model embodiment provides a kind of signaling link to insert and discern comprises cabinet, signal collecting card and data processing card.Wherein, said signal collecting cartoon is crossed the PCIE bus and is connected with said data processing card.
This signaling link inserts and the device of identification can solve when big capacity signaling interface is gathered, and realizes that highdensity signaling link inserts and handles.Below in conjunction with Fig. 1 ~ Fig. 4, the structure of the device that the signaling link that the utility model is provided inserts and discerns is elaborated.
Referring to Fig. 1, be that the signaling link that provides of the utility model embodiment one inserts and the structural representation of the device of identification.
Referring to Fig. 2, be that the signaling link that provides of the utility model embodiment two inserts and the structural representation of the device of identification.
Referring to Fig. 3, be that the signaling link that provides of the utility model embodiment three inserts and the structural representation of the device of identification.
The signaling link that present embodiment provides inserts and the device of identification also comprises PCIE (Peripheral Component Interconnect Express, high-speed peripheral expansion interface) backboard 4, and is arranged on the PCIE exchange chip on the PCIE backboard.This PCIE backboard 4 is arranged on the middle part of cabinet 1.
As shown in Figure 3, signal collecting card 2 is connected with data processing card 3 through said PCIE backboard 4.Concrete, the PCIE bus of data processing card 3 is connected with PCIE backboard 4, expands N PCIE interface through the PCIE exchange chip on the said PCIE backboard 4; Said N PCIE interface is interconnected with a plurality of signal collecting cards 2 with N road PCIE passage, forms high-density multi-layered three-dimensional signaling link access architecture, and guarantees the redundancy and the extended capability of signaling process.Wherein, N >=4.
Referring to Fig. 4, be that the signaling link that provides of the utility model embodiment four inserts and the structural representation of the device of identification.Signal collecting card 2 specifically comprises:
Be used to accomplish the access and the signal framing of physical link, and the signal of output frame signal becomes frame module 201;
Be used for frame signal is carried out demultiplexing and HDLC protocol-decoding, and export FPGA (Field-Programmable Gate Array, the field programmable gate array) module 202 of original signaling data;
Wherein, signal becomes frame module 201 to be connected with FPGA module 202.
During practical implementation; Signal becomes frame module 201 to accomplish the access and the signal framing of physical link; And export E1 frame signal, or SDH (Synchronous Digital Hierarchy based on HDLC (High-Level Data Link Control, High-Level Data Link Control); SDH, for example STM-1/4/16) frame signal.Afterwards, 202 pairs of frame signals of FPGA module are carried out demultiplexing and are carried out the HDLC protocol-decoding, export original signaling data bag.At last, original signaling data bag arrives data processing card 3 through the PCIE bus transfer.
Wherein, can support the processing of the E1/VC12 of varying number according to the resource size of FPGA.Preferably, present embodiment can the maximum processing that realizes 1008 E1/VC12 on a signal collecting card.
The highdensity pin configuration and the logical resource of the extensive field programmable device of present embodiment utilization (FPGA) can realize jumbo signal input and physical layer process, and space availability ratio are high.Promptly can in the space of 1U, realize that the signal of 1008 E1 or VC12 (in 1 STM1 63 VC12 being arranged) inserts and handles.
Signaling link that the utility model embodiment provides inserts and the device of identification, has adopted the special-purpose PCIE cabinet framework of structure optimization, ins conjunction with multilayer signal collecting card and data processing card, through interconnected between PCIE bus realization signal collecting card and the data processing card; This signal collecting card is used for the access signaling link and gathers signaling data; This data processing card is used for handling and the transmitting signaling data; Can solve when big capacity signaling interface is gathered, realize that highdensity signaling link inserts and the identification of quick signaling reliably.
The above is the preferred implementation of the utility model; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; Can also make some improvement and retouching, these improvement and retouching also are regarded as the protection range of the utility model.
Claims (8)
1. the device that signaling link inserts and discerns is characterized in that, comprising: be used for access signaling link and the signal collecting card of gathering signaling data; And be used to handle the data processing card with the transmitting signaling data;
Said signal collecting cartoon is crossed the PCIE bus and is connected with said data processing card.
2. the device that signaling link as claimed in claim 1 inserts and discerns is characterized in that, said signaling link inserts and the device of identification also comprises cabinet.
3. the device that signaling link as claimed in claim 2 inserts and discerns is characterized in that, said signaling link inserts and the device of identification comprises at least four signal collecting cards, and each signal collecting card has a PCIE passage at least; Said signal collecting card is arranged on the rear portion of said cabinet.
4. the device that signaling link as claimed in claim 3 inserts and discerns is characterized in that, said signaling link inserts and the device of identification comprises at least one data processing card; Said data processing card is arranged on the front portion of said cabinet.
5. the device that signaling link as claimed in claim 4 inserts and discerns is characterized in that, said signaling link inserts and the device of identification also comprises the PCIE backboard, and is arranged on the PCIE exchange chip on the PCIE backboard; Said PCIE backboard is arranged on the middle part of said cabinet;
The PCIE bus of said data processing card is connected with said PCIE backboard, expands N PCIE interface through the PCIE exchange chip on the said PCIE backboard; Said N PCIE interface is interconnected with a plurality of signal collecting cards with N road PCIE passage; Wherein, N >=4.
6. the device that inserts and discern like each described signaling link of claim 1 ~ 5 is characterized in that said signal collecting fixture body comprises:
Be used to accomplish the access and the signal framing of physical link, and the signal of output frame signal becomes frame module; With
Be used for frame signal is carried out demultiplexing and HDLC protocol-decoding, and export the FPGA module of original signaling data;
Said signal becomes frame module to be connected with said FPGA module.
7. the device that signaling link as claimed in claim 6 inserts and discerns is characterized in that the height of said signal collecting card is 1U; The maximum signal of telecommunication that inserts 128 road E1, or 16 road STM1/STM4 light signals, or the light signal of 4 road STM16.
8. the device that signaling link as claimed in claim 7 inserts and discerns is characterized in that the height of said signal collecting card is 1U; Can handle the above signaling traffic of 500Mbps.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012201218433U CN202503528U (en) | 2012-03-28 | 2012-03-28 | Signaling link access and identification device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012201218433U CN202503528U (en) | 2012-03-28 | 2012-03-28 | Signaling link access and identification device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202503528U true CN202503528U (en) | 2012-10-24 |
Family
ID=47040125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012201218433U Expired - Lifetime CN202503528U (en) | 2012-03-28 | 2012-03-28 | Signaling link access and identification device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202503528U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112559428A (en) * | 2020-12-21 | 2021-03-26 | 苏州易行电子科技有限公司 | HDLC controller's FPGA chip based on PCIe |
-
2012
- 2012-03-28 CN CN2012201218433U patent/CN202503528U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112559428A (en) * | 2020-12-21 | 2021-03-26 | 苏州易行电子科技有限公司 | HDLC controller's FPGA chip based on PCIe |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105573949A (en) | Acquiring and processing circuit with JESD204B interface of VPX architecture | |
| CN206820773U (en) | A kind of board for supporting RapidIO and network double crossing over function | |
| CN101814953A (en) | Method and system for realizing automatic protection switching of transmission equipment | |
| CN110401824A (en) | KVM optical transmission system, the tandem type optical transmitter and receiver, optical interface card of multiplexing | |
| CN103210689A (en) | Method, device and system for performing time synchronization on PCIE device | |
| CN106027424A (en) | Ethernet exchange device based on RapidIO exchange technology | |
| CN101043281B (en) | Wavelength-division multiplex network synchronous digital hierarchy optical channel performance detecting device | |
| CN103840878B (en) | OTN equipment is based on the electric cross-capacity test macro of ODU0/1 particle and method | |
| CN110401466A (en) | A kind of data transmission method, device and medium based on high speed signal switching chip | |
| CN102983998A (en) | Novel data acquiring system SuperCAP | |
| CN201657014U (en) | Data acquisition card of dual-interface gigabit Ethernet | |
| CN106168933B (en) | A method of virtual dual-port shared drive is realized based on high-speed serial communication | |
| CN101969378A (en) | Switchboard based extensible DSPEED-DSP (Digital Signal Processor)_Q6474 signal processing board | |
| CN202503528U (en) | Signaling link access and identification device | |
| EP2560301B1 (en) | Crossing capacity processing method for optical transport network (otn) equipment and otn equipment | |
| CN102594514B (en) | Signaling link access and identification method | |
| CN100349425C (en) | Centeralization type system of collecting communication data based on exchange platform | |
| CN101184306A (en) | Mobile phone survey report and system for signaling data collection, process and correlation analysis | |
| CN107181702A (en) | It is a kind of to realize the device that RapidIO and Ethernet fusion are exchanged | |
| CN103716258B (en) | High-density line card, switching device, cluster system and electric signal type configuration method | |
| CN202721696U (en) | Ethernet switch hardware structure | |
| CN203522744U (en) | Multi-service optical access apparatus | |
| CN101136792A (en) | Network processor based communication protocol monitoring system and method | |
| CN100558181C (en) | Be applicable to the data test device of interface between base station and the controller thereof | |
| CN106980474A (en) | A kind of data logger based on PCIE interfaces |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 510665 East Floor 3, No. 14 and No. 16 Jianzhong Road, Tianhe District, Guangzhou City, Guangdong Province Patentee after: Yitong Century Science and Technology Co., Ltd. Address before: 510630 No. 02, 1st floor, 89 Zhongshan Avenue, Guangzhou City, Guangdong Province Patentee before: Guangdong Eastone Technology Co., Ltd. |
|
| CP03 | Change of name, title or address | ||
| CX01 | Expiry of patent term |
Granted publication date: 20121024 |
|
| CX01 | Expiry of patent term |