CN202503432U - CPU crashing prevention control circuit of mining frequency converter - Google Patents
CPU crashing prevention control circuit of mining frequency converter Download PDFInfo
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- CN202503432U CN202503432U CN2011204300670U CN201120430067U CN202503432U CN 202503432 U CN202503432 U CN 202503432U CN 2011204300670 U CN2011204300670 U CN 2011204300670U CN 201120430067 U CN201120430067 U CN 201120430067U CN 202503432 U CN202503432 U CN 202503432U
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- control circuit
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Abstract
The utility model discloses a CPU crashing prevention control circuit of a mining frequency converter. A pulse signal EN-PWM2 is connected with an I/O interface of a CPU and passes through a resistor R196 and a capacitor C153, and then the signal is inputted into a same-phase input terminal of a comparator LM339 and a voltage at a reverse input terminal is a reference voltage; and after the filtering processing, the output signal is connected with the same-phase input terminal of the comparator LM339 and the voltage at the reverse input terminal is still a reference voltage; inversion is carried out on the comparison output by an inverter 74HC14 and then a pulse signal (EN-PWM3) is outputted and is used as a control signal for allowing or prohibiting the IGBT output, wherein the control signal, together with other signals, is used for controlling conduction and shutdown of the IGBT.
Description
Technical field
The utility model relates to a kind of control circuit, the control circuit that especially a kind of anti-CPU of mine-used frequency-converter crashes.
Background technology
At present; The voltage of colliery frequency converter is general at present to adopt 380V, 690V, 1140V, 3300V, 6000V etc., and under so high voltage condition, CPU is easy to be interfered; Even crash, will cause CPU can not correctly export the defective of the control signal of IGBT.
The utility model content
The purpose of the utility model provides a kind of CPU of requirement and under normal circumstances allows normal IGBT drive signal output, and under CPU deadlock situation, can forbid the control circuit of IGBT drive signal output at once.
The utility model adopts following technical scheme:
The control circuit that a kind of anti-CPU of mine-used frequency-converter crashes; Pulse signal EN-PWM2 is connected with the I/O mouth of CPU, through resistance R 196 and capacitor C 153, is input to the in-phase input end of comparator LM339; Reverse input end is a reference voltage; The output signal is connected with the in-phase input end of comparator LM339 through filtering again, and reverse input end still is a reference voltage, relatively exports output pulse signal EN-PWM3 after reverser 74HC14 is reverse; As the control signal that allows or forbid insulated gate bipolar transistor IGBT output, this control signal is controlled the conducting and the shutoff of insulated gate bipolar transistor IGBT with other signals.
Preferably, when CPU normally moved, said pulse signal EN-PWM2 was the pulse signal of certain frequency.
Preferably, saidly also be the pulse signal of high-low level through what resistance R 196 and capacitor C 153 were input to the comparator in-phase input end.
Preferably, when the pulse that is input to the comparator in-phase input end was high level, the reference potential of ratio inverse input was high, and comparator is output as height, charged to capacitor C 183 through resistance R 183, diode D28.
Preferably, when the pulse that is input to the comparator in-phase input end was low level, comparator was output as low, and capacitor C 183 is through resistance R 179 discharges.
The beneficial effect of the utility model is:
Even for this reason this patent designed under CPU deadlock situation also can fine protection hardware system control circuit; This circuit under the initial situation before the CPU operate as normal, can guarantee that also the circuits for triggering of insulated gate bipolar transistor IGBT are in correct status when powering in addition.This circuit is realized simple, and the device that needs is few, and antijamming capability is strong, forbids that from allowing to output to the time of exporting is adjustable.
Description of drawings
Fig. 1 is the circuit theory diagrams of the utility model.
Wherein:
EN-PWM2 is the above pulse signal of 1KHZ; R196, R197, R183, R179, R180, R182 are resistance; C153, C183 are electric capacity; D29 (BAV70), D28 (BAV70) is a diode; U14, U15 are integrated packages; LM339 is a comparator; 74HC14 is an inverter.
Embodiment
According to embodiment the utility model is done further explain below.
As shown in Figure 1, EN-PWM2 is connected with the I/O mouth of CPU, through resistance R 196 and capacitor C 153; Be input to the in-phase input end of comparator LM339; Reverse input end is a reference voltage, and the output signal is connected with the in-phase input end of comparator LM339 through filtering again, and reverse input end still is a reference voltage; Relatively export output (EN-PWM3) after reverser 74HC14 is reverse; As the control signal that allows (EN-PWM3=0) or forbid (EN-PWM3=1) IGBT output, this control signal will be with other signals, conducting and the shutoff of control IGBT.
When CPU normally moves; Pulse signal EN-PWM2 is the pulse signal of certain frequency, and through resistance R 196 and capacitor C 153, what be input to the comparator in-phase input end also is the pulse signal of high-low level; When it is high level; The reference potential of ratio inverse input is high, and comparator is output as height, charges to capacitor C 183 through resistance R 183, diode D28; When the pulse that is input to the comparator in-phase input end was low level, comparator was output as low, and capacitor C 183 is through resistance R 179 discharges; Because time constant for charging and discharging is different; Pulse signal frequency through choose reasonable resistance and pulse signal EN-PWM2; The current potential that just can guarantee capacitor C 183 is higher than reference voltage; Make the output voltage of its second comparator be always high potential, the output pulse signal EN-PWM3 behind reverser is electronegative potential (low-as to allow the drive signal of insulated gate bipolar transistor IGBT to export).
After CPU was interfered deadlock, pulse signal EN-PWM2 was high or low or high resistant, after resistance R 196 and capacitor C 153; Owing to resistance R 197 ground connection, be input to the low level that is always of comparator in-phase input end, the reference potential of ratio inverse input is low; Comparator is output as low, and when the pulse of comparator in-phase input end was low level, comparator was output as low; Capacitor C 183 is through resistance R 179 discharges; Through certain hour, the output voltage of its second comparator is always electronegative potential, and the output pulse signal EN-PWM3 behind reverser is high potential (high-forbid the drive signal output of insulated gate bipolar transistor IGBT).
Obviously, the foregoing description of the utility model only be for explain clearly that the utility model does for example, and be not to be qualification to the execution mode of the utility model.For the those of ordinary skill in affiliated field, on the basis of above-mentioned explanation, can also make other multi-form variation and changes.Here can't give exhaustive to all execution modes.Conspicuous variation that every technical scheme that belongs to the utility model is amplified out or change still are in the row of the protection range of the utility model.
Claims (4)
1. the control circuit that crashes of the anti-CPU of a mine-used frequency-converter; It is characterized in that: comprise pulse signal (EN-PWM2), resistance (R196) and electric capacity (C153); Shown in pulse signal (EN-PWM2) be connected with the I/O mouth of CPU; Be input to the in-phase input end of comparator (LM339) through said resistance (R196) and said electric capacity (C153); The in-phase input end that the output signal passes through filtering and comparator (LM339) again is connected; Relatively export the output pulse signal (EN-PWM3) through the reverse back of reverser (74HC14), as allowing or forbid the control signal that insulated gate bipolar transistor (IGBT) is exported, this control signal is controlled the conducting and the shutoff of insulated gate bipolar transistor (IGBT) with other signals.
2. control circuit as claimed in claim 1 is characterized in that: the pulse signal that process said resistance (R196) and electric capacity (C153) are input to the comparator in-phase input end also is the pulse signal of high-low level.
3. according to claim 1 or claim 2 control circuit is characterized in that: when the pulse that is input to the comparator in-phase input end is high level, charge to electric capacity (C183) through resistance (R183), diode (D28).
4. according to claim 1 or claim 2 control circuit, it is characterized in that: when the pulse that is input to the comparator in-phase input end was low level, electric capacity (C183) discharged through resistance (R179).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204300670U CN202503432U (en) | 2011-11-03 | 2011-11-03 | CPU crashing prevention control circuit of mining frequency converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204300670U CN202503432U (en) | 2011-11-03 | 2011-11-03 | CPU crashing prevention control circuit of mining frequency converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202503432U true CN202503432U (en) | 2012-10-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011204300670U Expired - Fee Related CN202503432U (en) | 2011-11-03 | 2011-11-03 | CPU crashing prevention control circuit of mining frequency converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202503432U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104901279A (en) * | 2015-03-03 | 2015-09-09 | 无锡艾柯威科技有限公司 | Frequency conversion module protection circuit and protection method thereof |
-
2011
- 2011-11-03 CN CN2011204300670U patent/CN202503432U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104901279A (en) * | 2015-03-03 | 2015-09-09 | 无锡艾柯威科技有限公司 | Frequency conversion module protection circuit and protection method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: WUHAN PAFEILE ELECTRIC CO., LTD. Free format text: FORMER OWNER: WUHAN TC ELECTRIC CO., LTD. Effective date: 20140430 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20140430 Address after: 430000, Hubei, East Lake Wuhan Development Zone, Optics Valley Avenue, No. 111, Optics Valley core, No., building 3, No. 306 Patentee after: Wuhan Pafeile Electric Co. Ltd. Address before: 430000 Hubei province Wuhan city Wuchang District Road No. 66 Jinsui building 19 storey block B No. 6 Patentee before: Wuhan TC Electric Co.,Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121024 Termination date: 20161103 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |