The utility model content
The purpose of the utility model solves the problems of the technologies described above, and proposes a kind of led chip group and chip module that can directly use AC power.
The purpose of the utility model will be achieved through following technical scheme:
A kind of led chip group of direct use alternating current, said chipset comprise the first sub-chipset, the second sub-chipset, the 3rd sub-chipset, the 4th sub-chipset, the 5th sub-chipset;
The said first sub-chipset and the second sub-chipset are connected in node A with metal conducting layer, and the said the 3rd sub-chipset and the 4th sub-chipset are connected in node C with metal conducting layer;
The said second sub-chipset and the 3rd sub-chipset are connected in Node B with metal conducting layer, and the said the 4th sub-chipset and the first sub-chipset are connected in node D with metal conducting layer;
The said the 5th sub-chipset is connected between node A and the node C; Said Node B and node D are the alternating current input; The sub-number of chips sum of the said first sub-chipset, the 3rd sub-chipset equate with sub-number of chips sum in the second sub-chipset, the 4th sub-chipset and each sub-chipset in sub-number of chips be at least one; Make the voltage that forms on the voltage and second of winning, forming on the 3rd sub-chipset, the 4th sub-chipset equate that chip reliability is good like this.
Preferably, the sub-number of chips in the said first sub-chipset, the second sub-chipset, the 3rd sub-chipset and the 4th sub-chipset all equates and is at least one.
Preferably, the said the 5th sub-chipset contains two sub-chips at least, is connected in series between the said sub-chip.
Preferably, the said the 5th sub-chipset contains two groups of sub-chips at least, is connected in parallel between every group of said sub-chip.Wherein, one group of sub-chip is meant the branch road that each sub-chip on each road forms in the parallel connection, and two groups of sub-chips are meant to have two branch roads at least.
Preferably, every group of sub-chip comprises that at least two sub-chips are connected in series.
Preferably, the sub-number of chips that contains in said every group of sub-chip equates.The voltage that makes every group of sub-chip form equates better reliability.
Preferably, said sub-chip comprises epitaxial loayer, transparency conducting layer, the passivation layer that is formed on successively on the substrate, and described epitaxial loayer comprises N layer, quantum well layer and the P layer that forms successively, and said transparency conducting layer covers said P layer.
Preferably, described P layer is the P-GaN layer, and described N layer is the N-GaN layer.
Preferably, a kind of led chip module of direct use AC power, said led chip module directly uses the led chip group serial or parallel connection or the series-parallel connection of alternating current to form by above-described any one.
The beneficial effect of the utility model is mainly reflected in: the utility model led chip module has the higher composing and the flexibility of use; Can directly use alternating current or direct current as power supply; Simultaneously can directly reach any working voltage and brightness through many combinations to chipset or sub-chipset; Thereby can directly insert the 220V civil power, make things convenient for LED encapsulation and the production of LED light fixture, save and produce and use cost.
Embodiment
The utility model has disclosed a kind of led chip group of direct use alternating current, and said led chip group is to be that base unit is formed rectification circuit with sub-chipset.As shown in Figure 1, said chipset comprises first sub-chipset 101, the second sub-chipset 102, the three sub-chipset 103, the four sub-chipset 104, the five sub-chipsets 105;
The said first sub-chipset 101 and the second sub-chipset 102 are connected in node A with metal conducting layer, and the said the 3rd sub-chipset 103 and the 4th sub-chipset 104 are connected in node C with metal conducting layer;
The said second sub-chipset 102 and the 3rd sub-chipset 103 are connected in Node B with metal conducting layer, and the said the 4th sub-chipset 104 and the first sub-chipset 101 are connected in node D with metal conducting layer;
The said the 5th sub-chipset 105 is connected between node A and the node C; Said Node B and node D are the alternating current input, the sub-number of chips sum of said the one or three sub-chipset equate with sub-number of chips sum in the second, the 4th sub-chipset and each sub-chipset in sub-number of chips be at least one.For example, include a sub-chip in the first sub-chipset 101, include two sub-chips in the 3rd sub-chipset 103, simultaneously, the second sub-chipset 102 includes two sub-chips, includes a sub-chip in the 3rd sub-chipset 103.Like this, when electrified light emitting, two line voltage distributions are identical, thereby have better reliability.
Further, the sub-number of chips in said first sub-chipset 101, second sub-chipset the 102, the 3rd sub-chipset 103 and the 4th sub-chipset 104 all equates and is at least one.For example, the sub-chip in the first, second, third, fourth sub-chipset is two, makes that like this processing technology of chipset is more convenient.
The said the 5th sub-chipset 105 includes the plurality of sub chip, and the said the 5th sub-chipset 105 is composed in series by at least two sub-chips.The 5th sub-chipset 105 is made up of the plurality of sub chip, and its neutron number of chips is done corresponding adjustment according to required voltage.Certainly, as required, the 5th sub-chipset 105 can compose in parallel by two sub-chips at least, and is as shown in Figure 3.For the voltage that makes every group of sub-chip form equates, better reliability, the sub-number of chips that contains in said every group of sub-chip equates.
As shown in Figure 2, a kind of led chip module of direct use AC power, said led chip module is composed in series by a kind of led chip group of direct use alternating current.Certainly, also can the led chip module be formed in the led chip group parallel connection of directly using alternating current or series-parallel connection.In the utility model, series-parallel connection is the chipset of the existing series connection of expression, and the chipset of parallel connection is arranged again.Wherein, the separate work of each chipset.
Concrete, AC LED chip module as shown in Figure 2 includes greater than a chipset, and all chipsets are not enumerated out in the separate work of each chipset here one by one, only get near two chipsets of external weld pad and explain.Comprising first sub-chipset 201, second sub-chipset the 202, the 3rd sub-chipset the 203, the 4th sub-chipset the 204, the 5th sub-chipset 205 of first chipset, and first sub-chipset 206, second sub-chipset the 207, the 3rd sub-chipset the 208, the 4th sub-chipset the 209, the 5th sub-chipset 210 of second chipset.First sub-chipset 201, second sub-chipset the 202, the 3rd sub-chipset the 203, the 4th sub-chipset the 204, the 5th sub-chipset 205 of first chipset is made up of the plurality of sub chip, and the sub-number of chips in every group of sub-chipset is done corresponding adjustment according to required voltage;
The N utmost point of the N utmost point of the first sub-chipset 201 of first chipset, the P utmost point of the 5th sub-chipset 205 and the second sub-chipset 202 is connected in node A jointly by metal conducting layer; The P utmost point of the second sub-chipset 202 of first chipset and the N utmost point of the 3rd sub-chipset 203 are connected in Node B by metal conducting layer; The P utmost point of the P utmost point of the 3rd sub-chipset 203 of first chipset, the N utmost point of the 5th sub-chipset 205 and the 4th sub-chipset 204 is connected in node C jointly by metal conducting layer; The N utmost point of the 4th sub-chipset 204 of first chipset is connected in node D with the P utmost point of the son second sub-chipset 202 by metal conducting layer, and node D is the input of AC power, and Node B is to link to each other with the input of another chipset.
Identical; First sub-chipset 206, second sub-chipset the 207, the 3rd sub-chipset the 208, the 4th sub-chipset the 209, the 5th sub-chipset 210 of second chipset is made up of the plurality of sub chip, and the sub-number of chips in every group of sub-chipset is done corresponding adjustment according to required voltage;
Identical with the sub-chipset connection of first chipset, the N utmost point of the N utmost point of the first sub-chipset 206 of second chipset, the P utmost point of the 5th sub-chipset 210 and the second sub-chipset 207 is connected in node E jointly by metal conducting layer; The N utmost point of the P utmost point of the second sub-chipset 207 and the 3rd sub-chipset 208 is connected in node F by metal conducting layer; The P utmost point of second chipset the 3rd sub-chipset 208, the N utmost point of the 5th sub-chipset 210 and the P utmost point of the 4th sub-chipset 209 are connected in node G jointly by metal conducting layer; The N utmost point of the 4th sub-chipset 209 of second chipset and the P utmost point of the first sub-chipset 206 are connected in node H by metal conducting layer, node F be AC power another input, node H links to each other with the input of another chipset.
Fig. 3 is as another embodiment circuit diagram of the utility model; The following specifically describes: this AC LED chip module comprises a chipset, comprising first sub-chipset 301, second sub-chipset the 302, the 3rd sub-chipset the 303, the 4th sub-chipset the 304, the 5th sub-chipset 305.The sub-number of chips of first, second, third, fourth sub-chipset all is one, and the sub-number of chips of the 5th sub-chipset 305 is two and plural arbitrary integer.
The N utmost point of the P utmost point of the N utmost point of the first sub-chipset 301, the 5th sub-chipset 305 and the second sub-chipset 302 is connected in node A jointly by metal conducting layer; The N utmost point of the P utmost point of the second sub-chipset 302 and the 3rd sub-chipset 303 is connected in Node B by metal conducting layer; The P utmost point of the N utmost point of the P utmost point of the 3rd sub-chipset 303, the 5th sub-chipset 305 and the 4th sub-chipset 304 is connected in node C jointly by metal conducting layer; The P utmost point of the N utmost point of the 4th sub-chipset 304 and the first sub-chipset 301 is connected in node D by metal conducting layer; Node B and node D are the input of AC power.
The chip of the 5th sub-chipset 305 has at least the P utmost point of two sub-chips extremely to link to each other with P, has at least the N utmost point of two sub-chips extremely to link to each other with N simultaneously.The sub-chip that the 5th sub-chipset 305 is connected with node A all is that the P utmost point links to each other with node A, and the N utmost point extremely links to each other with the P of next sub-chip, and the sub-chip that links to each other with node C all is that the N utmost point links to each other with node C, and the P utmost point extremely links to each other with the N of next sub-chip.
Below the concise and to the point preparation method of the led chip module of the utility model down that sets forth:
As shown in Figure 4, be followed successively by metal conducting layer 401, transparency conducting layer 402, passivation layer 403, P-GaN 404, SQW 405, N-GaN 406, substrate 407 from top to down.
More than all embodiment neutron chip equivalent layers all simultaneously the growth, its chip aspect manufacturing approach is mainly:
Step 1, elder generation epitaxial growth N-GaN 406, SQW 405 and P-GaN 404 on substrate 407 become complete LED structure extension sheet.
Step 2, on P-GaN 404 surfaces, utilize photoresist or other dielectric layer to make mask, with the corrosion or the method for dry etching, expose N-GaN 406.
The method deposit transparent conductive layer of step 3, employing vapour deposition utilizes photoresist to make mask, with the method for corrosion or dry etching, obtains the transparency conducting layer 402 that needs.
Step 4, utilize the method for photoetching and vapour deposition to obtain metal conducting layer 401.
Utilize photoetching to make mask after step 5, the metallization medium layer, use the method for corrosion or dry etching to obtain required passivation layer 403.
The utility model still has numerous embodiments, and all employing equivalents or equivalent transformation and all technical schemes of forming all drop within the protection range of the utility model.