CN202267957U - Interrupt expansion circuit in communication device - Google Patents
Interrupt expansion circuit in communication device Download PDFInfo
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- CN202267957U CN202267957U CN2011203626610U CN201120362661U CN202267957U CN 202267957 U CN202267957 U CN 202267957U CN 2011203626610 U CN2011203626610 U CN 2011203626610U CN 201120362661 U CN201120362661 U CN 201120362661U CN 202267957 U CN202267957 U CN 202267957U
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Abstract
The utility model provides an interrupt expansion circuit in a communication device, which comprises an interrupt trigger circuit, a pull-up and pull-down resistor, a central processing unit (CPU) interrupt input interface interrupt request (IRQ) of the communication device and a general purpose input/output (GPIO) interface of the communication device. The interrupt trigger circuit is connected with the pull-up and pull-down resistor, the output end of the interrupt trigger circuit is connected with the CPU interrupt input interface IRQ of the communication device, and the input end of the interrupt trigger circuit is connected with the GPIO interface of the communication device. The interrupt expansion circuit in the communication device does not add an interrupt expansion chip with expensive cost, and can be achieved simply through an AND function logic circuit or an OR function logic circuit. Compared with a traditional interrupt software polling mechanism, the interrupt expansion circuit in the communication device can greatly save resources of the communication device, and is low in cost and high in efficiency.
Description
[technical field]
The utility model relates to the communication apparatus technical field, particularly a kind of interruption expanded circuit of communication apparatus.
[background technology]
In the communication apparatus technical field because the pressure of cost, the cpu i/f resource-constrained of communication apparatus, the interrupt interface resource is especially nervous, actual design the not enough situation of interrupt resources often occurs in using, this just need expand interrupt interface.The interruption expansion of the CPU of communication apparatus mainly contains dual mode, a kind of interruption extended chip that is to use special use; The cost that extended chip is interrupted in its utilization is than higher.Another kind is to interrupt with common GPIO (general input/output interface) software simulation, and the mode through the uninterrupted inquiry in real time of software communication apparatus GPIO Interface status realizes that signal intercepts, thereby realizes interrupt function; Its this kind judges through the uninterrupted real time polling GPIO of software Interface status whether interruption triggers; Do like this and taken software and system resource greatly; Cause system effectiveness low; And receive the influence of polling cycle length, the risk that also possibly exist interrupt trigger signal to catch influences the reliability of system.
[summary of the invention]
The technical matters that the utility model will solve is to provide a kind of interruption expanded circuit of communication apparatus of low-cost high-efficiency.
The utility model is achieved in that a kind of interruption expanded circuit of communication apparatus, comprises the down trigger circuit, goes up the CPU interruption input interface IRQ (interrupt request) of pull down resistor, communication apparatus and the GPIO interface of communication apparatus; Said down trigger circuit is connected with the said pull down resistor of going up; The output terminal of said down trigger circuit interrupts input interface IRQ with the CPU of said communication apparatus and is connected; The input end of said down trigger circuit is connected with the GPIO interface of said communication apparatus.
Further, said down trigger circuit is the AND function logical circuit that has two input ends, an output terminal.The said pull down resistor of going up comprises resistance R 1, resistance R 2, resistance R 3; One end of said resistance R 1 is connected with an input end of said AND function logical circuit, and the other end of said resistance R 1 is connected with the supply voltage feeder ear; One end of said resistance R 2 is connected with another input end of said AND function logical circuit, and the other end of said resistance R 2 is connected with the supply voltage feeder ear; One end of said resistance R 3 is connected with the output terminal of said AND function logical circuit; The other end of said resistance R 3 is connected with the supply voltage feeder ear; Another input end of said AND function logical circuit is connected with the GPIO interface of said communication apparatus.
Further, said down trigger circuit is the OR function logical circuit that has two input ends, an output terminal.The said pull down resistor of going up comprises resistance R 4, resistance R 5, resistance R 6; One end of said resistance R 4 is connected with an input end of said OR function logical circuit, and the other end of said resistance R 4 is connected with power ground point; One end of said resistance R 5 is connected with another input end of said OR function logical circuit, and the other end of said resistance R 5 is connected with power ground point; One end of said resistance R 6 with said or " output terminal of functional logic circuit is connected; The other end of said resistance R 6 is connected with power ground point; Said or " another input end of functional logic circuit is connected with the GPIO interface of said communication apparatus.
The advantage of the utility model is: the utility model utilization can realize that the simple logic circuit of AND function (the down trigger circuit that low level triggers) or OR function (the down trigger circuit that high level triggers) sends interrupt request to the system of communication apparatus, and it uses the acquiescence level that pull down resistor is confirmed its simple logic circuit; And make auxiliaryly of the port that the GPIO interface of communication apparatus or other can identification signal change, realize the system break expansion of communication apparatus.The utility model can be saved the resource of communication apparatus system greatly, is a kind of interruption expanded circuit of low-cost high-efficiency.
[description of drawings]
Fig. 1 is the structural representation of the utility model.
Fig. 2 is the structural representation of the utility model first embodiment.
Fig. 3 is the structural representation of the utility model second embodiment.
[embodiment]
See also shown in Figure 1, the interruption expanded circuit of the communication apparatus of the utility model, the GPIO interface that comprise the down trigger circuit, go up pull down resistor, the CPU of communication apparatus interrupts input interface IRQ and communication apparatus; Said down trigger circuit is connected with the said pull down resistor of going up; It uses the acquiescence level that pull down resistor is confirmed its simple logic circuit; The output terminal of said down trigger circuit interrupts input interface IRQ with the CPU of said communication apparatus and is connected; The input end of said down trigger circuit is connected with the GPIO interface of said communication apparatus.
As shown in Figure 2, be the structural representation of first embodiment of the utility model.Said down trigger circuit is that (its AND function logical circuit can be that integrated IC realizes to the AND function logical circuit that has two input ends, an output terminal; Also can realize combinational circuit with discrete component like diode, triode etc.; Also can be AND realization etc.).The said pull down resistor of going up comprises resistance R 1, resistance R 2, resistance R 3; One end of said resistance R 1 is connected with an input end of said AND function logical circuit, and the other end of said resistance R 1 is connected with supply voltage feeder ear (VCC); One end of said resistance R 2 is connected with another input end of said AND function logical circuit, and the other end of said resistance R 2 is connected with the supply voltage feeder ear; One end of said resistance R 3 is connected with the output terminal of said AND function logical circuit; The other end of said resistance R 3 is connected with the supply voltage feeder ear; Another input end of said AND function logical circuit logical circuit is connected with the GPIO interface of said communication apparatus.
As shown in Figure 3, be the structural representation of second embodiment of the utility model.Said down trigger circuit is that (its OR function logical circuit can be that integrated IC realizes to the OR function logical circuit that has two input ends, an output terminal; Also can realize combinational circuit with discrete component like diode, triode etc.; Also can be or gate logic realization etc.).The said pull down resistor of going up comprises resistance R 4, resistance R 5, resistance R 6; One end of said resistance R 4 is connected with an input end of said OR function logical circuit, and the other end of said resistance R 4 is connected with power ground point (GND); One end of said resistance R 5 is connected with another input end of said OR function logical circuit, and the other end of said resistance R 5 is connected with power ground point; One end of said resistance R 6 is connected with the output terminal of said OR function logical circuit; The other end of said resistance R 6 is connected with power ground point; Said or " another input end of functional logic circuit is connected with the GPIO interface of said communication apparatus.
The concrete extension mechanism of the utility model expanded circuit is following:
Low (height) level down trigger circuit: when IRQ0 or IRQ1 (its IRQ0 and IRQ1 are the signal sources of external trigger) appearance low (height) level; Trigger " with " (" or ") functional logic circuit output changes; IRQ then also becomes low (height) level, and the system break of communication apparatus is triggered.The system of communication apparatus judges through monitoring look-at-me on corresponding GPIO interface or other identification ports that to interrupt be to be produced by IRQ0 or IRQ1, thereby calls different interrupt service routines; It uses the acquiescence level that pull down resistor (resistance R 1, resistance R 2, resistance R 3 or resistance R 4, resistance R 5, resistance R 6) is confirmed its simple logic circuit.The utility model need not to add the expensive interruption extended chip of cost, does not need the uninterrupted real-time listening GPIO of software Interface status; Only need the logical circuit of simple AND function logical circuit or OR function logical circuit just can realize interrupting expanded circuit; It receives that the state of a GPIO interface of inquiry after the look-at-me of IRQ0 or IRQ1 can realize the judgement of concrete interrupt source.
The above is merely the preferred embodiment of the utility model, and all equalizations of being done according to the utility model claim change and modify, and all should belong to the covering scope of the utility model.
Claims (5)
1. the interruption expanded circuit of a communication apparatus is characterized in that: comprise the down trigger circuit, go up the CPU interruption input interface IRQ of pull down resistor, communication apparatus and the GPIO interface of communication apparatus; Said down trigger circuit is connected with the said pull down resistor of going up; The output terminal of said down trigger circuit interrupts input interface IRQ with the CPU of said communication apparatus and is connected; The input end of said down trigger circuit is connected with the GPIO interface of said communication apparatus.
2. the interruption expanded circuit of communication apparatus according to claim 1, it is characterized in that: said down trigger circuit is the AND function logical circuit that has two input ends, an output terminal.
3. the interruption expanded circuit of communication apparatus according to claim 1, it is characterized in that: said down trigger circuit is the OR function logical circuit that has two input ends, an output terminal.
4. the interruption expanded circuit of communication apparatus according to claim 2 is characterized in that: the said pull down resistor of going up comprises resistance R 1, resistance R 2, resistance R 3; One end of said resistance R 1 is connected with an input end of said AND function logical circuit, and the other end of said resistance R 1 is connected with the supply voltage feeder ear; One end of said resistance R 2 is connected with another input end of said AND function logical circuit, and the other end of said resistance R 2 is connected with the supply voltage feeder ear; One end of said resistance R 3 is connected with the output terminal of said AND function logical circuit; The other end of said resistance R 3 is connected with the supply voltage feeder ear; Another input end of said AND function logical circuit is connected with the GPIO interface of said communication apparatus.
5. the interruption expanded circuit of communication apparatus according to claim 3 is characterized in that: the said pull down resistor of going up comprises resistance R 4, resistance R 5, resistance R 6; One end of said resistance R 4 is connected with an input end of said OR function logical circuit, and the other end of said resistance R 4 is connected with power ground point; One end of said resistance R 5 is connected with another input end of said OR function logical circuit, and the other end of said resistance R 5 is connected with power ground point; One end of said resistance R 6 is connected with the output terminal of said OR function logical circuit; The other end of said resistance R 6 is connected with power ground point; Another input end of said OR function logical circuit is connected with the GPIO interface of said communication apparatus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203626610U CN202267957U (en) | 2011-09-23 | 2011-09-23 | Interrupt expansion circuit in communication device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011203626610U CN202267957U (en) | 2011-09-23 | 2011-09-23 | Interrupt expansion circuit in communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202267957U true CN202267957U (en) | 2012-06-06 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011203626610U Expired - Fee Related CN202267957U (en) | 2011-09-23 | 2011-09-23 | Interrupt expansion circuit in communication device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202267957U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110618634A (en) * | 2019-09-27 | 2019-12-27 | 深圳市云慧联科技有限公司 | 485 communication interface expansion device and communication method |
-
2011
- 2011-09-23 CN CN2011203626610U patent/CN202267957U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110618634A (en) * | 2019-09-27 | 2019-12-27 | 深圳市云慧联科技有限公司 | 485 communication interface expansion device and communication method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120606 Termination date: 20190923 |