CN202261268U - Analog device of transponder information receiving system and testing system thereof - Google Patents
Analog device of transponder information receiving system and testing system thereof Download PDFInfo
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- CN202261268U CN202261268U CN2011203487923U CN201120348792U CN202261268U CN 202261268 U CN202261268 U CN 202261268U CN 2011203487923 U CN2011203487923 U CN 2011203487923U CN 201120348792 U CN201120348792 U CN 201120348792U CN 202261268 U CN202261268 U CN 202261268U
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Abstract
The utility model provides an analog device of a transponder information receiving system, which comprises an acquisition unit, a central processing unit and a sending unit. The acquisition unit can output messages for testing the transponder information receiving system, the central processing unit can receive the messages and output the messages to the sending unit, and the central processing unit enables the messages to be sent to a decoding module of the transponder information receiving system through the sending unit. The analog device of business transaction management (BTM) can automatically control the sending unit to complete sending of the messages through a central control unit, and can accurately simulate actual working condition of the BTM. Simultaneously the length of message data sent to a decoding plate can be set according to requirements, the data length of the messages to be sent is accurately controlled by the central control unit, and the analog device of the BTM can conveniently preset or change the messages in the acquisition unit and can be operated for a long time.
Description
Technical field
The utility model relates to a kind of analogue means that is used for transfer of data, relates in particular to a kind of analogue means that is used for railway transponder information receiving system, and uses the test macro of this analogue means.
Background technology
Transponder information receiving system (hereinafter to be referred as BTM) is the important composition in the train driving control system.BTM comprises a receiver module, a decoder module, a communication module, a sending module and a supply module.Receiver module can receive the message that sends from ground transponder through antenna, and sends these messages to decoder module.Decoder module flows to train computer (VC) through communication module after with these message decoding processing and uses.BTM is in actual use owing to reasons such as side lobe effect and interference; Make decoder module and communication module can break down once in a while; Cause losing a phenomenon; Therefore need a kind of testing apparatus that is specifically designed to decoder module and communication module, accomplish searching and analyzing of decoder module and communication module fault, and then accomplish optimal design the software and hardware of decoder module and communication module through this testing apparatus.The testing apparatus of BTM need possess following function:
1, receives the starting command that decoding deck sends, and correctly return corresponding state information, accomplish the normal startup of BTM;
2, ground transponder is received in simulation, sends and specifies message information to give decoding deck;
3, simulated failure situation is sent fault status information and is given decoding deck;
4, the simulation different trains speed of service changes the initial data length that sends to decoding deck.
After the normal startup of BTM, pass through transponder thereby simulate train through manual method brush transponder in the existing method of testing, it is normal that the BTM operation shows then that normally decoder module and communication module move.This method of testing is the functional test to the BTM overall performance, and it is slow manually to brush transponder speed, and decoding deck receives that data are more than actual motion, therefore can not simulate practical operation situation; Manually the brush transponder can not be controlled the length that sends to the decoding deck data; Consume manpower, impossible long-play; Be inconvenient to change the transponder message information.
The utility model content
The purpose of the utility model provides a kind of analogue means of transponder information receiving system, accurately the real work situation of analog answer device information receiving system.
Another purpose of the utility model provides a kind of detection system of using the analogue means of above-mentioned transponder information receiving system, can accomplish the detection of decoder module and communication module in the transponder information receiving system accurately and reliably.
The utility model provides a kind of analogue means of transponder information receiving system to comprise an acquiring unit, a CPU and a transmitting element.Wherein, the exportable message that is used to test the transponder information receiving system of acquiring unit.CPU can receive message, and exports message to transmitting element, and CPU can be sent to message the decoder module of transponder information receiving system through transmitting element.The analogue means of BTM is controlled the transmission that transmitting element is accomplished message automatically through central control unit, can accurately simulate the real work situation of BTM.The length of the message data that is sent to decoding deck can be set simultaneously as required; And accurately control the data length that sends message by central control unit; The analogue means of BTM is can also be in acquiring unit preset easily or change message, and analogue means that can long-play BTM.
In another schematic execution mode of the analogue means of transponder information receiving system, the transmitting element of the analogue means of transponder information receiving system comprises a receiver module, a sending module and a state machine.Wherein, acquiring unit can be exported a plurality of messages, and receiver module can receive each message that CPU is sent, and each message handled obtains test packet.Sending module can send each test packet to decoder module.Each test packet that state machine can be controlled after sending module is handled receiver module sends to decoder module according to the sequencing that receiver module receives a message.
In the another kind of schematically execution mode of the analogue means of transponder information receiving system, receiver module comprises a bus interface mouthpart and a data transducer.The bus interface mouthpart is used to receive each message that CPU is sent, and these messages are the parallel data form.The message of these parallel forms that data converter is used for bus receiver is obtained converts the test packet of serial data format into.
In another schematic execution mode of the analogue means of transponder information receiving system; The bus interface mouthpart can receive message by notify status machine data transducer, and the bus interface mouthpart also is sent to said state machine with its sequencing that receives message simultaneously.
In another schematic execution mode of the analogue means of transponder information receiving system, transmitting element also comprises at least two memories, at least two derailing switches and a time schedule controller.Memory is used for preserving each test packet that data converter obtains respectively, and memory can send the test packet of storage to decoder module.Derailing switch is arranged on the path between memory and the decoder module.But time schedule controller is connected with the derailing switch signal, and derailing switch can read the test packet in the memory, and time schedule controller controllable switch device is sent to decoder module with test packet according to the standard speed of a setting.State machine control switch device receives each test packet of storing in the sequencing clearance memory of each message to decoder module according to receiver module.Derailing switch can also be arranged on the path between memory and the receiver module, can control test packet through derailing switch and get into memory, and the test packet that gets into memory can be sent to decoder module.
In another schematic execution mode of the analogue means of transponder information receiving system, sending module also comprises a signal controller.Time schedule controller can also generate with corresponding clock information of each test packet and enable information and be sent to state machine.State machine is further used for clock information and enable information are sent to signal controller.Signal controller will be corresponding with each test packet enable signal and clock signal be sent to decoder module simultaneously so that decoder module can with reference to enable signal and clock signal to receive the test packet decoding.
In another schematic execution mode of the analogue means of transponder information receiving system, but transmitting element also comprises an input and output device that is connected with the state machine signal, and it can be communicated by letter with communication module, the decoder module of transponder receiving system.
In another schematic execution mode of the analogue means of transponder information receiving system, but transmitting element also comprises a timer that is connected with the state machine signal, and it can limit the operating time of analogue means.
In another schematic execution mode of the analogue means of transponder information receiving system, transmitting element is realized by programmable gate array, and/or CPU is realized by digital signal processor.
In another schematic execution mode of the analogue means of transponder information receiving system, analogue means also comprises one first converting unit and/or one second converting unit derailing switch.But derailing switch and/or signal controller are connected with the decoder module signal through first converting unit; First converting unit can be carried out digital-to-analogue conversion to the communication data between the analogue means decoder module; But second converting unit links to each other with the state machine signal, can carry out digital-to-analogue conversion to the communication data between the computer terminal outside analogue means and the analogue means.
In another schematic execution mode of the analogue means of transponder information receiving system; Analogue means also comprises one first transceiver; But first transceiver is connected with the first converting unit signal, first transceiver can with the decoder module communication, accomplish with the order of decoder module and shake hands; And/or whether the state that first transceiver can test simulator is normal.
The utility model also provides a kind of decoder module of transponder information receiving system, comprises the communication module of the decoder module of a BTM, a BTM, an above-mentioned analogue means and a host computer.But analogue means is connected with the decoder module signal, but decoder module be connected with the communication module signal, but and communication module be connected with the host computer signal.
The utility model also provides a kind of decoder module of transponder information receiving system, comprises the communication module of the decoder module of a BTM, a BTM, a host computer, an above-mentioned analogue means and a test computer.But test computer is connected with the analogue means signal; But analogue means is connected with the decoder module signal; But decoder module is connected with the communication module signal, but and communication module be connected and the exportable message that is used to test the transponder information receiving system of test computer with the host computer signal.
Hereinafter will be with clear and definite understandable mode, the accompanying drawings preferred embodiment, and above-mentioned characteristic, technical characterictic, advantage and the implementation thereof of the analogue means of transponder information receiving system and test macro thereof further specify.
Description of drawings
Following accompanying drawing is only done schematic illustration and explanation to the utility model, does not limit the scope of the utility model.
Fig. 1 has shown the structural representation of a kind of exemplary embodiment of analogue means of BTM.
Fig. 2 has shown the structural representation of the another kind of exemplary embodiment of analogue means of BTM.
Fig. 3 has shown the structural representation of another exemplary embodiment of analogue means of BTM.
Fig. 4 has shown the structural representation of another exemplary embodiment of analogue means of BTM.
Fig. 5 has shown the structural representation of a kind of exemplary embodiment of test macro of the analogue means that uses BTM.
Fig. 6 has shown the structural representation of the another kind of exemplary embodiment of test macro of the analogue means that uses BTM.
Label declaration
10 analogue means
20 CPU
30 transmitting elements
40 receiver modules
50 acquiring units
52 state machines
60 sending modules
70 decoder modules
42 bus interface mouthparts
44 data converters
64 memories
66 derailing switches
92 first transceivers
68 signal controllers
80 input and output devices
62 time schedule controllers
88 display units
90 first converting units
94 second conversion units
82 timers
84 addressing devices
96 second transceivers
86 display controllers
70 decoder modules
72 communication modules
74 host computers
76 test computers
Embodiment
Understand for technical characterictic, purpose and effect to utility model have more clearly, contrast the embodiment of description of drawings the utility model at present.
For making drawing succinct, only schematically shown out the part relevant among each figure with the utility model, they do not represent its practical structures as product.In addition, so that drawing succinctly is convenient to understand, the parts that in some figure, have same structure or function have only schematically illustrated one of them, or have only marked one of them.
Fig. 1 is the structural representation of a kind of exemplary embodiment of analogue means of BTM.As shown in the figure, the analogue means 10 of transponder information receiving system comprises an acquiring unit 50, a CPU 20 and a transmitting element 30.Wherein, The acquiring unit 50 exportable messages that are used to test the transponder information receiving system; In a kind of exemplary embodiment of the analogue means of BTM; This deriving means is a memory, and this memory stores the message that is used to test in advance, but deriving means can also obtain message from the mode of the outside PC terminal incoming message of the analogue means of BTM.CPU 20 can receive message, and exports message to transmitting element 30, and CPU can be sent to message the decoder module 70 of transponder information receiving system through transmitting element.
The analogue means of BTM is controlled the transmission that transmitting element is accomplished message automatically through central control unit, can accurately simulate the real work situation of BTM.The length of the message data that is sent to decoder module can be set simultaneously as required; And accurately control the data length that sends message by central control unit; The analogue means of BTM is can also be in acquiring unit preset easily or change message, and analogue means that can long-play BTM.
Fig. 2 is the structural representation of the another kind of exemplary embodiment of analogue means of BTM.As shown in the figure, the transmitting element 30 of the analogue means 10 of transponder information receiving system comprises a receiver module 40, a sending module 60 and a state machine 52.Wherein, acquiring unit 50 can be exported a plurality of messages, and receiver module 40 can receive each message that CPU 20 is sent, and each message is handled respectively.Sending module 60 can send each message to decoder module 70.Each message that state machine 52 can be controlled after sending module 60 is handled receiver module 40 sends to decoder module 70 according to the sequencing that receiver module 40 receives each message.
Fig. 3 has shown the structural representation of another exemplary embodiment of analogue means of BTM.As shown in the figure, receiver module 40 comprises a bus interface mouthpart 42 and a data transducer 44.Bus interface mouthpart 42 is used to receive each message that CPU 20 is sent, and these messages are the parallel data form.The message of these parallel forms that data converter 44 is used for bus interface mouthpart 42 is obtained converts the test packet of serial data format into.The test packet that state machine 52 is used to control the serial form after sending module 60 is changed these sends to decoder module 70.
As shown in Figure 3, sending module also comprises two memories 64, two derailing switches 66 and time schedule controllers 62.Memory 64 is used for preserving each test packet that data converter 44 obtains respectively, and memory 64 can send the test packet of storage to decoder module 70.Derailing switch 66 is arranged on the path between memory 64 and the decoder module 70.Derailing switch 66 can read the test packet in the said memory 64, and time schedule controller 62 controllable switch devices 66 are sent to decoder module 70 with test packet according to the standard speed of a setting.State machine 52 control sending modules 60 send to decoder module 70 with each test packet according to the sequencing that receiver module 40 receives each message.The number of memory 64 can be confirmed according to the quantity of the transponder message of required storage, can increase the quantity of memory 64 according to actual conditions as required.Simultaneously, memory can be several memory blocks independently, as long as under the situation that does not exceed total memory figure place capacity, can freely split into a lot of individual little memory blocks, when compilation and synthesis, is redistributed by composing software.Derailing switch can also be arranged on the path between memory and the receiver module, can control test packet through derailing switch and get into memory, and the test packet that gets into memory can be sent to decoder module.
As shown in Figure 3, sending module also comprises a signal controller 68.Time schedule controller can also generate with corresponding clock information of each test packet and enable information and be sent to state machine 52; Wherein whether enable information represents this test packet effective, and the clock information representative synchronised clock corresponding with the test packet transmission rate.State machine 52 is further used for clock information and enable information are sent to signal controller.Signal controller will be corresponding with each test packet enable signal and clock signal synchronized transmission to decoder module; So that decoder module can receive and an enable signal and a clock signal that test packet is corresponding simultaneously, decoder module with reference to enable signal and clock signal to receive the test packet decoding.
As shown in Figure 3, but state machine 52 is connected with bus interface mouthpart 42, data converter 44, derailing switch 66, clock switch device 62 and signal controller 68 signals respectively.But the state machine 52 of transmitting element 30 is connected with central processing unit 20 signals through bus interface mouthpart 42 with data converter 44.But data converter 44 is connected with memory 64 signals, but derailing switch 66 is connected with time schedule controller 62 signals with memory 64 respectively.But the derailing switch 66 of transmitting element 30 can be connected with decoder module 70 signals respectively with signal controller 68.
In the analogue means 10 of BTM; State machine 52 is the control core of whole transmitting element 30, and its function comprises the sequence of movement that can communicate by letter and control them respectively with bus interface mouthpart 42, data converter 44, derailing switch 66, time schedule controller 62 and signal controller 68.
When beginning to test, at first be that BTM powers on, because the analogue means 10 of BTM uses identical power supply buses with BTM, after BTM powered on, the analogue means 10 of BTM is electrifying startup simultaneously like this.Behind analogue means 10 electrifying startups of BTM, CPU 20 is sent enabling signal to the state machine 52 of transmitting element 30.
Whole analogue means 10 started after state machine 52 received enabling signal; Then CPU 20 begins from acquiring unit 50, to extract one by one message; And message is sent to data converter 44 through bus interface mouthpart 42; Bus interface mouthpart 42 notify status machines 52 data converters 44 have received message simultaneously, and the sequencing that while bus interface mouthpart 42 also will receive message is sent to state machine 52.After this, state machine 52 control data transducers 44 convert the message of parallel data form the test packet of serial form into, and are stored in one by one in the corresponding memory 64.
After accomplishing the storage one by one of message information, time schedule controller 62 begins through the test packet in derailing switch 66 regular each memory 64 and obtains test packet, generates and corresponding enable signal of each test packet and clock signal simultaneously.Time schedule controller 62 returns to state machine 52 with the enable signal and the clock signal of each test packet.
After state machine 52 received the enable signal and clock signal from time schedule controller 62, enable signal and clock signal that these and different test packets are corresponding were sent to signal controller 68.Afterwards; State machine 52 beginnings receive the sequencing of message according to data converter 44; Test packet after control switch device 66 clearance one by one is regular to decoder module 70, state machine 52 clock signal and enable signal that also control signal controller 68 synchronously will be corresponding with each test packet is sent to decoder module 70 simultaneously.
In a kind of exemplary embodiment of the analogue means of BTM, CPU 20 can use digital signal processor (DSP) to realize, and transmitting element 30 can use programmable gate array (FPGA) to realize.Use DSP and FPGA can simplify the exploitation and the regular maintenance process of whole analogue means.
Fig. 4 has shown the structural representation of another exemplary embodiment of analogue means of BTM.As shown in Figure 4, transmitting element 30 also comprises an input and output device 80, but it can be connected with state machine 52 signals.In the transponder information receiving system; Analogue means 10 quite plays the effect of receiver module and sending module in the former transponder information receiving system; In the start-up course of transponder information receiving system; The receiver module of transponder information receiving system, decoder module, communication module, sending module can be worked in coordination with startup self-detection, through input and output device is set, can simulate the self-test signal that receives decoder module and communication module; And the self-test signal of simulation sending/receiving module and sending module, make the transponder information receiving system normally to start.
As shown in Figure 4, but transmitting element 30 also comprises a timer 82 that is connected with state machine 52 signals.Timer 82 provides whole analogue means required timing function; Promptly limit the operating time of analogue means; Make analogue means in the time of setting, repeat to send message data to decoder module 70; Test decode module and communication module be in the display result of different time to same message, thereby can more fully more comprehensively obtain test result.
As shown in Figure 4, but transmitting element 30 also comprises an addressing device 84 that is connected with state machine 52 signals.Transmitting element 30 realized by programmable gate array (FPGA), and CPU 20 realizes by digital signal processor (DSP), but CPU can also adopt other forms of processor.Wherein programmable gate array is the circuit design of being accomplished through hardware description language (for example VHDL); It needs its outer center processing unit control could accomplish function corresponding; And addressing device 84 passes through the address slice selected control system signal of state machine 52 data converter 44, memory 64, derailing switch 66, state machine 52, time schedule controller 62 and signal controller 68 in CPU 20 output transmitting elements 30, and addressing device 84 also can be through the address slice selected control system signal of state machine 52 to CPU 20 output input and output devices 80 and timer 82.Through these address slice selected control system signals, CPU 220 can make CPU 20 dispose accordingly and to control them their map addresses in a sector address space of CPU 20.
As shown in Figure 4, transmitting element comprises that a display controller 86 and analogue means 10 also comprise a display unit 88, but display controller 86 is connected with display unit 88 signals with state machine 52 respectively.CPU 20 is according to the state to state machine 52; And the analysis of input and output device 80 input and output information; Carrying out corresponding work through display controller 86 control display units 88 instruction simulation devices 10, for example whether the BTM analogue means powers on, input and output device whether with communication module and decoding module communication etc.At the analogue means of BTM, display unit 88 is accomplished demonstration through the ground light on and off of series of LED lamp.
As shown in Figure 4, analogue means 10 also comprises one first converting unit 90 and one first transceiver 92, but in the derailing switch 66, first transceiver 92, signal controller 68 one or more all is connected with decoder module 70 signals through first converting unit 90.First converting unit 90 is the interface chip of communicating circuit, can realize the mutual conversion of digital signal and analog signal.The function of first converting unit 90 also can be integrated in analogue means or the terminal computer.When state machine 52 started, it controlled 92 startups of first transceiver, and decoder module 70 communications of 92 beginnings of first transceiver and BTM are accomplished with the order of decoder module 70 and shaken hands.First transceiver 92 can also the self check analogue means state whether normal, also be whether each function element of analogue means normal, if normal then carry out the subsequent action of analogue means, otherwise quit work.
As shown in Figure 4, analogue means 10 also comprises one second converting unit 94, and transmitting element 30 also comprises one second transceiver 96, but second transceiver 96 is connected with state machine 52 signals with second converting unit 94 respectively.Second converting unit 94 is the interface chip of communicating circuit, can realize the mutual conversion of digital signal and analog signal.Second transceiver 96 is through second converting unit 94; Be connected with pcs terminal equipment outside the analogue means 10 and receive the message that send this computer terminal; And send these information to CPU 20 through state machine 52, thereby send to message, message transmission speed and the message transmitting time of decoder module through the control of the computer terminal outside the analogue means 10.The function of second converting unit 94 also can be integrated in analogue means or the terminal computer.
Fig. 5 has shown the structural representation of a kind of exemplary embodiment of test macro of the analogue means that uses BTM.As shown in the figure, use the test macro of the analogue means 10 of BTM also to comprise the decoder module 70 of a BTM, communication module 72 and host computer 74 of a BTM.But analogue means 10 is connected with decoder module 70 signals, but decoder module 70 be connected with communication module 72 signals, but and communication module 72 be connected with host computer 74 signals.
The test macro of the analogue means of BTM as shown in Figure 5 is the off-line test of the analogue means of a kind of BTM, and after BTM powered on, analogue means 10 simulation was automatically accomplished that self check and order are shaken hands etc. and need be cooperated the startup flow process of carrying out with decoding deck.After starting end entering test mode, analogue means 10 begins the test packet of the fixed qty after handling is sent to decoder module 70 circulations.These test packets are sent to host computer 74 through after the decoding of decoder module 70 through communication module 72, can judge whether the work of BTM is normal through the message data that host computer 74 shows.Also can use car-mounted computer (VC) to replace host computer to accept the message data that communication module 74 is transmitted.
Use the test macro of the analogue means of BTM, only need carry an analogue means and host computer (if use car-mounted computer then do not need host computer) and can accomplish that BTM is on-the-spot fast and accurately to be detected.
Fig. 6 has shown the structural representation of the another kind of exemplary embodiment of test macro of the analogue means that uses BTM.As shown in the figure, use the test macro of the analogue means of BTM to comprise the communication module 72 of the decoder module 70 of a BTM, a BTM, a host computer 74 and a test computer 76.But test computer 76 is connected with analogue means 10 signals, but analogue means 10 be connected with decoder module 70 signals, but decoder module 70 be connected with communication module 72 signals, but and communication module 72 be connected with host computer 74 signals.
The test macro of the analogue means of BTM as shown in Figure 6 is the on-line testing of the analogue means of a kind of BTM, and after BTM powered on, analogue means 10 simulation was automatically accomplished that self check and order are shaken hands etc. and need be cooperated the startup flow process of carrying out with decoding deck.After starting end entering test mode, test computer 76 passes through second transceiver, the 96 control analogue means 10 of second converting unit 94 and analogue means 10 to decoder module 70 transmission test packets.These test packets are transferred to host computer 74 through after the decoding of decoder module 70 through communication module 72, can judge whether the work of BTM is normal through the message data that host computer 74 shows.
Compare with the test macro of the analogue means of the BTM shown in Fig. 5; The test macro of the analogue means of BTM shown in Figure 6 can be sent the message data of any amount by test computer, can accomplish the full test to message data, decoding software and communication software thus.
In addition, test module has the function of off-line test and on-line testing simultaneously.After test module powers on,, all can get into the off-line test pattern automatically and carry out off-line test no matter whether be connected with test computer.Get into the on-line testing pattern like need, must send online test command by test computer, this moment, the mode of operation of test module transferred online mode to by offline mode, powered up again after offline mode must be cut off the power supply to test module if need get into again.
Use the detection system of the analogue means of BTM; Message through acquiring unit is obtained shows that with train computer (VC) or other computer terminals corresponding message content relatively; Can be used for investigating mistakes such as message coding and verification, can be used for production examination, the failure diagnosis work of decoder module and communication module thus.Owing to avoided artificial intervention; Have easy and simple to handlely, test speed is fast, and transmitting element can be accomplished the control and the computing of large amount of complex simultaneously; Thereby share the operand of CPU, can greatly improve the transportation processing speed and the reliability of whole analogue means thus.
The utility model provides a kind of analogue means of transponder information receiving system to comprise an acquiring unit, a CPU and a transmitting element.Wherein, the exportable message that is used to test the transponder information receiving system of acquiring unit.CPU can receive message, and exports message to transmitting element, and CPU can be sent to message the decoder module of transponder information receiving system through transmitting element.The analogue means of BTM is controlled the transmission that transmitting element is accomplished message automatically through central control unit, can accurately simulate the real work situation of BTM.The length of the message data that is sent to decoding deck can be set simultaneously as required; And accurately control the data length that sends message by central control unit; The analogue means of BTM is can also be in acquiring unit preset easily or change message, and analogue means that can long-play BTM.
In this article, " but signal connection " can be that two direct signals between the parts connect, and can also be the indirect connection through the 3rd parts.
In this article, " schematically " expression " is served as instance, example or explanation ", should any diagram, the execution mode that be described to " schematically " in this article be interpreted as a kind of preferred or have more the technical scheme of advantage.
Be to be understood that; Though this specification is described according to each embodiment; But be not that each embodiment only comprises an independently technical scheme, this narrating mode of specification only is for clarity sake, and those skilled in the art should make specification as a whole; Technical scheme among each embodiment also can form other execution modes that it will be appreciated by those skilled in the art that through appropriate combination.
The listed a series of detailed description of preceding text only is specifying to the feasibility embodiment of the utility model; They are not the protection range in order to restriction the utility model, allly do not break away from equivalent embodiment or the change that the utility model skill spirit done and all should be included within the protection range of the utility model.
Claims (13)
1. the analogue means of transponder information receiving system is characterized in that, said analogue means comprises: an acquiring unit (50), a CPU (20) and a transmitting element (30);
Said acquiring unit (50) can be exported the message that is used to test said transponder information receiving system;
Said CPU (20) can receive said message and the message that receives is sent to said transmitting element;
Said transmitting element (30) can be sent to the message that obtains from said CPU the decoder module (70) of said transponder information receiving system.
2. analogue means as claimed in claim 1, wherein, said acquiring unit (50) can be exported a plurality of said messages, and said transmitting element (30) comprising:
A receiver module (40) can receive each said message that said CPU (20) is sent, and each said message handled obtains test packet;
A sending module (60) can send each said test packet to said decoder module;
A state machine (52), each the said test packet that can control after said sending module is handled said receiver module sends to said decoder module (70) according to the sequencing that said receiver module receives each said message.
3. analogue means as claimed in claim 2, wherein,
Said receiver module (40) comprising: a bus interface mouthpart (42) is used to receive each said message that said CPU (20) is sent, and said message is the parallel data form; And a data transducer (44) each said message of being used for said bus interface mouthpart is obtained converts the said test packet of serial data format into.
4. analogue means as claimed in claim 3; Wherein, Said bus interface mouthpart (42) can notify the said data converter of said state machine (52) (44) to receive said message, and said bus interface mouthpart (42) also is sent to said state machine (52) with its sequencing that receives said message simultaneously.
5. analogue means as claimed in claim 3, wherein, said sending module (60) further comprises:
At least two memories (64) are used to preserve the said test packet that said data converter (44) is converted to, and can send the said test packet of storage to said decoder module (70);
At least two derailing switches (66) are arranged on the path between said memory and the said data converter (44), perhaps are arranged on the path between said memory and the said decoder module;
A time schedule controller (62); It is connected with said derailing switch (66) but signal; Said derailing switch (66) can read the said test packet in the said memory (64), and the said derailing switch of said time schedule controller (62) may command (66) is sent to decoder module (70) with test packet according to the standard speed of a setting;
Said state machine (52) is controlled each said test packet to the said decoder module that sequencing that said derailing switch (66) receives each said message according to said receiver module (40) is let pass and stored in the said memory.
6. analogue means as claimed in claim 5, wherein,
Said sending module (60) further comprises a signal controller (68);
Said time schedule controller (62) is further used for generating clock information and the enable information corresponding with each said test packet and being sent to said state machine (52) according to the speed that each said test packet sends;
Said state machine is further used for said clock information and said enable information are sent to said signal controller (68);
Said signal controller will be corresponding with each said test packet enable signal and clock signal be sent to said decoder module (70); So that said decoder module can be received the said enable signal corresponding to same said test packet, said clock signal and said test packet simultaneously, and said signal controller can be decoded to receiving corresponding said test packet with reference to said enable signal and said clock signal.
7. analogue means as claimed in claim 2, wherein, said transmitting element (30) further comprises: one with said state machine (52) but the input and output device (80) that signal is connected, it can be communicated by letter with communication module, the decoder module of said transponder receiving system.
8. analogue means as claimed in claim 2, wherein, said transmitting element (30) also comprise one with said state machine (52) but the timer (82) that signal is connected is used to limit operating time of said analogue means.
9. like any described analogue means of claim 1 to 8, wherein said transmitting element (30) is realized by programmable gate array, and/or said CPU (20) is realized by digital signal processor.
10. analogue means as claimed in claim 5; Wherein said analogue means also comprises one first converting unit (90) and/or one second converting unit (94); Said derailing switch (66) and/or said signal controller (68) are connected with said decoder module (70) but signal through said first converting unit; Said first converting unit can be carried out digital-to-analogue conversion to the communication data between the said decoder module of said analogue means; Said second converting unit links to each other with said state machine (52) but signal, can carry out digital-to-analogue conversion to the communication data between the computer terminal outside said analogue means and the said analogue means.
11. analogue means as claimed in claim 10; Wherein said analogue means also comprises one first transceiver (92); But said first transceiver is connected with the said first converting unit signal, said first transceiver (92) can with said decoder module (70) communication, accomplish with the order of said decoder module (70) and shake hands; And/or whether the state that said first transceiver (92) can detect said analogue means is normal.
12. the test macro of transponder information receiving system comprises:
The decoder module of a said transponder information receiving system (70),
The communication module of a said transponder information receiving system (72),
A host computer (74) and
One like any said analogue means of claim 1 to 11 (10);
Wherein: but said analogue means be connected with said decoder module signal, but said decoder module be connected with said communication module signal, but be connected with said host computer signal with said communication module.
13. the test macro of transponder information receiving system comprises:
The decoder module of a said transponder information receiving system (70),
The communication module of a said transponder information receiving system (72),
A host computer (74),
The test computer (76) that can export the message that is used to test said transponder information receiving system and
One like any said analogue means of claim 1 to 11 (10);
Wherein: but said test computer is connected with said analogue means signal; But said analogue means is connected with said decoder module signal; But said decoder module is connected with said communication module signal, but is connected with said host computer signal with said communication module.
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| CN2011203487923U CN202261268U (en) | 2011-09-19 | 2011-09-19 | Analog device of transponder information receiving system and testing system thereof |
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| CN102832962A (en) * | 2012-07-27 | 2012-12-19 | 北京交大思诺科技有限公司 | High-safety transponder ground electronic unit and method for improving safety of high-safety transponder ground electronic unit |
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