CN202217273U - Control class instructions and calculation class instructions separated computer system - Google Patents
Control class instructions and calculation class instructions separated computer system Download PDFInfo
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- CN202217273U CN202217273U CN 201120333183 CN201120333183U CN202217273U CN 202217273 U CN202217273 U CN 202217273U CN 201120333183 CN201120333183 CN 201120333183 CN 201120333183 U CN201120333183 U CN 201120333183U CN 202217273 U CN202217273 U CN 202217273U
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Abstract
The utility model discloses a control class instructions and calculation class instructions separated computer system, which aims at resolving the technical problems in the prior art of instruction system complexity, large design difficulty and effects on integral speed improvement caused by the fact that the control instructions and the calculation instructions are mingled. The computer system comprises a storage and an input-output device. The storage comprises a first internal storage, a second internal storage and an external storage and further comprises a control processor and a calculation processor. The control processor is connected with the input-output device, the first internal storage and the external storage, the calculation processor is connected with the second internal storage, and the control processor is connected with the calculation processor through a bus. The computer system is capable of effectively improving working speed and working efficiency of the computer system.
Description
Technical field
The utility model relates to the computer organization designing technique, relate in particular to a kind of will type of control instruction and compute classes instruction use the computer system of different processor respectively.
Background technology
All computing machines all have order set.Control type instruction is arranged in the order set, like the switch order of transfer instruction, stop instruction, interruption, put condition code instruction etc., also have the compute classes instruction, like the arithmetic to different types of data, logical operation etc.The trend of control type instruction determination procedure, computing is implemented in the compute classes instruction, and the order set of traditional computer is mingled in these two types of instructions together, the causes instructions system complex, design difficulty is big; Because instruction is complicated, the speed of instruction unit improves just difficulty, has fettered the raising of bulk velocity; Fettered the development of computing class instruction; (like 8 data widths or 16 s' data width) is diverse order set because the data of different in width; If steering order is separated with operational order; The variation of data width so, the variation of data type, even the change of computing method does not influence control type instruction.The computer organization of using dual processor or multiprocessor is also arranged in the prior art, but from the task design of each processor, still control type instruction and compute classes instruction promiscuous mode.As open day being the technical scheme patent documentation that October 17, publication number in 2007 are CN101055556 discloses: a kind of multi-CPU system; Comprise: total system is made up of a plurality of independent CPUs, a message unit and a timed message transmitting element; Can only connect each other through this crosspoint between each CPU; Adopt FIFO or HSSI High-Speed Serial Interface to be connected between crosspoint and each CPU, transmit information, crosspoint and the cooperation of timed message transmitting element through message between CPU and the crosspoint; The state of each CPU in the supervisory system; So that in time note abnormalities, recover normally operation, this structure can realize stronger stability, better security and communication between CUP faster.But the weak point of this scheme remains each CUP institute operating instruction is control type instruction and compute classes instruction promiscuous mode.
Summary of the invention
The utility model mainly is to solve the existing in prior technology steering order and operational order mixes the causes instructions system complex, design difficulty is big; Influence technical matterss such as bulk velocity raising; A kind of control type instruction and compute classes instruction detachable computer system are provided, no matter how its computation processor changes, processor controls can remain unchanged; Thereby system software compatible good, dirigibility is higher; Be convenient to form the computing machine of different pieces of information width, different pieces of information structure, various computing instruction set, and system software or management software remain unchanged still, significantly improve the work efficiency of design and use computing machine.
The utility model mainly is able to solve through following technical proposals to the prior art problem; A kind of control type instruction and compute classes instruction detachable computer system; Comprise storer, input-output device, storer comprises first internal storage (working storage of processor controls), second internal storage (working storage of computation processor) and external memory storage, also comprises processor controls; Computation processor; Processor controls connects input-output device, first internal storage and external memory storage, and computation processor connects second internal storage, adopts bus to be connected between processor controls and computation processor.This Computer Systems Organization of the utility model is made up of two groups of order set, control type command control program trend; The compute classes instruction science of carrying out is calculated.The processor of full-time control type instruction is called processor controls, and the processor of full-time compute classes instruction is called computation processor.In actual use, connect external interface device, be responsible for and extraneous communication, and as the platform of operation system, computation processor carries out compute classes work such as Flame Image Process, science calculating by processor controls.Processor controls is not because need handle a large amount of exclusive datas, need not do complicated science yet and calculate; So focusing on external communication, human-computer interaction interface and the general development environment of it; It also is that operation is the operation platform of usefulness, no matter how computation processor changes, processor controls can remain unchanged; It is better that this just makes that processor controls and peripheral IO port design versatility; Dirigibility is higher, and in the evolution that computer hardware is constantly upgraded, processor controls can remain unchanged basically; Computation processor is designed with the more processor of high-speed computational capability, and it accomplishes the computing of whole big data quantities, adopts bus mode to carry out data transmission and communicate by letter between processor controls and computation processor.Such scheme makes computer organization more reasonable, and operating rate and efficient are higher.
As preferably, computation processor also connects the external data IO port.Need carry out the equipment of data processing through external data IO port connection real-time video data channel and other.
As preferably, bus is a memory bus, and memory bus is connected between processor controls and the computation processor as communication bus.
As preferably, memory bus is provided by the dual-port shared storage, and said dual-port shared storage is one and has two fully independently shared storages of SRAM interface.This kind mode is the dual-port mutual contact mode, and it allows shared storage space of two processor unit independent accesses, thereby comes swap data through its memory bus and the standard read-write operation of utilization, realizes two inter-processor communications.
As preferably, processor controls also connects usb bus interface, communication interface, network interface, and other application interfaces can be set as the external port that uses processor controls to manage.
The beneficial effect that the utility model brings is; No matter how computation processor changes; Processor controls can remain unchanged; Make that processor controls and IO port versatility are better, dirigibility is higher, the compatibility of system software is better, can make computation processor be designed with the more processor of high-speed computational capability, significantly improve the work efficiency of design and use computing machine.
Description of drawings
Fig. 1 is a kind of theory diagram of the utility model.
Among the figure: the 1st, first memory, the 2nd, second memory, the 3rd, external data IO port, the 4th, processor controls; The 5th, dual-port shared storage, the 6th, computation processor, the 7th, external memory storage, the 8th, keyboard; The 9th, display, the 10th, USB interface, the 11st, communication interface, the 12nd, network interface.
Embodiment
Below through embodiment, and combine accompanying drawing, the technical scheme of the utility model is further specified.
Embodiment: as shown in Figure 1, the utility model is a kind of control type instruction and compute classes instruction detachable computer system, comprises keyboard 8; Display 9, usb 10, communication interface 11; Networking interface 12, the first internal storages 1, second internal storage 2, external memory storage 7; Processor controls 4, computation processor 6; Processor controls 4 connects keyboards 8, display 9, usb 10, communication interface 11, networking interface 12, first internal storage 1, external memory storage 7; Computation processor 6 connects second internal storage 2, external data IO port 3; A port of dual-port shared storage 5 connects processor controls 4 through memory bus; Another port connects computation processor 6 through memory bus, thereby sets up the high-speed channel of 6 of processor controls 4 and computation processors.
External memory storage 7 is hard disks.
Installing operating system on the processor controls 4 formed platforms; Full-time administrative input-output device, IO port; Computation processor 6 connects second memory 2, data input/output interface 3, thereby constitutes subsystem, and accepts the operating system management on processor controls 4 platforms; Full-time science is calculated, such as graphics process, Flame Image Process, structure analysis calculating, professional software operation etc.
No matter how computation processor changes so the utlity model has; Processor controls can remain unchanged; Make that processor controls and IO port versatility are better, dirigibility is higher; Can make computation processor be designed with the more processor of high-speed computational capability, significantly improve the characteristics such as work efficiency of design and use computing machine.
Claims (5)
1. control class instruction and compute classes instruction detachable computer system; Comprise storer, input-output device, said storer comprises first internal storage, second internal storage and external memory storage, it is characterized in that: also comprise processor controls; Computation processor; Said processor controls connects input-output device, first internal storage and external memory storage, and computation processor connects second internal storage, adopts bus to be connected between processor controls and computation processor.
2. according to the said a kind of control of claim 1 type instruction and compute classes instruction detachable computer system, it is characterized in that: said computation processor also connects the external data IO port.
3. according to the said a kind of control of claim 1 type instruction and compute classes instruction detachable computer system, it is characterized in that: said bus is a memory bus, and said memory bus is connected between processor controls and the computation processor as communication bus.
4. according to the said a kind of control of claim 3 type instruction and compute classes instruction detachable computer system; It is characterized in that: said memory bus is provided by the dual-port shared storage, and said dual-port shared storage is one and has two fully independently shared storages of SRAM interface.
5. according to the said a kind of control of claim 1 type instruction and compute classes instruction detachable computer system, it is characterized in that: said processor controls also connects usb bus interface, communication interface, network interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120333183 CN202217273U (en) | 2011-09-07 | 2011-09-07 | Control class instructions and calculation class instructions separated computer system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201120333183 CN202217273U (en) | 2011-09-07 | 2011-09-07 | Control class instructions and calculation class instructions separated computer system |
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| CN202217273U true CN202217273U (en) | 2012-05-09 |
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| CN 201120333183 Expired - Fee Related CN202217273U (en) | 2011-09-07 | 2011-09-07 | Control class instructions and calculation class instructions separated computer system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102360278A (en) * | 2011-09-07 | 2012-02-22 | 苏州科雷芯电子科技有限公司 | Separating type computer system of control instructions and calculation instructions |
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2011
- 2011-09-07 CN CN 201120333183 patent/CN202217273U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102360278A (en) * | 2011-09-07 | 2012-02-22 | 苏州科雷芯电子科技有限公司 | Separating type computer system of control instructions and calculation instructions |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120509 Termination date: 20170907 |
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| CF01 | Termination of patent right due to non-payment of annual fee |