CN202147274U - Solar silicon wafer group welding shelf - Google Patents
Solar silicon wafer group welding shelf Download PDFInfo
- Publication number
- CN202147274U CN202147274U CN201120251889U CN201120251889U CN202147274U CN 202147274 U CN202147274 U CN 202147274U CN 201120251889 U CN201120251889 U CN 201120251889U CN 201120251889 U CN201120251889 U CN 201120251889U CN 202147274 U CN202147274 U CN 202147274U
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- CN
- China
- Prior art keywords
- shelf
- interval
- partition
- group
- silicon chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The utility model relates to a solar silicon wafer group welding shelf, which comprises a plate-like main body, wherein a plurality of bulged spacer groups are arranged on the front surface of the main body; an interval is formed every two adjacent groups of spacers in the length direction of the main body; the intervals are all equal; the spacer group is composed of some spaced spacers; the spacer group is arranged in the width direction of the main body. The shelf is used for placing the silicon wafer so that the interval formed between two adjacent silicon wafers in the different silicon wafer groups is the same, which is convenient for further machining and mounting the silicon wafer group; the solar silicon wafer group welding shelf can effectively improve the operation speed in the silicon wafer group welding operation.
Description
Technical field
The utility model relates to a kind of shelf, relates in particular to a kind of shelf of solar silicon wafers group that when solar silicon wafers being connected welding, is used to shelve.
Background technology
Solar energy is widely used as a kind of clean energy resource just day by day.Solar product generally takes certain connecting mode to constitute by the multi-disc single silicon chip, and these silicon chips generally are to be connected into silicon chip group, and many then group silicon chip group are joined together in parallel.Monolithic finished product solar silicon wafers front is provided with two parallel main grid lines, and the back side is provided with two parallel back electrodes, when silicon chip is cascaded, utilizes copper base tin interconnector to be joined together.One end and the silicon chip back electrode of interconnector weld together, and the other end and main grid line weld together.Under the prior art condition; Realizing the connection of silicon chip group, generally is to be spread out in silicon chip at interval on the platen earlier, welds together the back electrode of interconnector and first silicon chip earlier; And then turn over turnback to this first silicon chip; And be welded to the other end of interconnector on this first silicon chip on the main grid line of another adjacent sheet silicon chip, more then on the back electrode of this another adjacent sheet silicon chip of end welding of other two interconnectors, the final series connection that realizes silicon chip group that the rest may be inferred.When realizing the series connection of silicon chip group; Need constantly stir silicon chip; And silicon chip is frangible, in stirring process, is prone to cause silicon chip damaged, and the difficult support in the interval between adjacent two silicon chips is held; Thereby make the interval between two adjacent in different silicon chip group silicon chips inconsistent, this can have influence on the attractive in appearance of solar product.For the good silicon chip group of welding, because interconnecting strip is softer relatively, and silicon chip group has certain length, and this just makes and inconvenience when silicon chip group is taken in the process of taking, also is prone to cause the fragmentation of silicon chip.
The utility model content
For overcoming above-mentioned defective, the purpose of the utility model is: a kind of solar silicon wafers welding shelf is provided, and it can guarantee that the interval between two adjacent in different silicon chip group silicon chips has uniformity, and is convenient to the silicon chip group that butt welding connects and takes.
In order to solve the technical problem; The technical scheme of the utility model: solar silicon wafers bond pads shelf, comprise tabular body, be provided with the partition group of some groups of protrusions in the body front; Have at interval in the body length direction between the two adjacent groups partition group; And these equate all that at interval the partition group is to be made up of several partitions that are provided with at interval, and the partition group is along the width setting of body.When realization is welded to connect silicon chip group; Be placed into single silicon chip respectively in the interval between different partition groups; Be welded with interconnector in advance on the back electrode of these silicon chips; Place on the shelf that the same side of silicon chip is resisted against respectively on the corresponding partition group, the interconnector on a slice silicon chip is soldered on the main grid line on the adjacent silicon chip.
The number of partition is all consistent in all partition groups, and the interval in all partition groups between adjacent two partitions all equates.Have between two adjacent partitions at interval, this is convenient to interconnector and contacts with main grid line on the silicon chip, has made things convenient for welding.
The partition group is to be made up of three partitions.Have two intervals between three partitions, this has adapted to the actual conditions that silicon chip is connected with two interconnectors well.
Dorsal part at shelf is provided with connector, and partition runs through body and is connected with connector.Connector is connected with body, is provided with connector, can improve the connectivity robustness of partition.
Be provided with two grooves in the body front, these two grooves are along the length direction setting of body, and two grooves have between the body width at interval.After silicon chip was placed on the shelf, the interconnector at the silicon chip back side and back electrode can be positioned at groove, and to reduce silicon chip when adjusting the position, shelf surface causes damage to interconnector and back electrode.
Position corresponding to groove on connector is provided with holding tank, and the bottom of groove extend in the holding tank.The locus that provides that is set to groove of holding tank.
The truncation surface of said body width is " Z " shape, and the dual-side of body width is formed with respectively puts sheet and catch, puts sheet and catch and stretches out towards the back side and the front of body respectively.Catch is used for leaning with the lower end side of silicon chip, so that silicon chip is in correct position on the shelf, when the setting of putting sheet made shelf be placed on platen, shelf was on the heeling condition, thereby for catch limits the position of silicon chip convenience is provided.
The beneficial effect of the utility model: through the partition group of protrusion is set in the shelf front, be used to limit silicon chip position on the shelf, be convenient to process the consistent silicon chip group in interval between adjacent two silicon chips, made things convenient for further processing to silicon chip group.The silicon chip group that processes can be through moving the mode of shelf, and realize moving of silicon chip group, thereby also made things convenient for taking to silicon chip group.
Description of drawings
Fig. 1 is the structural representation of this solar silicon wafers bond pads shelf.
Fig. 2 is the amplification view along A-A direction among Fig. 1.
The specific embodiment
This solar silicon wafers bond pads shelf comprises tabular body 1, on body 1, is provided with the some groups of partition groups that protrude into the body 1 positive outside, and two adjacent groups partition group has at interval between on the length direction of body 1, and these all equate at interval.These are larger than the size of silicon chip at interval, so that silicon chip is placed in these intervals.
All have three partitions 3 in every group of partition group, these three partitions 3 are along being provided with on the width of body 1, and the interval between adjacent two partitions 3 equates.
For guaranteeing the connectivity robustness of partition 3 on body 1, be connected with connector 7 at the back side of body 1, partition 3 runs through body 1 and is connected with connector 7.Connector 7 can be a whole plate, and all partitions 3 all are connected with the connector 7 of this monoblock; Connector 7 also can be number and the consistent strip shape body of partition group number, and the partition 3 in every group of partition group is connected with the connector 7 of a strip.Consider that from the angle of the portability of taking connector 7 is preferably strip shape body.
The truncation surface of body 1 width is " Z " shape; Be formed with at the dual-side place of body 1 width be connected as a single entity with it put sheet 4 and catch 2; The length of putting sheet 4 and catch 2 is consistent with the length of body 1, puts sheet 4 and stretches out towards the back side of body 1, and catch 2 stretches out towards the front of body 1.After shelf was placed on the platen, because the supporting role of putting sheet 4, body 1 was on the heeling condition.
Be provided with two grooves 5 in the front of body 1; These two grooves 5 are all along the length direction setting of body 1; Article two, groove 5 has on the width of body 1 at interval; This at interval with two back electrodes at the silicon chip back side between the interval corresponding, after silicon chip was placed on the shelf and puts in place, two back electrodes on the silicon chip laid respectively in these two grooves 5.On described connector 7, be provided with two holding tanks 6, described two grooves 5 extend into respectively in two holding tanks 6.
Claims (7)
1. solar silicon wafers bond pads shelf; Comprise tabular body; It is characterized in that: be provided with the partition group of some groups of protrusions in the body front, have at interval in the body length direction between the two adjacent groups partition group, and these all equate at interval; The partition group is to be made up of several partitions that are provided with at interval, and the partition group is along the width setting of body.
2. by the said shelf of claim 1, it is characterized in that: the number of partition is all consistent in all partition groups, and the interval in all partition groups between adjacent two partitions all equates.
3. by the described shelf of claim 2, it is characterized in that: the partition group is to be made up of three partitions.
4. by claim 1,2 or 3 described shelves, it is characterized in that: the dorsal part at shelf is provided with connector, and partition runs through body and is connected with connector.
5. by the described shelf of claim 4, it is characterized in that: be provided with two grooves in the body front, these two grooves are along the length direction setting of body, and two grooves have between the body width at interval.
6. by the described shelf of claim 5, it is characterized in that: the position corresponding to groove on connector is provided with holding tank, and the bottom of groove extend in the holding tank.
7. by claim 1,2 or 3 described shelves, it is characterized in that: the truncation surface of said body width is " Z " shape, and the dual-side of body width is formed with respectively puts sheet and catch, puts sheet and catch and stretches out towards the back side and the front of body respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120251889U CN202147274U (en) | 2011-07-18 | 2011-07-18 | Solar silicon wafer group welding shelf |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120251889U CN202147274U (en) | 2011-07-18 | 2011-07-18 | Solar silicon wafer group welding shelf |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202147274U true CN202147274U (en) | 2012-02-22 |
Family
ID=45588348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201120251889U Expired - Fee Related CN202147274U (en) | 2011-07-18 | 2011-07-18 | Solar silicon wafer group welding shelf |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202147274U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102706466A (en) * | 2012-05-25 | 2012-10-03 | 嘉兴优太太阳能有限公司 | Improved solar electrical silicon wafer welding and temperature measurement system |
-
2011
- 2011-07-18 CN CN201120251889U patent/CN202147274U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102706466A (en) * | 2012-05-25 | 2012-10-03 | 嘉兴优太太阳能有限公司 | Improved solar electrical silicon wafer welding and temperature measurement system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120222 Termination date: 20170718 |