CN102244148B - Welding method of tandem type solar silicon wafer group and special shelf thereof - Google Patents

Welding method of tandem type solar silicon wafer group and special shelf thereof Download PDF

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Publication number
CN102244148B
CN102244148B CN2011101997818A CN201110199781A CN102244148B CN 102244148 B CN102244148 B CN 102244148B CN 2011101997818 A CN2011101997818 A CN 2011101997818A CN 201110199781 A CN201110199781 A CN 201110199781A CN 102244148 B CN102244148 B CN 102244148B
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shelf
silicon chip
partition
group
post
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Expired - Fee Related
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CN2011101997818A
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CN102244148A (en
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焦保贞
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SOPRAY ENERGY CO Ltd
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SOPRAY ENERGY CO Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to a welding method of a tandem type solar silicon wafer group and a special shelf thereof. The shelf comprises a platy shelf; the shelf is provided with a plurality of raised spacer sets; and the spacer sets are arranged at intervals along the length direction of the shelf. The method for welding the solar silicon wafer group comprises the following steps: firstly overlaying silicon wafers with interconnected strips at the back side into a silicon wafer column, wherein the extending ends of all the interconnected strips are positioned at the same side of the silicon wafer column, the silicon wafer column is arranged above the shelf and moves from one end of the shelf to the other end, the moving direction is opposite to the extending direction of the interconnected strips, and in the moving process of the silicon wafer column, the silicon wafers at the most bottom layer are continuously and sequentially placed in different intervals on the shelf; then regulating the positions of the silicon wafers in the intervals so that the interconnected strips are overlapped with main grid lines on the adjacent silicon wafers; and finally welding the overlapped interconnected strips and the main grid lines together by utilizing a ferrochrome. The welding method is convenient and rapid, the operation efficiency is high, and the silicon wafers are not easy to crack in the welding process.

Description

Serial solar energy silicon chip bond pads method and Special shelf thereof
Technical field
The present invention relates to a kind of welding method, relate in particular to a kind of method and Special shelf thereof when serial solar energy silicon chip group is welded.
Background technology
Solar energy is widely used just day by day as a kind of clean energy resource.Solar product generally takes certain connecting mode to consist of by the multi-disc single silicon chip, and these silicon chips generally are to be connected into the silicon chip group, and then many group silicon chip groups are joined together in parallel.Monolithic finished product solar silicon wafers front is provided with two parallel main grid lines, and the back side is provided with two parallel back electrodes, when silicon chip is cascaded, utilizes copper base tin interconnector to be joined together.One end and the silicon chip back electrode of interconnector weld together, and the other end and main grid wire bonding are connected together.Under the prior art condition, realize the connection of silicon chip group, generally be silicon chip to be separated to be spread out on the platen first, first the back electrode of interconnector and first silicon chip is welded together, and then these first silicon wafer turnover 180 degree, and the other end of interconnector on this first silicon chip is welded on the main grid line of another adjacent sheet silicon chip, then other end of two interconnectors is welded on the back electrode of this another adjacent sheet silicon chip the more final series connection that realizes the silicon chip group that the rest may be inferred.When realizing the series connection of silicon chip group, need to constantly stir silicon chip, and silicon chip is frangible, in stirring process, easily cause silicon chip damaged, and the distance between adjacent two silicon chips is difficult for support and holds, thereby make the distance between two adjacent in different silicon chip groups silicon chips inconsistent, this can have influence on the attractive in appearance of solar product.For the good silicon chip group of welding, because interconnecting strip is relatively soft, and the silicon chip group has certain length, and this is just so that the inconvenience when taking of silicon chip group also easily causes the fragmentation of silicon chip in the process of taking.
Summary of the invention
For overcoming defects, the objective of the invention is: a kind of welding method of serial solar energy silicon chip group is provided, its can Effective Raise the speed of welding of serial solar energy silicon chip group, and can reduce fragment rate in welding process.
Another object of the present invention is: provide a kind of when serial solar energy silicon chip group is welded, be used for shelving the Special shelf of silicon chip, it can guarantee the speed of welding that tandem too can the silicon chip group, provides protective effect to silicon chip.
For reaching described purpose, technical scheme of the present invention: serial solar energy silicon chip bond pads method, first an end of interconnector and silicon chip back electrode are welded together, the other end of interconnector reaches the silicon chip outside, silicon chip with interconnector is stacked to the silicon chip post, in the silicon chip post, the front of silicon chip is all towards same direction, and makes the external part of all interconnectors be positioned at the same side of silicon chip post; Get shelf and be placed on the platen, shelf is provided with the some groups of partition groups of protruding, and the partition group is protruded the height of shelf between the 0.2-1 millimeter, has the interval at the shelf length direction between the two adjacent groups partition group, and these intervals all equate; The silicon chip post is removed top to shelf, and the back side that makes silicon chip in the silicon chip post is towards shelf, end from shelf moves the silicon chip post to the other end, this moving direction and interconnector reach the opposite direction in the silicon chip post outside, in the process of mobile silicon chip post, successively bottom silicon chip in the silicon chip post is placed in the interval on the shelf continuously, on the shelf, a slice silicon chip is placed in the interval; To silicon chip place complete after, take the partition group as a benchmark position of silicon chip in the interval adjusted, then be welded on the main grid line on this adjacent silicon chip snapping into interconnector on the adjacent silicon chip main grid line, finish the welding of silicon chip group.
Interconnector is copper base tin material, and namely the skin at copper sheet is provided with tin, when realizing the silicon chip series connection, interconnector is overlapped on the silicon chip main grid line, with the ferrochrome of the energising surface sliding at interconnector, realizes being connected between interconnector and the main grid line after the tin fusing.
Serial solar energy silicon chip bond pads shelf, comprise platen and tabular shelf, shelf is used for nature and is shelved on platen, it is characterized in that: be provided with the some groups of partition groups of protruding in the shelf front, the partition group is protruded the height of shelf between the 0.2-1 millimeter, has the interval at the shelf length direction between the two adjacent groups partition group, and these intervals all equate, the partition group is to separate the partition that arranges by several to consist of, and the partition group is along the Width setting of shelf.When realization connects the silicon chip bond pads, single silicon chip with interconnector is placed into respectively in the interval between different partition groups, be welded with in advance interconnector on the back electrode of these silicon chips, place on the shelf that the same side of silicon chip is resisted against respectively on the corresponding partition group, the interconnector on a slice silicon chip is soldered on the main grid line on the adjacent silicon chip.The thickness of silicon chip is generally at a few tenths of a mm, and the height that partition protrudes shelf is no more than 1 millimeter, and partition can be realized the location to silicon chip on the one hand, and in the process of partition on being placed into shelf, partition also can not have influence on the placement of silicon chip on the other hand.
The number of partition is all consistent in all partition groups, and the interval in all partition groups between adjacent two partitions all equates.Have the interval between two adjacent partitions, this is convenient to interconnector and contacts with main grid line on the silicon chip, has made things convenient for welding.
The partition group is to be made of three partitions.Have two gaps between three partitions, this has adapted to the actual conditions that silicon chip is connected with two interconnectors well.
Dorsal part at shelf is provided with connector, and partition runs through shelf and is connected with connector.Connector is connected with shelf, is provided with connector, can improve the connectivity robustness of partition.
Be provided with two grooves in the shelf front, these two grooves are along the length direction setting of shelf, and two grooves have distance between the shelf Width.After silicon chip was placed on the shelf, the interconnector of silicon chip back side and back electrode can be positioned at groove, and to reduce silicon chip when adjusting the position, shelf surface is to interconnector and back electrode injury.
Position corresponding to groove on connector is provided with holding tank, and the bottom of groove extend in the holding tank.The locus that provides that is set to groove of holding tank.
The truncation surface of described shelf Width is " Z " shape, and the dual-side of shelf Width is formed with respectively puts sheet and catch, puts sheet and catch and stretches out towards the back side and the front of shelf respectively.Catch is used for and the lower end side of silicon chip leans, so that silicon chip is in correct position on the shelf, when the setting of putting sheet made shelf be placed on platen, shelf was on the heeling condition, thereby provides convenience for catch limits the position of silicon chip.
Dorsal part at platen is provided with heater, and shelf is placed on the heater top.Shelf is placed on the top of heater; heater can improve the temperature of shelf; after silicon chip is placed on the heater; the temperature at its back side also obtains lifting to a certain extent; when realizing the welding of interconnector; be difficult for because front side of silicon wafer is subject to the fragmentation that high temperature causes silicon chip, effectively protected silicon chip.
The truncation surface of described shelf Width is "] " shape, be provided with the horizontal partition of several protrusions corresponding to each interval in the shelf front, these horizontal partitions are separated setting along the length direction of shelf, and all position of horizontal partition on the shelf Width are all identical.After in the interval silicon chip being set, this horizontal partition can be used as another benchmark the position of silicon chip in the interval is adjusted.
Beneficial effect of the present invention: this welding method does not need repeatedly to stir silicon chip, has reduced the fragment rate of silicon chip.After placing complete silicon chip toward shelf, the external part of interconnector can directly be overlapped on the front of adjacent silicon chip, simply the position of silicon wafer that places is adjusted, make the external part of interconnector and the main grid line overlap on the adjacent silicon chip, can realize the welding operation between interconnector and the main grid line, the operating speed of this welding method is convenient and swift.By the partition group of protrusion is set in the shelf front, be used for limiting silicon chip position on the shelf, be convenient to process the consistent silicon chip group of distance between adjacent two silicon chips, made things convenient for the further processing to the silicon chip group.The silicon chip group that processes can be by moving the mode of shelf, and realize the movement of silicon chip group, thereby also made things convenient for taking to the silicon chip group.
Description of drawings
Fig. 1 is the structural representation of shelf in this serial solar energy silicon chip bond pads shelf.
Fig. 2 is the amplification view along A-A direction among Fig. 1.
Fig. 3 is the horizontal magnification cutaway view of the another kind of execution mode of shelf in this series connection formula solar silicon wafers bond pads shelf.
Embodiment
This serial solar energy silicon chip bond pads shelf comprises platen and tabular shelf 1, and shelf 1 is used for nature and is shelved on platen.Dorsal part at platen is provided with heater, and when shelf 1 was placed on the platen, the top that shelf is positioned at heater existed, and when realizing the welding of silicon chip group, heater is under the "on" position.
Be provided with the some groups of partition groups that protrude into the shelf 1 positive outside at shelf 1, two adjacent groups partition group has the interval between on the length direction of shelf 1, and these intervals all equate.These intervals are larger than the size of silicon chip, so that silicon chip is placed in these intervals.
All have three partitions 3 in every group of partition group, these three partitions 3 arrange along separating on the Width of shelf 1, and the gap between adjacent two partitions 3 equates.
For guaranteeing the connectivity robustness of partition 3 on shelf 1, be connected with connector 7 at the back side of shelf 1, partition 3 runs through shelf 1 and is connected with connector 7.Connector 7 can be a whole plate, and all partitions 3 all are connected with the connector 7 of this monoblock; Connector 7 also can be the number strip shape body consistent with partition group number, and the partition 3 in every group of partition group is connected with the connector 7 of a strip.Consider that from the angle of the portability of taking connector 7 is preferably strip shape body.
The truncation surface of shelf 1 Width is " Z " shape, be formed with at the dual-side place of shelf 1 Width be connected as a single entity with it put sheet 4 and catch 2, the length of putting sheet 4 and catch 2 is consistent with the length of shelf 1, puts sheet 4 and stretches out towards the back side of shelf 1, and catch 2 stretches out towards the front of shelf 1.After shelf was placed on the platen, because the supporting role of putting sheet 4, shelf 1 was on the heeling condition.
The truncation surface of described shelf 1 Width also can be to be "] " shape, be provided with the horizontal partition 8 of three protrusions corresponding to each interval in shelf 1 front, these horizontal partitions 8 are separated setting along the length direction of shelf 1, and the position of all horizontal partitions 8 on shelf 1 Width is all identical.Laterally partition 8 also is to run through shelf 1, also is provided with the strip connector 7 that is connected with horizontal partition 8 at the dorsal part of shelf 1.When shelf 1 described truncation surface was described shape, shelf fitted near the flanging back side of horizontal partition 8 and the front end face of platen, and another flanging of shelf 1 is shelved on the platen surface naturally, thereby makes shelf be in the state of inclination at Width.Partition group and horizontal partition 8 are used for the position of silicon wafer that is placed in the interval is adjusted as two benchmark, dual-side vertical on the silicon chip is fitted with partition group and horizontal partition 8 respectively, thereby finish the rapid adjustment of silicon chip position in the interval.
Be provided with two grooves 5 in the front of shelf 1, these two grooves 5 are all along the length direction setting of shelf 1, article two, groove 5 has distance at the Width of shelf 1, distance between two back electrodes of this distance and silicon chip back side is corresponding, after silicon chip was placed on the shelf and puts in place, two back electrodes on the silicon chip laid respectively in these two grooves 5.Be provided with two holding tanks 6 at described connector 7, described two grooves 5 extend into respectively in two holding tanks 6.
Serial solar energy silicon chip bond pads method realizes as follows:
First an end of interconnector and silicon chip back electrode are welded together, the other end of interconnector reaches the silicon chip outside.Silicon chip with interconnector is stacked to the silicon chip post, in the silicon chip post, the front of silicon chip all facing one direction, the back side of silicon chip is all towards another opposite direction.In the silicon chip post, the external part of the interconnector on all silicon chips all is positioned at the same side of silicon chip post.Get shelf 1 and be placed on the platen, this shelf 1 is provided with the some groups of partition groups of protruding, and the partition group is protruded the height of shelf between the 0.2-1 millimeter, has the interval at the shelf length direction between the two adjacent groups partition group, and these intervals all equate.The operative employee removes top to shelf to the silicon chip post, and the back side that makes silicon chip in the silicon chip post is towards shelf.The silicon chip post is moved to the other end from an end of shelf 1, the moving direction of silicon chip post and interconnector reach the opposite direction in the silicon chip post outside, in the process of mobile silicon chip post, successively bottom silicon chip in the silicon chip post is placed in the different interval on the shelf 1 continuously, on shelf 1, a slice silicon chip is placed in the interval.After the silicon chip of placing on the shelf 1 reached desired value, take the partition group as a benchmark, aforesaid catch 2 was another benchmark, and the position of silicon chip in the interval adjusted, make on interconnecting strip and the adjacent silicon chip the main grid line overlap together.Silicon chip leans towards operator's side and catch 2, and on all silicon chips one leans with corresponding partition group respectively with side, thereby finishes the adjustment of position of silicon wafer.Then utilize electric soldering iron that the main grid line and the interconnector that overlap are welded together, thereby finish the welding of silicon chip group.

Claims (7)

1. serial solar energy silicon chip bond pads method, first an end of interconnector and silicon chip back electrode are welded together, the other end of interconnector reaches the silicon chip outside, it is characterized in that: the silicon chip with interconnector is stacked to the silicon chip post, in the silicon chip post, the front of silicon chip is all towards same direction, and makes the external part of all interconnectors be positioned at the same side of silicon chip post; Get shelf and be placed on the platen, shelf is provided with the some groups of partition groups of protruding, and the partition group is protruded the height of shelf between the 0.2-1 millimeter, has the interval at the shelf length direction between the two adjacent groups partition group, and these intervals all equate; The silicon chip post is removed top to shelf, and the back side that makes silicon chip in the silicon chip post is towards shelf, end from shelf moves the silicon chip post to the other end, this moving direction and interconnector reach the opposite direction in the silicon chip post outside, in the process of mobile silicon chip post, successively bottom silicon chip in the silicon chip post is placed in the interval on the shelf continuously, on the shelf, a slice silicon chip is placed in the interval; After complete to the silicon chip placement, take the partition group as a benchmark position of silicon chip in the interval adjusted, make and place on the shelf that the same side of silicon chip is resisted against respectively on the corresponding partition group, then be welded on the main grid line on this adjacent silicon chip snapping into interconnector on the adjacent silicon chip main grid line, finish the welding of silicon chip group.
2. serial solar energy silicon chip bond pads shelf, comprise platen and tabular shelf, shelf is used for nature and is shelved on platen, it is characterized in that: be provided with the some groups of partition groups of protruding in the shelf front, the partition group is protruded the height of shelf between the 0.2-1 millimeter, has the interval at the shelf length direction between the two adjacent groups partition group, and these intervals all equate, the partition group is to separate the partition that arranges by several to consist of, and the partition group is along the Width setting of shelf; Dorsal part at shelf is provided with connector, and partition runs through shelf and is connected with connector; Be provided with two grooves in the shelf front, these two grooves are along the length direction setting of shelf, and two grooves have distance between the shelf Width; Position corresponding to groove on connector is provided with holding tank, and the bottom of groove extend in the holding tank.
3. by the described shelf of claim 2, it is characterized in that: the number of partition is all consistent in all partition groups, and the distance in all partition groups between adjacent two partitions all equates.
4. by shelf claimed in claim 3, it is characterized in that: the partition group is to be made of three partitions.
5. by claim 2,3 or 4 described shelves, it is characterized in that: the truncation surface of described shelf Width is " Z " shape, and the dual-side of shelf Width is formed with respectively puts sheet and catch, puts sheet and catch and stretches out towards the back side and the front of shelf respectively.
6. by claim 2,3 or 4 described shelves, it is characterized in that: the dorsal part at platen is provided with heater, and shelf is placed on the heater top.
7. by claim 2,3 or 4 described shelves, it is characterized in that: the truncation surface of described shelf Width is "] " shape, be provided with the horizontal partition of several protrusions corresponding to each interval in the shelf front, these horizontal partitions are separated setting along the length direction of shelf, and all horizontal partitions are all identical in the position of shelf Width.
CN2011101997818A 2011-07-18 2011-07-18 Welding method of tandem type solar silicon wafer group and special shelf thereof Expired - Fee Related CN102244148B (en)

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CN102706466A (en) * 2012-05-25 2012-10-03 嘉兴优太太阳能有限公司 Improved solar electrical silicon wafer welding and temperature measurement system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101140960A (en) * 2007-09-30 2008-03-12 荀建华 Crystalline silicon solar array series welding stencil-plate
CN101488536A (en) * 2007-09-13 2009-07-22 胡玉海 Convergence belt for solar photovoltaic component and method for assembling solar panel by convergence belts

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JP2007273830A (en) * 2006-03-31 2007-10-18 Sanyo Electric Co Ltd Method for manufacturing solar battery device
WO2010146607A2 (en) * 2009-06-17 2010-12-23 System Photonics S.P.A. A process for manufacturing photovoltaic panels

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101488536A (en) * 2007-09-13 2009-07-22 胡玉海 Convergence belt for solar photovoltaic component and method for assembling solar panel by convergence belts
CN101140960A (en) * 2007-09-30 2008-03-12 荀建华 Crystalline silicon solar array series welding stencil-plate

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Address after: Luqiao District of Taizhou city in Zhejiang province 318050 Tyrone Street No. 358

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