CN202142188U - Embedded double-DSP information data processing apparatus - Google Patents

Embedded double-DSP information data processing apparatus Download PDF

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Publication number
CN202142188U
CN202142188U CN201120247252U CN201120247252U CN202142188U CN 202142188 U CN202142188 U CN 202142188U CN 201120247252 U CN201120247252 U CN 201120247252U CN 201120247252 U CN201120247252 U CN 201120247252U CN 202142188 U CN202142188 U CN 202142188U
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dsp
data
information data
processing
image
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李东平
彭杰军
罗松彬
郭勇军
冯立志
朱庆军
冯鑫
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BEIJING IMAGE VISION TECHNOLOGY BRANCH CHINA DAHENG (GROUP) Co Ltd
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BEIJING IMAGE VISION TECHNOLOGY BRANCH CHINA DAHENG (GROUP) Co Ltd
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Abstract

Provided is an embedded double-DSP information data processing apparatus, comprising a first DSP (Digital Signal Processor) and a second DSP (Digital Signal Processor) which are parallel, wherein the two parallel DSPs are linked to an image acquisition front module; and the rear ends of each DSP are externally provided with an interface module respectively. The embedded double-DSP information data processing apparatus can be flexibly applied to the intelligent traffic field, and the users can adopt proper working mode according to the characteristic of the traffic site and the application field.

Description

A kind of Embedded Double DSP information data treating apparatus
Technical field
The utility model relates to a kind of data processing equipment, relates more specifically to a kind of Embedded Double DSP information data treating apparatus that is used for intelligent transportation.
Background technology
(Digital Signal Processor DSP) is the device that comes process information with digital signal to digital signal processor, and its principle of work is to be that digital signal is treated to signals of reality again with the analog signal conversion that receives.
At intelligent transportation field, dsp processor is being born considerable role always, except the pre-service and image output of accomplishing on-the-spot candid photograph image, also can carry out video record to traffic scene.Common system generally adopts single DSP framework, and under this framework, DSP need bear the tasks such as front-end control, conversion process, image preservation and output of front-end collection image, will have following several problem like this:
1) application scenario there is restriction.Because single DSP task is heavy, need the affairs of processing too much, system processing power is limited, is not suitable at a high speed and the complicated occasion of Preprocessing Algorithm;
2) system is difficult for stable.Because the affairs that single dsp system need be handled are too much, are difficult to design more stable system, also are unfavorable for system's later stage system maintenance;
3) do not support parallel processing.At intelligent transportation field, many times need handle in real time, and result is added to captures picture or video flowing capturing picture; And single DSP framework is limit by system handles; Usually can only work with the mode of serial, after promptly image is obtained in candid photograph, carry out view data and handle; Then result is added on the image, preserves and output to destination media at last.
4) video flowing is discontinuous.Under single DSP framework,, also to preserve video flowing simultaneously if both need export the candid photograph frame; Generally speaking, in order to guarantee the stable operation of system, limit by system cache and processing; Can only take out particular frame from continuous images frame the inside as capturing frame; Will cause video flowing discontinuous like this, tangible pause and transition in rhythm or melody sense is arranged, be unfavorable for traffic applications.
5) do not support user's secondary development.
The utility model content.
The purpose of the utility model is to provide a kind of Embedded Double DSP information data treating apparatus that is used for intelligent transportation.
For realizing above-mentioned purpose, the Embedded Double DSP information data treating apparatus that the utility model provides is made up of two the first parallel dsp processors and second dsp processor, and two parallel dsp processors are connected to an IMAQ front-end module; Each outer interface module that is provided with of the rear end of two dsp processors.Wherein, interface module comprises serial port module, network interface module and memory module, connects network, SD card and USB storage card respectively.
The data processing equipment of the utility model is a kind ofly to export the structure that each link can both walk abreast from handling to; Single DSP handles and can independently separately accomplish from data processing to the output all processes; Also can be under integrated mode; Carry out data interaction between two DSP, but two dsp processors also can carry out data output, i.e. data result and line output respectively separately.This has stronger dirigibility for intelligent transportation field, and the user can adopt the proper operation pattern to the characteristics of traffic scene and application.
Description of drawings
Fig. 1 is the apparatus structure synoptic diagram of the utility model.
Fig. 2 is the device data flow diagram of the utility model.
Embodiment
The utility model provides a kind of treating apparatus that is used for intelligent transportation field based on the system architecture of two DSP.The technical solution of the utility model is: the view data that adopts two DSP frameworks that acquisition front end is obtained is analyzed and is handled; Processing result image is carried out comprehensively; Preservation outputs to other external interfaces; And the dsp software second development interface is provided, by user's own realization image processing algorithm and to front-end collection control partly.
Two DSP structures that the utility model proposes are the parallel organizations on a kind of complete meaning, and two dsp processors both can be operated in stand-alone mode, also can be operated in integrated mode.Stand-alone mode is exactly that two dsp processors work alone separately, is independent of each other, and respectively view data is handled and is exported; Integrated mode is exactly that two dsp processors need intercom mutually, and view data is handled respectively, carries out aggregation of data and output at last.
Two DSP structures of the utility model comprise the IMAQ front-end module, the image data processing module that is made up of two dsp processors, and rear end Peripheral Interface module.The IMAQ front-end module is responsible for the data external image data acquiring; After getting access to a frame image data,, same frame image data is outputed to first dsp processor (DSP1) and two processors of second dsp processor (DSP2) simultaneously through DSP video port communication interface; Data processing module is made up of DSP1 and DSP2, and wherein DSP1 is responsible for parts such as view data buffer memory, aggregation of data, video compress, and the DSP2 processor is responsible for analysis of image data and processing.Under stand-alone mode, output control is separately handled and accomplished to these two dsp processors to the input data respectively simultaneously, and wherein the DSP1 processor can be exported and capture picture frame and video flowing, and the DSP2 processor can be exported the candid photograph image data frame; And under integrated mode; After these two dsp processors carry out data processing at the same time; By the DSP2 processor result is delivered to the DSP1 processor, is responsible for aggregation of data, and result is added on the image by it; Output to outside other storage medium, obviously DSP1 and two processors of DSP2 also can be exported control respectively.
Two dsp processors are shared out the work and help one another; The same frame image data of associated treatment carries out comprehensively result and view data at last, with the result view data that is added to; With respect to single DSP structure; The integral pressure that single processor can the sharing system task in two DSP frameworks is absorbed in separately independently issued transaction, more is applicable to the occasion of site of deployment to view data processing speed and some Processing Algorithm more complicated; Single processor is accomplished independently separately and is worked in two DSP frameworks, the system design clear in structure, and the functional hierarchy structure boundary is clear and definite, helps the software architecture design and the later maintenance of total system, also helps different designers and carries out concurrent development.
Need each processor associated treatment for single-frame images in two DSP structures, just can obtain final integrated data, but, just can realize the parallel processing of image data stream from the entire system angle as long as adopt the multiple buffer technology; Same frame data get into two dsp processors simultaneously and handle respectively, have also avoided the discontinuous situation of video flowing.
Be different from general two DSP serial processing structure, the utility model provides parallel processing structure.
What general two DSP serial processing structure adopted is data stream serial processing in each dsp processor; Could handle by back DSP after the DSP data processing is accomplished promptly; The work efficiency of entire system is not high, does not give full play to the advantage of many dsp processors framework.The parallel processing structure that the utility model proposes merges functions such as analysis of image data processing, video compress, image preservation better, can give full play to the advantage of many DSP associated treatment.
Be different from general two DSP parallel processing structure, the utility model provides a kind of parallel processing structure of multi-operation mode.
For general two DSP parallel processing structures, two dsp processor parallel processing simultaneously data are carried out aggregation of data by one of them dsp processor then; And data serial outputed to other storage medium; And the structure that the utility model proposes is a kind ofly export the structure that each link can both walk abreast from handling, and under independent working mode, single DSP handles and can independently separately accomplish from data processing to exporting all processes; And under integrated mode; Between DSP1 and the DSP2 data interaction is arranged, but two dsp processors also can carry out data output, i.e. data result and line output respectively separately.This has stronger dirigibility for intelligent transportation field, and the user can adopt the proper operation pattern to the characteristics of traffic scene and application.
In addition owing to intelligent transportation is now used more and more widely; Traffic scene becomes increasingly complex; The affairs that need handle are more and more, need provide second development interface by user's own exploitation image analysis processing algorithm under a lot of occasions, accomplish data analysis to traffic scene with comprehensive.The native system project organization is supported user's secondary development; The dirigibility that can fully user's algorithm be realized combines with two high concurrencys of DSP preferably; Can satisfy final user's requirement well, also help satisfying growing intelligent transportation field aspect requirements such as disposal system high-performance high stabilities.
Below in conjunction with accompanying drawing the technical scheme of the utility model is described in detail:
As shown in Figure 1, two DSP architecture systems are by the IMAQ front-end module, the acquisition processing module that constitutes by two dsp processors, and rear end Peripheral Interface module is formed.The acquisition front end module outputs to DSP1 and two processors of DSP2 through the video port interface channel respectively with view data, through certain communication mode, carries out exchanges data and order control like modes such as SPI, McBSP, I2C between two dsp processors.After DSP2 sent to DSP1 with processing result image, DSP1 carried out the data stack to image, with single-frame images (like Joint Photographic Experts Group), video flowing modes such as (as H.264) data was sent to interface module (like network, SD card or USB storage) then.
Can find out that on system architecture two DSP framework solutions can solve problems such as the application scenario is limited, system is unstable, video flowing is discontinuous obviously.Describe how to realize two DSP framework parallel processings below in conjunction with Fig. 2.
As shown in Figure 2, the view data that acquisition front end is obtained outputs to DSP1 simultaneously and two processors of DSP2 are handled respectively.In the DSP1 processor, the view data of input has been carried out two kinds of different disposal, wherein one the tunnel carries out the image cutting; Obtain meeting the data layout of video flowing standard, like 720P/1080P, any processing is not carried out on another road; And DSP2 carries out analyzing and processing to the view data of input; Result is sent to DSP1 through certain mode (typically like SPI), and result generally comprises the geography information of working site, image feature information etc.; Carry out the data stack by DSP1; Last DSP1 does not have the image of cutting and result to superpose, and output has the compressed image of overlapped information, and with obtaining image superpose with other specific location informations (the general result that does not comprise DSP2) after the image cutting.
Can find out from above description; For the single-frame images data; Its processing procedure in fact still need be from DSP2 to DSP1 such serial processing process; Promptly accomplish the data analysis processing and result is sent to DSP1, carry out processing such as result's stack and compression of images again by DSP1 by DSP2.In order to utilize the advantage of the two DSP frameworks of system better, need a kind of multiple image data stream parallel processing method under the two DSP frameworks of design.
From the view data that acquisition front end obtains, be not single-frame images only, but the continuous multiple frames image data stream so just provide the foundation for parallel processing under pair DSP frameworks.In the utility model, adopted following method.Treatment scheme is following:
Add frame number and group number information from the view data that acquisition front end acquires, so just can be each two field picture of unique difference;
In the DSP1 processor, the multiple image data stream that receives is carried out buffer memory, its cache image frame number can preestablish, and waits for the result of passing back from DSP2;
In the DSP2 processor, view data is handled, and according to certain form result is sent to DSP1, this result leaves the result buffer zone in;
The DSP1 processor is checked through the result buffer zone, matees according to group number and frame number, if a certain frame image data has result, then all frame data to this group superpose, and the update image buffer zone, receives the new image data from acquisition front end;
In the DSP1 processor waiting-timeout is set, in the time of setting, does not wait until processing result image, also can directly add particular result to view data;
Repeatedly according to above step process image data stream.
Adopt above-described method, can realize the parallel processing of two DSP framework hypograph data stream, make the efficient of system perform to maximum.

Claims (3)

1. an Embedded Double DSP information data treating apparatus is characterized in that, is made up of two the first parallel dsp processors and second dsp processor, and two parallel dsp processors are connected to an IMAQ front-end module; Each outer interface module that is provided with of the rear end of two dsp processors.
2. Embedded Double DSP information data treating apparatus according to claim 1 is characterized in that said interface module comprises serial port module, network interface module and memory module.
3. Embedded Double DSP information data treating apparatus according to claim 1 is characterized in that said interface module connects network, SD card and USB storage card respectively.
CN201120247252U 2011-07-14 2011-07-14 Embedded double-DSP information data processing apparatus Expired - Lifetime CN202142188U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102881159A (en) * 2011-07-14 2013-01-16 中国大恒(集团)有限公司北京图像视觉技术分公司 Embedded double-DSP (digital signal processing) information data processing device and method
GB2583509A (en) * 2019-05-01 2020-11-04 Apical Ltd System and method for fault detection and correction
CN113242391A (en) * 2021-07-09 2021-08-10 四川赛狄信息技术股份公司 Video processing board, video processing method and video processing platform

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102881159A (en) * 2011-07-14 2013-01-16 中国大恒(集团)有限公司北京图像视觉技术分公司 Embedded double-DSP (digital signal processing) information data processing device and method
CN102881159B (en) * 2011-07-14 2015-04-22 中国大恒(集团)有限公司北京图像视觉技术分公司 Embedded double-DSP (digital signal processing) information data processing device and method
GB2583509A (en) * 2019-05-01 2020-11-04 Apical Ltd System and method for fault detection and correction
US11470245B2 (en) 2019-05-01 2022-10-11 Arm Limited System and method for fault detection and correction
GB2583509B (en) * 2019-05-01 2023-02-22 Advanced Risc Mach Ltd System and method for fault detection and correction
CN113242391A (en) * 2021-07-09 2021-08-10 四川赛狄信息技术股份公司 Video processing board, video processing method and video processing platform

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Granted publication date: 20120208