CN202103635U - PDM (Pulse Density Modulation) signal generating system - Google Patents
PDM (Pulse Density Modulation) signal generating system Download PDFInfo
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Abstract
Description
技术领域 technical field
本实用新型涉及一种基于PXI6534的PDM信号发生系统。 The utility model relates to a PDM signal generation system based on PXI6534.
背景技术 Background technique
PDM(Pulse Density Modulation)即脉冲密度调制, PDM是一种在数字领域提供模拟信号的调制方法。目前,PDM信号的产生,都是由信号源经过FPGA调制产生。其对应的PDM信号发生系统由信号源(信号发生器或者Audio Precision),FPGA,测试板组成。其首先通过信号源产生标准正弦波或者其它信号;该信号输入到已经烧好Verilg或者VHDL程序的FPGA,经过编译,可以得到PDM信号;该述PDM信号经过测试板,再由信号源或者晶振产生的时钟,即可作为音频或者其它数据的PDM传输格式。 PDM (Pulse Density Modulation) is pulse density modulation, and PDM is a modulation method that provides analog signals in the digital field. At present, the generation of PDM signals is all generated by the signal source through FPGA modulation. The corresponding PDM signal generation system consists of a signal source (signal generator or Audio Precision), FPGA, and a test board. It first generates a standard sine wave or other signal through the signal source; the signal is input to the FPGA that has been burned with Verilg or VHDL program, and after compilation, the PDM signal can be obtained; the PDM signal passes through the test board, and then is generated by the signal source or crystal oscillator The clock can be used as the PDM transmission format of audio or other data.
但是上述PDM信号发生系统存在一些问题: However, there are some problems in the above PDM signal generation system:
第一,这种调制需要信号源,需要懂FPGA知识以及Verilog逻辑语言的相关知识,对操作人员的要求较高。 First, this kind of modulation requires a signal source, requires knowledge of FPGA and Verilog logic language, and has high requirements for operators.
第二,FPGA开发板成本和要求均太高,也过于复杂。 Second, the cost and requirements of the FPGA development board are too high and too complicated.
第三,信号源的价格不菲,也造成了现有PDM信号发生系统的成本过高。 Third, the price of the signal source is high, which also causes the cost of the existing PDM signal generation system to be too high.
第四,每次使用FPGA开发板,均需要烧入程序,其操作十分繁琐。 Fourth, every time the FPGA development board is used, the program needs to be burned in, and the operation is very cumbersome.
第五,现有技术开发流程长,硬件需求复杂。 Fifth, the existing technology has a long development process and complex hardware requirements.
实用新型内容 Utility model content
为了克服现有技术的缺陷,本实用新型公开了一种PDM信号发生系统,其对操作人员要求不高、使用方便、成本低、开发流程短、硬件需求简单。 In order to overcome the defects of the prior art, the utility model discloses a PDM signal generating system, which has low requirements for operators, is convenient to use, low in cost, short in development process and simple in hardware requirements.
本实用新型的技术方案如下: The technical scheme of the utility model is as follows:
一种PDM信号发生系统,包括: PC机、数字信号采集输出模块、转接板;所述PC机与所述数字信号采集输出模块电气连接;所述数字信号采集输出模块与所述转接板电气连接。 A PDM signal generating system, comprising: a PC, a digital signal acquisition output module, an adapter plate; the PC is electrically connected to the digital signal acquisition output module; the digital signal acquisition output module is connected to the adapter plate Electrical connections.
较佳地,所述数字信号采集输出模块为PXI6534。 Preferably, the digital signal acquisition and output module is PXI6534.
第一,其利用PC机中已编好的软件程序,产生数字PDM信号。故在调试时,不必再像现有技术那样,每次都需要向FPGA开发板要烧入程序。 First, it generates digital PDM signals by using software programs programmed in the PC. Therefore, when debugging, it is no longer necessary to burn programs into the FPGA development board every time as in the prior art.
第二,PC机很常见,且PXI6534和转接板的价格都不贵,这样就大大降低了成本。 Second, PCs are very common, and the prices of PXI6534 and adapter boards are not expensive, which greatly reduces the cost.
第三,可以通过直接设置采样频率,时钟频率,以及输出信道就可以直接产生,省去了Vrilog编程,以及导入FPGA借助Audio Precison产生信号的麻烦,使用方便。 Third, it can be directly generated by directly setting the sampling frequency, clock frequency, and output channel, which saves the trouble of Vrilog programming and importing FPGA to generate signals with Audio Precision, and is easy to use.
第四,对操作人员要求不高,开发流程短,硬件需求较为简单。 Fourth, the requirements for operators are not high, the development process is short, and the hardware requirements are relatively simple.
附图说明 Description of drawings
图1为本实用新型实施例的结构示意图。 Fig. 1 is a schematic structural view of an embodiment of the utility model.
具体实施方式 Detailed ways
下方结合附图和具体实施例对本实用新型做进一步的描述。 The utility model will be further described below in conjunction with the accompanying drawings and specific embodiments.
实施例 Example
如图1,一种PDM信号发生系统100,包括: PC机11、数字信号采集输出模块12、转接板13; PC机11与数字信号采集输出模块12电气连接;数字信号采集输出模块12与转接板13连接。
As shown in Figure 1, a kind of PDM
在本实施例中,数字信号采集输出模块12为PXI6534。
In this embodiment, the digital signal acquisition and
本实用新型的系统不仅能产生PDM信号,还能方便更改采样频率和时钟频率,能提供四通道,32channel的信号以及交互时钟。 The system of the utility model can not only generate PDM signals, but also conveniently change the sampling frequency and clock frequency, and can provide four-channel, 32-channel signals and an interactive clock.
下面详细说明其工作过程: The following describes its working process in detail:
S11:在PC机11中通过LabVIEW编程,编写基于PXI6534的VI。
S11: Programming a VI based on PXI6534 in the
S12:PC机11依照上述程序,产生数字PDM信号,以及时钟。 S12: The PC 11 generates a digital PDM signal and a clock according to the above procedure.
S13:PC机11把数字PDM信号以及时钟传输给PXI6534。
S13:
S14:PXI6534通过转接线,接到转接板13上。本实施例中,转接板13为68pin-connector,通过设计到PCB板,经行数据缓冲和电平转换。最后连接到提供信号和时钟的输出接头,即可达到输出PDM模拟信号的目的。
S14: PXI6534 is connected to the
本实用新型可以通过直接设置采样频率,时钟频率,以及输出信道就可以直接产生PDM模拟信号,其省去了Vrilog编程,以及导入FPGA借助Audio Precison产生信号的麻烦,使用方便。 The utility model can directly generate the PDM analog signal by directly setting the sampling frequency, the clock frequency, and the output channel, which saves the trouble of Vrilog programming and importing FPGA to generate signals by means of Audio Precision, and is convenient to use.
与现有技术相比,本实用新型的有益效果如下: Compared with the prior art, the beneficial effects of the utility model are as follows:
第一,其利用PC机中已编好的软件程序,产生数字PDM信号。故在调试时,不必再像现有技术那样,每次都需要向FPGA开发板要烧入程序。 First, it generates digital PDM signals by using software programs programmed in the PC. Therefore, when debugging, it is no longer necessary to burn programs into the FPGA development board every time as in the prior art.
第二,PC机很常见,且PXI6534和转接板的价格都不贵,这样就大大降低了成本。 Second, PCs are very common, and the prices of PXI6534 and adapter boards are not expensive, which greatly reduces the cost.
第三,可以通过直接设置采样频率,时钟频率,以及输出信道就可以直接产生,省去了Vrilog编程,以及导入FPGA借助Audio Precison产生的麻烦,使用方便。 Third, it can be directly generated by directly setting the sampling frequency, clock frequency, and output channel, which saves the trouble of Vrilog programming and importing FPGA with Audio Precision, and is easy to use.
第四,对操作人员要求不高,开发流程短,硬件需求复杂。 Fourth, the requirements for operators are not high, the development process is short, and the hardware requirements are complex.
本实用新型优选实施例只是用于帮助阐述本实用新型。优选实施例并没有详尽叙述所有的细节,也不限制该实用新型仅为所述的具体实施方式。显然,根据本说明书的内容,可作很多的修改和变化。本说明书选取并具体描述这些实施例,是为了更好地解释本实用新型的原理和实际应用,从而使所属技术领域技术人员能很好地利用本实用新型。本实用新型仅受权利要求书及其全部范围和等效物的限制。以上公开的仅为本申请的几个具体实施例,但本申请并非局限于此,任何本领域的技术人员能思之的变化,都应落在本申请的保护范围内。 The preferred embodiments of the present invention are only used to help explain the present invention. The preferred embodiments do not exhaust all details, nor do they limit the utility model to the specific implementations described. Obviously, many modifications and variations can be made based on the contents of this specification. This description selects and specifically describes these embodiments in order to better explain the principle and practical application of the utility model, so that those skilled in the art can make good use of the utility model. The invention is to be limited only by the claims and their full scope and equivalents. The above disclosures are only a few specific embodiments of the present application, but the present application is not limited thereto, and any changes conceivable by those skilled in the art shall fall within the protection scope of the present application.
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