CN201965906U - Speech signal processing device for digital watermark technology - Google Patents
Speech signal processing device for digital watermark technology Download PDFInfo
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- CN201965906U CN201965906U CN2010201483942U CN201020148394U CN201965906U CN 201965906 U CN201965906 U CN 201965906U CN 2010201483942 U CN2010201483942 U CN 2010201483942U CN 201020148394 U CN201020148394 U CN 201020148394U CN 201965906 U CN201965906 U CN 201965906U
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Abstract
The utility model provides a speech signal processing device for a digital watermark technology. The speech signal processing device treats a high-speed digital signal processor (DSP) chip as a core, constructs an embedded speech signal processing system and enables users to process speech signals by utilizing the digital watermark technology in real time. A hardware circuit system of the speech signal processing device comprises a system power supply unit, an audio interface matching unit, an analog signal processing unit, an audio sampling and restoring unit (CODEC), a universal serial bus (USB) function unit, a data storage unit, a DPS chip and a matching circuit unit. A packaging shell of the speech signal is provided with a plurality of system control keys and system running state indicator lights, and users can conveniently operate the device to process signals by utilizing those man-machine interfaces. The speech signal processing device has programmable capacity and data storage capacity, and after users load a watermark algorithm routine developed in advance, the routine is operated by the DSP chip to accomplish corresponding watermark progressing.
Description
Technical field
The utility model relates to multi-subject knowledges such as electronic circuit, voice signal processing, digital watermark technology.In brief, the utility model device is a kind of hardware unit that is applicable to digital watermark technology, this device has certain programmability, can be embedded in the voice communication system voice signal is handled in real time, thereby the engineering that realizes the speech digit digital watermark is used.
Background technology
Digital watermark technology has constantly received scientific research personnel's fervent concern since being born.Along with all multidisciplinary introducings such as human aesthesiology, signal analysis, the research work in this emerging technology field of digital watermarking more and more is tending towards theorizing, systematization in recent years; Various watermarking algorithms at several data carriers such as image, video, audio frequency emerge in an endless stream, but still allow of no optimist from engineering application point of view situation, and the kind of practical digital watermarking product, quantity are all very few and application surface is narrow.At present, the Project Realization platform of digital watermark depends on the PC with powerful data processing function more, this obviously is not suitable for the conventional voice communications system---and great amount of terminals equipment does not possess programmability in the conventional voice communications system, can't realize the processing again to voice signal.The purpose of this utility model is to make digital watermark technology to be fully used in the conventional voice communications system, realize a kind of portable intelligent speech signal processing device that is applicable to voice communication system, finish the engineering of function expansion, realization digital watermark technology with auxiliary various types of communication terminal and use.
In recent years, increasing high-performance, low-power consumption, small size intelligent chip appear on the market in a large number, and the real-time treating apparatus of voice signal of developing a kind of low cost, high integration, good stability for us of extensively popularizing of these chips provides hardware foundation.The utility model is through multi-argument and practice, finally selected for use by TI company and produced, and has 8 passage Harvards bus-structured high-speed floating point type dsp chip and realizes real-time processing at voice signal.
Summary of the invention
The utility model has designed a kind of speech signal processing device that is applicable to digital watermark technology, this device has certain programmability, can in user's normal talking process, handle in real time, with the speech digit watermarking algorithm of realizing that the user sets voice signal; This device can be widely used within the various types of voice communication system, and the user only need access to its series connection in original communication facilities and get final product during use, need not original communication facilities is carried out circuit modification.The user can utilize this device to carry out different watermarking algorithms according to different application demands, uses with the engineering that realizes digital watermark.
A kind of speech signal processing device of digital watermark technology that is applicable to is made up of encapsulating housing and internal circuitry, its Circuits System is made of SPU, audio interface matching unit, analogy signal processing unit, audio sample and reduction unit, USB functional unit, data storage cell, dsp chip and support circuit unit thereof, structure as shown in Figure 1:
1. SPU is connected with all circuit units in the device, provides electric energy for installing normal operation;
2. the audio interface matching unit externally is connected with the sound signal external-connected port, is used to adjust the matching status of port path;
3. the audio interface matching unit internally is connected with analogy signal processing unit, and the voice signal that is used for correctly inserting is sent to analogy signal processing unit and handles, or the voice signal that will handle is derived in the sound signal external-connected port;
4.DSP chip is connected with the audio interface matching unit by corresponding signal power amplifier, is used for the matching status of control audio Interface Matching unit conversion port path;
5. analogy signal processing unit is connected with reduction unit with audio sample, and the voice signal that is used for having passed through simulation process is sent to audio sample and reduction unit carries out the ADC conversion, or carries out resume module to having passed through the voice signal that the DAC reduction handles;
6. audio sample is connected with dsp chip with reduction unit, the audio digital signals that has been used for passing through the ADC conversion is sent to dsp chip and handles, or carry out the DAC conversion to having passed through the audio digital signals that watermarking algorithm handles, it is reduced to simulating signal;
7. data storage cell is connected with dsp chip, is used to dsp chip that internal memory expansion and outage nonvolatile storage space are provided;
8.USB functional unit is connected with dsp chip, is used for the auxiliary DSP chip and finishes the expansion of usb protocol function;
9.DSP the chip support circuit is used to this device to provide program download interface, system state to show and the down trigger function.
The signal processing flow of this device can be described as: after voice signal imports by audio input interface, this signal will at first pass through analog signal processing, improve its PSNR value, by the audio sample unit it be carried out quantised samples again, to produce speech data; Subsequently, obtain this data, and utilize set watermarking algorithm that it is handled, make it to carry watermark information or from voice signal, extract watermark information by dsp chip; Afterwards, the speech data that dsp chip will be handled again is sent to the audio frequency reduction unit, so that audio digital signals is reduced to analog voice signal; Finally, by audio output interface the voice signal that is reduced is derived, to finish signal processing flow, its design concept as shown in Figure 2 again.
This device is supported usb protocol, and the user can utilize the internal USB port that this device is linked to each other with PC, to download or to upload watermark information.This function is finished by the chip that has the usb protocol analytic ability (ISP1581) auxiliary DSP chip---and set up in the process at the usb data passage, dsp chip is responsible for the exchange and the transmission of control protocol data.
In order clearly to describe out the summary of the invention of this device, Fig. 1～9 have provided the design drawing of the interior integrated circuit system of device and each circuit block:
1. SPU is made up of three modules, and corresponding principle design and modular structure are as shown in Figure 3.Wherein the power supervisor module has the power source change of supervision, these two functions of management battery charge, but this power management module automatic configuration system powering mode---external power supply power supply, internal cell power supply.When using the external power supply power supply, extra electric energy is a battery charge in the power supervisor utilisation system; After battery charge is saturated, this module will stop charging process automatically, and show current charged state by the duty of adjusting charging indicator light.3.3V digital power module, 1.2V DSP core power module can be reduced to 3.3V and 1.2V respectively with the 5.0V supply voltage by its inner high-quality DC-DC chip among Fig. 3, use for digital circuit and dsp chip kernel.3.3V the analog power module is in order to reduce the signal noise influence that mimic channel may bring, and independent mimic channel power supply, its project organization is consistent with the 3.3V digital power, and output voltage is 3.3V.
2. audio interface matching unit, Fig. 4 has provided the design frame chart of audio interface match circuit.This circuit module has two functions: the one, and for system reserves the circuit expansion interface, the user can load different expansion interfaces according to the different application scene, inserts with the physical port of finishing different model; The 2nd, for system provides self-adapting type signal path change-over circuit, insert with the self-adaptation of finishing the variety classes audio frequency apparatus, particularly at common audio equipment such as external mobile phone headset, telephone handles.
3. analogy signal processing unit, Fig. 5 has provided the design frame chart of analog signal processing circuit.This circuit module is mainly finished analog voice signal and is amplified and these two functions of analog voice signal filtering.For amplification,, thereby have a strong impact on acoustical quality because signal will inevitably produce certain energy loss and wave form distortion in access procedure, processing procedure.In order to improve this situation, native system utilizes high precision operating amplifier to make up amplifying circuit of analog signal, has improved the acoustical quality of voice signal.For filtering, it has dual purpose: the one, because most voice communication systems are band general formula system, for example the passband of landline telephone system is 300～3400Hz, therefore can be according to the practical application request of different system, suitably the high frequency composition of filtered signal and low frequency composition, white Gaussian noise improves the acoustical quality of speech to the influence of signal in the circuit to reduce; The 2nd, for the digitized sampling and the follow-up digital signal processing of sound signal are done necessary simulating signal finishing.
4. audio sample and reduction unit, Fig. 6 have provided audio sample and the design frame chart of going back primary circuit.The high-performance CODEC chip that native system utilizes TI company to produce makes up this circuit unit.The employed CODEC chip of native system has ADC simultaneously concurrently, and DAC dual signal processing capacity can finish these two work of analog signal digital collection and digital signal simulation reduction efficiently, and precision is 16bit.Its supports SPI agreement in data transmission, utilize this agreement can set up easily and the DSP master chip between data transmission channel.
5.USB functional unit, Fig. 7 have provided the design frame chart of USB chip and peripheral circuit thereof.The function of this partial circuit mainly is that the ISP1581 chip that utilizes PHILIPS company to produce realizes that the hardware of usb protocol resolves, and finishes protocol extension with the auxiliary DSP chip.Because the selected DSP master chip of native system do not support usb protocol, so this device utilizes ISP1581 to come the auxiliary DSP master chip to finish the usb protocol expansion, communicates by letter with the rapid data between PC to set up this device.
6. data storage cell, Fig. 8 has provided the design frame chart of memory circuit cells.This circuit module comprises two parts content: the one, and RAM chip and configuration circuit thereof---for dsp chip provides the internal memory expansion; The 2nd, FLASH chip and configuration circuit thereof---for system provides nonvolatile storage space.
7.DSP chip and support circuit unit thereof, Fig. 9 has provided the design frame chart of dsp chip and support circuit thereof.This circuit module comprises: Reset controlling sub, jtag interface submodule, button driven element module, pilot lamp driven element module.Because the unusual fluctuations meeting of power supply causes harmful effect to the stable operation of system, the operate as normal of chip, so system needs the real time monitoring power source change, and restart or stop the running status of related chip and system in the moment of necessity, so this device utilizes the Reset control module to finish this function.Because the signal power of most DSP emulators is too small, can't normally be connected with dsp chip, therefore this device utilizes the jtag interface module to set up data transmission channel between dsp chip and the external emulator, and this design has improved the power that connects between emulator and this device.Since in the dsp chip driving force of GPIO (general I/O) pin a little less than, can't provide the electric energy of abundance for the higher relatively circuit unit of energy consumptions such as pilot lamp, button, so native system has designed drive circuit of indicator respectively, the button driving circuit drives these circuit units and runs well.Because dsp chip has certain programmability, the developer can be wherein burned with pre-designed algorithm routine, moves this program by dsp chip afterwards and just can carry out corresponding watermarking algorithm.
Description of drawings
Fig. 1 is a circuit system structure design frame chart of the present utility model.
Fig. 2 is signal processing flow figure of the present utility model.
Fig. 3 is a power circuit design frame chart of the present utility model.
Fig. 4 is an audio interface circuit design frame chart of the present utility model.
Fig. 5 is an analog signal processing circuit design frame chart of the present utility model.
Fig. 6 is audio sample of the present utility model and reduction circuit design block diagram.
Fig. 7 is USB chip of the present utility model and periphery circuit design block diagram thereof.
Fig. 8 is a storage chip circuit design block diagram of the present utility model.
Fig. 9 is dsp chip of the present utility model and support circuit design frame chart thereof.
Figure 10 is a shell physical arrangement synoptic diagram of the present utility model.
Description of reference numerals:
301. power supervisors among Fig. 3,302. rechargeable batteries, 303.DC-DC3.3V analog power, 304.DC-DC3.3Vs digital power, 305.DC-DC1.2VDSP core power.
401～405 channel controllers among Fig. 4,406. power amplifiers.
501. bandpass filter among Fig. 5,502. signal amplifiers, 503. signal amplifiers, 504. bandpass filter, 505. signal amplifiers, 506. signal amplifiers.
601.CODEC demoder among Fig. 6.
701.ISP1581USB protocol resolver among Fig. 7.
801.RAM data-carrier store among Fig. 8, the 802.FLASH data-carrier store.
901. button driver modules among Fig. 9,902.DSP emulator interface, 903. pilot lamp driver modules, 904.Reset control module, 905.DSP chip.
B1. reset button among Figure 10, B2. watermark embedding operation button, B3. watermark repeats the embedding operation button, B4. channel selecting action button, B5. power switch, the green system reset status indicator lamp of LED1., the red power light of LED2., LED3. green charged state pilot lamp, LED4. red charged state pilot lamp, the green watermark EO of LED5. status indicator lamp, the red watermark of LED6. repeats the embedding operation status indicator lamp, LED7. green watermark operating state indicator lamp, LED8. red channel selection operation status indicator lamp, P1. power port, P2. audio signal port, P3. audio signal port, the P4.USB port.
Embodiment
Consult Fig. 1～10, specific embodiments of the present utility model is described below:
(1) power unit.This device built-in rechargeable battery 302 (see figure 3)s, device can work in powered battery state or external power power supply state, if battery 302 is in under-voltage condition, then needing external direct-flow voltage regulation source is system's power supply; The 5.0V D.C. regulated power supply can be inserted this device by power port P1 (see figure 10); The user is by the connection status between switch B5 (seeing Fig. 3,10) controllable power manager 301 (see figure 3)s and the subsequent conditioning circuit; After the user connected switch B5, red power light LED2 (seeing Fig. 3,10) will be lighted; If system is in the external power supply power supply state, then power supervisor 301 will distribute the electric energy usage rate automatically, is battery 302 chargings off and on.Charging finishes back power supervisor 301 will stop charging process automatically, and inform the current charged state of user by charged state pilot lamp LED3, LED4 (seeing Fig. 3,10)---the LED3 green light lights in the charging process, charging finishes back LED4 red light and lights, and two lamps are along with different states is alternately lighted.In addition, if internal battery is in electric energy state of saturation and external power supply when not existing, power supervisor 301 will be configured to battery powered mode automatically.Subsequently, 5.0V voltage will produce 3.3V mimic channel power supply through DC-DC3.3V power transfer module 303 (see figure 3)s, produce 3.3V digital circuit power supply through DC-DC3.3V power transfer module 304 (see figure 3)s, produce DSP kernel power supply through DC-DC1.2V power transfer module 305 (see figure 3)s, be respectively the related circuit power supply.
(2) system start-up part.DSP module 905 (see figure 8)s will at first be carried out the bootstrapping start-up routine of being preserved in FLASH module 802 (see figure 8)s after system powers on, again the system program of storage in the FLASH module 802 is moved in RAM module 801 (see figure 8)s afterwards, and carried out this program and finish system loads.
(3) initial configuration of CODEC chip.In the system starting process, DSP module 905 (see figure 6)s will be by the data exchange channel between foundation of SPI agreement and CODEC module 601 (see figure 6)s, and DSP module 905 sends to CODEC module 601 with initializes configuration information subsequently.SDIN is the configuration data transmission line among Fig. 6, is input interface in the CODEC die terminals, is responsible for the configuration information that transmission DSP module 905 sends; SCLK is a clock signal transmission line, is input interface in the CODEC die terminals, is responsible for assisting SDIN to finish data transmission.After finishing initial configuration, just can set up the interactive data passage between CODEC module 601 and the DSP module 905, the foundation of this data channel makes DSP module 905 can obtain and handle the speech data that collects in real time, make it to carry the watermark information of user preset, or from voice signal, extract watermark information.Wherein the CODEC chip is two-way ADC, DAC speech coder in the CODEC module 601, and the sampling precision on each road is 16bit, can handle MIC, earphone signal in the handset earphone line independently.Can finish data interaction by simple SPI host-host protocol between CODEC module 601 and the DSP module 905, wherein LCROUT and DOUT have formed the one-way data passage of CODEC module 601 to DSP module 905 among Fig. 6, LRCIN and DIN have formed the one-way data passage of DSP module 905 to CODEC module 601, BCLK is the reference clock signal output line of CODEC module 601, for DSP module 905 provides data transmission required reference clock.
(4) voice-frequency channel matching treatment part.After system start-up finishes, the user should insert this device by P2 port (seeing Fig. 4,10) with external loudspeaker in original communication facilities and acoustic pickup, and by P3 port (seeing Fig. 4,10) this device is connected with the acoustic pickup access interface with the external loudspeaker of original communication facilities, so that be embedded in this device in original communication facilities and obtain voice signal.After finishing attended operation, if whether the user can come the determining interface channel status correct according to the actual working state of device---state is correct, but then device inserts the original communication facilities operate as normal in back.The user can produce to jump along triggering DSP module 905 under the level and carry out automatic matching treatment by pressing button B4 (seeing Fig. 4,10).Coupling adjustment will be finished automatically by DSP module 905 control channel controllers 401～405 (see figure 4)s, and wherein channel controller is a dpdt double-pole double-throw (DPDT) electric-controlled mechanical switch, is used to adjust signal path.If whether DSP module 905 can come in the judgment means signal path correct by the voice signal energy feature---incorrect, then DSP module 905 will send out the conducting configuration that array control signal is adjusted the channel controller array, to finish the automatic matching treatment of interface.But because the control signal power that DSP module 905 produces is low excessively, can't directly drive passage gating array and finish the configuration conversion, therefore the control signal of being sent is power amplifier 406 (see figure 4)s through being made of the positive-negative-positive triode at first, and admission passage gating array is adjusted the conducting state of dpdt double-pole double-throw (DPDT) electric-controlled mechanical switch more afterwards.The term of execution of matching treatment, DSP module 905 will be lighted red led LED8 (seeing Fig. 4,10), with display process just in commission.
(5) watermark information uploads and downloads the processing section.This device can be identified as USB device automatically by PC, so the user can be downloaded to watermark information in the device easily or is uploaded to PC end by usb protocol.Wherein, the usb protocol in the device is realized by ISP1581 module 701 (see figure 7) auxiliary DSP modules 905.The user can will install with PC by USB port P4 (seeing Fig. 7,10) and link to each other, and be that ISP1581 module 701 is carried 5.0V direct current supply energy by PC; To at first pass through ISP1581 module 701 from PC end data downloaded, and it be carried out transferring to DSP module 905 execution data contents processing again after the protocol analysis by ISP1581 module 701; Any data that DSP module 905 produces will be uploaded among the PC after also will handling by ISP1581 module 701, and wherein D+, the D-in Fig. 7 combines the data line that constitutes USB port.
(6) voice signal processing section.Signal processing flow as shown in Figure 2.The user should at first utilize voice-frequency channel match circuit shown in Figure 4 that signal is correctly introduced this device, utilizes analog signal processing circuit shown in Figure 5 to the signal preceding pre-service of sampling afterwards again.Native system is divided into two classes with voice signal, i.e. MIC signal and earphone signal; Earphone signal is that therefore received signal can not become watermark carrier to the user, and can only be as the process object of watermark extracting algorithm, and the loading of watermark information embeds processing at the MIC signal information of carrying out and realizes.After the correct access of signal, entering before CODEC module 601 carries out quantised samples: the MIC signal will be at first by bandpass filter 501 (see figure 5)s---and passband is 200Hz～4000Hz (frequency band is adjustable), to reduce in the circuit white Gaussian noise to the influence of signal; The MIC signal will be by signal amplifier 503 (see figure 5)s afterwards---and the in-phase proportion computing circuit that signal amplification circuit is built by high precision operating amplifier constitutes, to improve the PSNR value of signal; And earphone signal will be by signal amplifier 502 (see figure 5)s, to improve its wave-shape amplitude.After finishing the simulating signal pre-service, CODEC module 601 will be carried out sample code simultaneously to the two-way voice signal, and can obtain precision thus is the two-way audio digital signals of 16bit.After DSP module 905 gets access to the speech data that is produced by CODEC module 601, will carry out watermark to data according to the watermarking algorithm of user's download and embed, extract and handle, so that it carries watermark information or extract watermark information from speech data; Subsequently, the speech data that DSP module 905 will be handled sends to CODEC module 601, and CODEC module 601 will utilize its DAC processing power that digital signal is reduced to simulating signal.The voice signal that is reduced will at first carry out filtering by bandpass filter 504 (see figure 5)s, afterwards again by signal amplifier 506 (see figure 5)s, to improve its PSNR value; The MIC signal then only needs to amplify by signal amplifier 505 (see figure 5)s; Finally, treated voice signal will be exported to former communication facilities by circuit shown in Figure 4.The circuit structure of the signal amplifier 502,503,505,506 shown in Fig. 5 is consistent with each other, and the circuit structure of bandpass filter 501,504 is consistent, passband is identical.
(7) system reset part.System reset is the necessary means of safeguards system stable operation, and this device has three kinds of reset modes: electrification reset, and button resets, and system power supply automatically resets when unstable.Reply by cable wherein and be meant when powering on again behind the system cut-off resetting in the chip restart procedure; In system's operational process, it is the necessary means that makes the system recovery original state that the artificial button that triggers resets; In addition, when the timing of power work unstable state, system should in time automatically reset, and is without prejudice, guarantees the correctness of operation result with the protection related chip.Except that electrification reset, all the other two kinds of reset modes must utilize Reset module 904 (see figure 8)s to finish.The user can produce the low level reset trigger signal by pushing reset operation key B1 (seeing Fig. 8,10), after Reset module 904 is received this trigger pip, will send two-way reset signal control DSP module 905 immediately, FLASH module 802 resets; After the user decontrols button B1, the low level reset trigger signal will return to high level state, and Reset module 904 will be controlled FLASH module 802 and take the lead in withdrawing from reset mode, and time delay is controlled DSP module 905 again and withdrawed from reset mode after 1 second; During this period, green system reset pilot lamp LED1 (seeing Fig. 8,10) will be lighted.Reset module 904 can be monitored the operation conditions of DSP core power 1.2V and digital power 3.3V simultaneously, and when Reset module 904 monitors line related generation unusual fluctuations, module 904 will produce reset signal immediately, and control system enters reset mode; When condition satisfied, module 904 withdrawed from control system from reset mode and closes homing light LED1, and wherein FLASH module 802 withdraws from reset mode prior to DSP module 905.
(8) DSP module support circuit.The support circuit of DSP module comprises four partial contents: button driver module 901 (see figure 9)s, jtag interface module 902 (see figure 9)s, pilot lamp driver module 903 (see figure 9)s, Reset module 904 (see figure 9)s; This device provides necessary by key control and system state Presentation Function for the user, but because the less high-power circuit that can't directly drag of the power of dsp chip runs well, be head it off, this device has used the corresponding driving circuit, has overcome the weak defective of dsp chip carrying load ability.In button driver module 901 parts, this device utilizes the unidirectional on state characteristic of diode, has made up to draw diode button driving circuit, generates the low level pulse signal with modifier key B2, B3 (seeing Fig. 9,10), carries out event response thereby trigger dsp chip.In pilot lamp driver module 903 parts, this device utilizes NPN type triode to make up signal amplification circuit, with the light on and off of auxiliary DSP chip controls status indicator lamp.Exploitation dsp software system often be unable to do without the support of hardware emulator, but because all there is the too small shortcoming of signal power in most external emulators, can't directly dock with DSP module 905, therefore this device utilizes logic sum gate to make up driving circuit at the tck clock signal, finish and being connected of this device with auxiliary external emulator, improved joint efficiency.
(9) watermark processing operation.Be the language process function that proves absolutely that this device is realized, at this will be example with the watermark embed process only, describe the duty of operation steps of user and system in detail: the user at first sends to this device with watermark information to be embedded by USB port P4 (see figure 10), can utilize button B2 (see figure 10) to start the voice watermark subsequently and embed processing; After receiving that button B2 sends enabling signal, DSP module 905 (see figure 9)s will automatically perform default watermarking algorithm, and light green indicating lamp LED7 (see figure 10), embed with prompting user watermark and handle just in commission; Watermark is closed pilot lamp LED7 by DSP module 905 after embedding the processing end again; If in watermark embed process, certain section watermark data need be repeated to embed, then the user can utilize button B3 (see figure 10) to start watermark data and repeat to embed processing procedure, DSP module 905 will be lighted red led LED6 (see figure 10) simultaneously, repeat to embed with the prompting user and handle just in commission; After repeating to embed the processing end, close pilot lamp LED6 by DSP module 905 again; After watermark embedding processing procedure finishes fully, DSP module 905 will be lighted green indicating lamp LED5 (see figure 10) and close green indicating lamp LED7, embed to handle fully with prompting operation person's watermark and finish.
Claims (9)
1. a speech signal processing device that is applicable to digital watermark technology is made up of encapsulating housing and internal circuitry, its Circuits System is made of SPU, audio interface matching unit, analogy signal processing unit, audio sample and reduction unit, USB functional unit, data storage cell, dsp chip and support circuit unit thereof, and feature is:
1) SPU is connected with all circuit units in the device, provides electric energy for installing normal operation;
2) the audio interface matching unit externally is connected with the sound signal external-connected port, is used to adjust the matching status of port path;
3) the audio interface matching unit internally is connected with analogy signal processing unit, and the voice signal that is used for correctly inserting is sent to analogy signal processing unit and handles, or the voice signal that will handle is derived in the sound signal external-connected port;
4) dsp chip is connected with the audio interface matching unit by corresponding signal power amplifier, is used for the matching status of control audio Interface Matching unit conversion port path;
5) analogy signal processing unit is connected with reduction unit with audio sample, and the voice signal that is used for having passed through simulation process is sent to audio sample and reduction unit carries out the ADC conversion, or carries out resume module to having passed through the voice signal that the DAC reduction handles;
6) audio sample is connected with dsp chip with reduction unit, the audio digital signals that has been used for passing through the ADC conversion is sent to dsp chip and handles, or carry out the DAC conversion to having passed through the audio digital signals that watermarking algorithm handles, it is reduced to simulating signal;
7) data storage cell is connected with dsp chip, is used to dsp chip that internal memory expansion and outage nonvolatile storage space are provided;
8) the USB functional unit is connected with dsp chip, is used for the auxiliary DSP chip and finishes the expansion of usb protocol function;
9) the dsp chip support circuit is used to this device to provide program download interface, system state to show and the down trigger function.
2. the speech signal processing device that is applicable to digital watermark technology according to claim 1 is characterized in that:
1) SPU is made of 5 circuit blocks, that is: power supervisor, rechargeable battery, DC-DC 3.3V digital circuit power supply, DC-DC 3.3V mimic channel power supply, DC-DC 1.2V DSP core power;
2) power supervisor externally is connected with the external power supply port, so that external electric energy is introduced this device;
3) power supervisor internally is connected with DC-DC 3.3V digital circuit power supply, DC-DC 3.3V mimic channel power supply, DC-DC1.2V DSP core power, is responsible for the user mode that electric energy internally is provided and distributes electric energy;
4) power supervisor internally is connected with rechargeable battery, is responsible for the user mode and the charged state of control battery;
5) DC-DC 3.3V digital circuit power supply is responsible for digital circuit provides electric energy, DC-DC 3.3V mimic channel power supply is responsible for mimic channel provides electric energy, the two circuit structure is identical, splitting comes is in order to improve the stability of power supply, and DC-DC 1.2V DSP core power is responsible for the dsp chip kernel provides electric energy.
3. the speech signal processing device that is applicable to digital watermark technology according to claim 1 is characterized in that:
1) main body of audio interface matching unit is made of 5 dpdt double-pole double-throw (DPDT) electric-controlled mechanical switch arrays;
2) the GPIO pin of dsp chip is connected with 5 dpdt double-pole double-throw (DPDT) electric-controlled mechanical switches by signal power amplifier, the guiding path that is used for the conversion mechanical switch, adjust loudspeaker and the MIC path matching status of signal separately, to finish the correct access of voice signal;
3) dsp chip is monitored voice signal energy feature in the voice-frequency channel by real-time, but the self-adjusting channel status.
4. the speech signal processing device that is applicable to digital watermark technology according to claim 1 is characterized in that:
1) analogy signal processing unit is made of signal amplification circuit and signal bandwidth-limited circuit;
2) this device utilizes high precision operating amplifier to make up amplifying circuit of analog signal, can handle loudspeaker and MIC double-channel audio signal respectively, and signal amplification factor is adjustable;
3) this device utilizes band general formula filtering chip to make up the signal bandwidth-limited circuit, and the MIC signal is carried out filtering before the ADC, loudspeaker signal is carried out filtering behind the DAC, and frequency band is adjustable.
5. the speech signal processing device that is applicable to digital watermark technology according to claim 1 is characterized in that:
1) audio sample and reduction unit are made of CODEC chip and support circuit thereof;
2) this chip has double-channel audio signal ADC/DAC function, and its single channel data precision is 16bit, and direct and dsp chip is set up bidirectional data communication.
6. the speech signal processing device that is applicable to digital watermark technology according to claim 1, it is characterized in that: the USB functional unit is made of ISP1581 chip and support circuit thereof, the ISP1581 chip is the usb protocol analysis chip, be responsible for the auxiliary DSP chip and finish agreement and expand, dsp chip utilize the ISP1581 chip can set up and PC between data transmission channel.
7. the speech signal processing device that is applicable to digital watermark technology according to claim 1, it is characterized in that: data storage cell is made of two parts content, that is: RAM chip and support circuit thereof, FLASH chip and support circuit thereof, the RAM chip provides the internal memory expansion for dsp chip, its data-bus width is 16bit, the FLASH chip provides the outage nonvolatile storage space for dsp chip, and its data-bus width is 8bit.
8. the speech signal processing device that is applicable to digital watermark technology according to claim 1 is characterized in that:
1) dsp chip and support circuit unit are made of dsp chip, button driving circuit, drive circuit of indicator, jtag interface circuit, Reset control circuit,
2) operation push-button on the encapsulating housing is connected with dsp chip by the button driving circuit, is responsible for sending the breakout service request signal to dsp chip;
3) dsp chip is connected with system state indicator on the encapsulating housing by drive circuit of indicator, is responsible for the duty of each pilot lamp of control, with the running status of display system;
4) the built-in jtag interface in the device is connected with dsp chip by the jtag interface circuit, is responsible for the data communication between realization dsp chip and the external emulator;
5) the Reset control circuit at first is connected with reset key, DC-DC 3.3V digital power, DC-DC 1.2VDSP core power on the encapsulating housing, is responsible for monitoring and reset trigger pip and power work state; Secondly be connected with dsp chip, FLASH chip, so that behind user's triggering system reset operation, or at the power work unstable state regularly, dsp chip and FLASH chip in time reset; When the normal condition that starts of system satisfies, withdraw from reset mode by Reset control circuit guiding FLAH chip prior to dsp chip again.
9. the speech signal processing device that is applicable to digital watermark technology according to claim 1, it is characterized in that: comprise a power port on the encapsulating housing, a USB port, an earphone Mike input port, an earphone Mike output port, a power switch, a system reset button, an audio interface matching treatment triggers button, and two watermark processing trigger button, a red power light, a green reset mode pilot lamp, a red charged state pilot lamp, a green charged state pilot lamp, four watermarking algorithm running state of programs pilot lamp.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201483942U CN201965906U (en) | 2010-04-01 | 2010-04-01 | Speech signal processing device for digital watermark technology |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201483942U CN201965906U (en) | 2010-04-01 | 2010-04-01 | Speech signal processing device for digital watermark technology |
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| CN201965906U true CN201965906U (en) | 2011-09-07 |
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| CN2010201483942U Expired - Fee Related CN201965906U (en) | 2010-04-01 | 2010-04-01 | Speech signal processing device for digital watermark technology |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103354084A (en) * | 2013-07-12 | 2013-10-16 | 广东欧珀移动通信有限公司 | LCD (Liquid Crystal Display) polarity-overturn control method and display terminal |
| CN104347078A (en) * | 2013-08-09 | 2015-02-11 | 汤姆逊许可公司 | Second screen device and system |
| CN105283915A (en) * | 2013-06-11 | 2016-01-27 | 株式会社东芝 | Digital-watermark embedding device, digital-watermark detection device, digital-watermark embedding method, digital-watermark detection method, digital-watermark embedding program, and digital-watermark detection program |
-
2010
- 2010-04-01 CN CN2010201483942U patent/CN201965906U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105283915A (en) * | 2013-06-11 | 2016-01-27 | 株式会社东芝 | Digital-watermark embedding device, digital-watermark detection device, digital-watermark embedding method, digital-watermark detection method, digital-watermark embedding program, and digital-watermark detection program |
| CN105283915B (en) * | 2013-06-11 | 2019-05-07 | 株式会社东芝 | Digital watermark embedding device and method and digital watermark detecting device and method |
| CN103354084A (en) * | 2013-07-12 | 2013-10-16 | 广东欧珀移动通信有限公司 | LCD (Liquid Crystal Display) polarity-overturn control method and display terminal |
| CN104347078A (en) * | 2013-08-09 | 2015-02-11 | 汤姆逊许可公司 | Second screen device and system |
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