Summary of the invention
The utility model provides a kind of display panels, with the structure of forced fluid LCD panel, and increases anti-pressure ability.
The utility model proposes a kind of display panels, comprise an active component array base board, a plurality of distance piece, a colored optical filtering substrates, a liquid crystal layer and a frame glue.Active component array base board comprises a substrate and a pixel array, and substrate has one first viewing area and one first non-display area, and wherein first non-display area centers on first viewing area, and pixel array is disposed in first viewing area.Colored optical filtering substrates has one second viewing area and one second non-display area, corresponding first viewing area, second viewing area wherein, and corresponding first non-display area of second non-display area.These spacer arrangement in second viewing area with second non-display area in.Liquid crystal layer is disposed between active component array base board and the colored optical filtering substrates.Frame glue is connected between active component array base board and the colored optical filtering substrates, and is disposed in first non-display area, and its center glue is around liquid crystal layer and these distance pieces.
In the utility model one embodiment, above-mentioned pixel array comprises multi-strip scanning line, many data lines, many shared lines and a plurality of picture elements unit.Many data lines and these sweep traces are staggered, and many shared lines and these sweep traces are arranged side by side.A plurality of picture elements unit electrically connects these sweep traces, these data lines and these bridging lines.
In the utility model one embodiment, a plurality of distance pieces are positioned at the top of these sweep traces, and other a plurality of distance piece is positioned at the top of these bridging lines.
In the utility model one embodiment, above-mentioned active component array base board also comprises on one insulation course and insulation course once.Last insulation course covers these data lines and following insulation course, and following insulation course covers these sweep traces and these bridging lines, and these distance pieces all are configured on the insulation course, and insulation course is gone up in contact.
In the utility model one embodiment, the above-mentioned insulation course of going up comprises a macromolecule layer and a dielectric layer.Macromolecule layer covers dielectric layer, and dielectric layer is between macromolecule layer and substrate.
In the utility model one embodiment, above-mentioned macromolecule layer has a plurality of grooves, corresponding one of them distance piece of each groove (recess).
In the utility model one embodiment, above-mentioned active component array base board also comprises a plurality of first bed courses.These first bed courses are between last insulation course and these bridging lines, and a plurality of distance piece lays respectively at the top of these first bed courses.
In the utility model one embodiment, above-mentioned active component array base board also comprises a plurality of second bed courses.These second bed courses are between last insulation course and these sweep traces, and other a plurality of distance piece lays respectively at the top of these second bed courses, and wherein the thickness of these second bed courses is greater than the thickness of these first bed courses.
In the utility model one embodiment, each second bed course comprises a semi-conductor layer and a metal level, and metal level is between semiconductor layer and last insulation course.
In the utility model one embodiment, above-mentioned active component array base board also comprises a plurality of shared signal bus-bars.These shared signal bus-bars all are disposed in first non-display area, and a plurality of distance piece is positioned at the top of these shared signal bus-bars.
In the utility model one embodiment, each shared signal bus-bar comprises a first metal layer, one second metal level and a transparency conducting layer.The first metal layer is disposed on the substrate, and insulation course covers the first metal layer down.Second metal level is disposed at down on the insulation course, and upward insulation course covers second metal level, wherein the local the first metal layer that hides of second metal level.Transparency conducting layer is disposed on the insulation course, and electrically connects second metal level and pixel array.
In the utility model one embodiment, a plurality of distance pieces are positioned at the top of second metal level, and other a plurality of distance piece is positioned at not the top of the first metal layer that is hidden by second metal level.
In the utility model one embodiment, above-mentioned active component array base board also comprises a plurality of bed courses.These bed courses all are disposed in first non-display area, and between these shared signal bus-bars and frame glue, wherein descend insulation course to cover these bed courses, and a plurality of distance piece is disposed at these bed course tops respectively.
In the utility model one embodiment, these bed courses all are electrically insulated with pixel array.
In the utility model one embodiment, above-mentioned active component array base board also comprises a plurality of first pad portions and a plurality of second pad portion, wherein go up insulation course and cover these first pad portions and these second pad portions, and these first pad portions and these second pad portions all are disposed at the top of these bed courses.A plurality of distance pieces are disposed at the top of these first pad portions and the top of these second pad portions respectively.
In the utility model one embodiment, the thickness of these second pad portions is greater than the thickness of these first pad portions.
In the utility model one embodiment, each second pad portion comprises a metal level and semi-conductor layer, and metal level is between semiconductor layer and last insulation course.
Based on above-mentioned and since these spacer arrangement in second viewing area with second non-display area in, therefore compared to known display panels, the structure that the utility model can the forced fluid LCD panel, thereby have preferable anti-pressure ability.
For the above-mentioned feature and advantage of the utility model can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Figure 1A is the schematic top plan view of the utility model first embodiment display panels.
Figure 1B is the diagrammatic cross-section that A-A section along the line is drawn among Figure 1A.
Fig. 2 A is that display panels among Figure 1A is at the enlarged diagram of first viewing area.
Fig. 2 B is the diagrammatic cross-section that I-I section along the line is drawn among Fig. 2 A.
Fig. 2 C is the diagrammatic cross-section of display panels before pressing among Fig. 2 B.
Fig. 3 A is that display panels among Figure 1A is at the enlarged diagram at shared signal bus-bar place.
Fig. 3 B is the diagrammatic cross-section that II-II section along the line is drawn among Fig. 3 A.
Fig. 4 A is that display panels among Figure 1A is at the enlarged diagram of first non-display area.
Fig. 4 B is the diagrammatic cross-section that III-III section along the line is drawn among Fig. 4 A.
Fig. 5 A is the enlarged diagram of the utility model second embodiment display panels in first viewing area.
Fig. 5 B is the diagrammatic cross-section that IV-IV section along the line is drawn among Fig. 5 A.
Fig. 6 A is the enlarged diagram of the utility model second embodiment display panels at first non-display area.
Fig. 6 B is the diagrammatic cross-section that V-V section along the line is drawn among Fig. 6 A.
[main element symbol description]
100,300 display panels
110,310 active component array base boards
112 substrates
112a first viewing area
112b first non-display area
114 pixel arrays
The 114c bridging line
The 114d data line
The 114s sweep trace
116 shared signal bus-bars
The 116a the first metal layer
116b second metal level
The 116c transparency conducting layer
Insulation course under the 117b
The last insulation course of 117t, 317t
118 bed courses
The 119a first pad portion
The 119b second pad portion
120 colored optical filtering substrates
122a second viewing area
122b second non-display area
130 frame glue
140 distance pieces
150 liquid crystal layers
240 picture element unit
242 electric crystals
The 242d drain
The 242g gate
The 242s source electrode
244 pixel electrodes
246 contact holes
The F1 macromolecule layer
The F2 dielectric layer
The H1 contact hole
P1 first bed course
P2 second bed course
P21, P31 metal level
P22, P32 semiconductor layer
The R1 groove
T1, T2, T3, T4 thickness
The W1 distribution
Embodiment
Figure 1A is the schematic top plan view of the utility model first embodiment display panels, and Figure 1B is the diagrammatic cross-section that A-A section along the line is drawn among Figure 1A.See also Figure 1A and Figure 1B, display panels 100 comprises an active component array base board 110, a colored optical filtering substrates 120, a frame glue 130 and a plurality of distance piece 140, and wherein active component array base board 110 is with respect to colored optical filtering substrates 120.Frame glue 130 is connected between active component array base board 110 and the colored optical filtering substrates 120, and these distance pieces 140 are between active component array base board 110 and colored optical filtering substrates 120.
Active component array base board 110 comprises a substrate 112, a pixel array 114 and a plurality of shared signal bus-bars 116.Substrate 112 has one first viewing area 112a and one first non-display area 112b, and colored optical filtering substrates 120 has one second viewing area 122a and one second non-display area 122b, the corresponding first viewing area 112a of the second viewing area 122a wherein, and the corresponding first non-display area 112b of the second non-display area 122b.In addition, the first non-display area 112b is around the first viewing area 112a.Pixel array 114 is disposed in the first viewing area 112a, and frame glue 130 all is disposed in the first non-display area 112b with shared signal bus-bar 116.
Frame glue 130 is around all distance pieces 140, and promptly these distance pieces 140 all are positioned at 130 region surrounded of frame glue.In addition, these distance pieces 140 be disposed in the second viewing area 122a with the second non-display area 122b in.In all distance pieces 140, a plurality of distance pieces 140 are positioned at the top of pixel array 114, a plurality of in addition distance pieces 140 are positioned at the top of these shared signal bus-bars 116, and remaining distance piece 140 is then between these shared signal bus-bars 116 and frame glue 130.
Fig. 2 A is that display panels among Figure 1A is at the enlarged diagram of first viewing area.See also Figure 1A and Fig. 2 A, pixel array 114 comprises a plurality of picture elements unit 240, multi-strip scanning line 114s, many data line 114d and many shared lines 114c, wherein these sweep traces 114s and these data lines 114d are staggered, and arranged side by side with these bridging lines 114c.
These picture element unit 240 electrically connect these sweep traces 114s, these data lines 114d and these bridging lines 114c.Specifically, each picture element unit 240 comprises an electric crystal 242, a pixel electrode 244 and a contact hole 246, and wherein electric crystal 242 electrically connects sweep trace 114s and data line 114d, and pixel electrode 244 electrically connects electric crystal 242.
Electric crystal 242 can be a kind of field effect electric crystal (Field-Effect Transistor, FET), therefore each electric crystal 242 can have a gate 242g, a drain 242d and one source pole 242s, wherein gate 242g electrically connects sweep trace 114s, source electrode 242s electrically connects data line 114d, and drain 242d connects contact hole 246, and electrically connects pixel electrode 244 through contact hole 246.Pixel electrode 244 can be formed by transparent conductive material, and this transparent conductive material for example be indium tin oxide (Indium Tin Oxide layer, ITO) or indium-zinc oxide (Indium Zinc Oxide layer, IZO).
Fig. 2 B is the diagrammatic cross-section that I-I section along the line is drawn among Fig. 2 A.Please consult Figure 1A, Figure 1B, Fig. 2 A and Fig. 2 B simultaneously, display panels 100 more comprises a liquid crystal layer 150, and it is that liquid crystal material by liquid state is constituted, and contains a plurality of liquid crystal molecules.Liquid crystal layer 150 is disposed between active component array base board 110 and the colored optical filtering substrates 120, and frame glue 130 is around liquid crystal layer 150.By frame glue 130, liquid crystal layer 150 is sealed between active component array base board 110 and the colored optical filtering substrates 120, avoids liquid crystal material to leak outside.
Active component array base board 110 more comprises on one insulation course 117t and insulation course 117b once, and the material of wherein descending insulation course 117b can be silicon dioxide or silicon nitride.Last insulation course 117t covers these data lines 114d and following insulation course 117b, and insulation course 117b covers these sweep traces 114s and bridging line 114c down.In addition, following insulation course 117b for example is gate insulation layer (gate insulation layer).
Last insulation course 117t can be a kind of rete with single layer structure or sandwich construction.In first embodiment, last insulation course 117t has sandwich construction, and comprise a macromolecule layer F1 and a dielectric layer F2, wherein macromolecule layer F1 covers dielectric layer F2, and can increase the surface flatness of active component array base board 110, and dielectric layer F2 is between macromolecule layer F1 and substrate 112, and covers these data lines 114d.In addition, the material of macromolecule layer F1 can be photoresistance, and the material of dielectric layer F2 can be identical with the material of following insulation course 117b.
These distance pieces 140 all are configured on the macromolecule layer F1 of insulation course 117t, and all contact insulation course 117t.In the first viewing area 112a, a plurality of distance pieces 140 are positioned at the top of these sweep traces 114s, and other a plurality of distance pieces 140 then are positioned at the top of these bridging lines 114c.Macromolecule layer F1 has a plurality of recess R 1, and each recess R 1 corresponding one of them distance piece 140, so these distance pieces 140 can enter respectively in these recess R 1.In addition, because the material of macromolecule layer F1 can be photoresistance, so recess R 1 can form via developing (developing).
Fig. 2 C is the diagrammatic cross-section of display panels before pressing among Fig. 2 B.See also Fig. 2 B and Fig. 2 C, generally speaking, using frame glue 130 to connect in the process of active component array base board 110 and colored optical filtering substrates 120, can carry out pressing to display panels 100, with compression distance piece 140, and in order to make these distance piece 140 compressed degree inequality, can there be difference in height on the surface of active component array base board 110.
In the present embodiment, because macromolecule layer F1 has recess R 1, so the surface of active component array base board 110 is not smooth fully.When display panels 100 carries out pressing, there is not the distance piece 140 of respective slot R1 can touch insulation course 117t earlier, this moment, the distance piece 140 of respective slot R1 did not then also touch insulation course 117t, so did not have the distance piece 140 compressed degree of respective slot R1 can be greater than the distance piece 140 that respective slot R1 is arranged.
Please consult Fig. 2 A and Fig. 2 B again, active component array base board 110 more comprises a plurality of first bed course P1.These first bed courses P1 is between last insulation course 117t and these bridging lines 114c, and a plurality of distance piece 140 lays respectively at the top of these first bed courses P1.The first bed course P1 for example is a metal level, and the first bed course P1 and drain 242d can form under same processing procedure, therefore for example the first bed course P1 and drain 242d form after little shadow (lithography) and etching (etching) with one deck metallic diaphragm, and the two thickness of the first bed course P1 and drain 242d is close basically.In addition, the first bed course P1 also can connect drain 242d.
What deserves to be mentioned is, though in the pixel array shown in Fig. 2 A 114, two distance pieces 140 of top configuration of each picture element unit 240, but in other embodiments, the top of each picture element unit 240 can only dispose a distance piece 140, and one of them distance piece 140 is positioned at the top of sweep trace 114s, another distance piece 140 is positioned at the top of bridging line 114c, for example take advantage of in three picture element unit 240 three, only distance piece 140 is positioned at the top of sweep trace 114s, other 140 tops that are positioned at bridging line 114c of eight distance pieces.Therefore, the distribution mode of these distance pieces 140 shown in Fig. 2 A to Fig. 2 C is only for illustrating, and non-limiting the utility model.
Fig. 3 A be display panels among Figure 1A at the enlarged diagram at shared signal bus-bar place, and Fig. 3 B is the diagrammatic cross-section that II-II section along the line is drawn among Fig. 3 A.See also Fig. 3 A and Fig. 3 B, each shared signal bus-bar 116 comprises a first metal layer 116a, one second metal level 116b and a transparency conducting layer 116c, and electrically connects with pixel array 114.
Specifically, the first metal layer 116a is disposed on the substrate 112, and insulation course 117b covers the first metal layer 116a down.The second metal level 116b is disposed at down on the insulation course 117b, covers the second metal level 116b and go up insulation course 117t, wherein the local the first metal layer 116a that hides of the second metal level 116b.In other words, the first metal layer 116a and the second metal level 116b are overlapped.
Transparency conducting layer 116c is disposed on the insulation course 117t, and electrically connects the second metal level 116b and pixel array 114(sees also Figure 1A and Fig. 2 A).Specifically, last insulation course 117t has a plurality of contact hole H1, and transparency conducting layer 116c can extend in these contact holes H1, and then electrically connects the pixel array 114 and the second metal level 116b.In addition, the material of transparency conducting layer 116c can be identical with the material of pixel electrode 244, be that transparency conducting layer 116c is formed by transparent conductive materials such as indium tin oxide or indium-zinc oxides, and transparency conducting layer 116c and pixel electrode 244 can formation simultaneously in same processing procedure.
In the distance piece 140 in all are disposed at the second non-display area 122b, a plurality of distance pieces 140 can be positioned at the top of these shared signal bus-bars 116.Particularly, a plurality of distance pieces 140 can be positioned at the top of the second metal level 116b, and other a plurality of distance piece 140 can be positioned at not the top of the first metal layer 116a that is hidden by the second metal level 116b, and respectively corresponding these recess R 1.So, the surface of active component array base board 110 in shared signal bus-bar 116 can produce difference in height, allows some distance piece 140 compressed degree be different from other distance pieces 140.
Must the statement be, though the last insulation course 117t shown in Fig. 3 B has sandwich construction, in other embodiments, last insulation course 117t can have single layer structure, promptly going up insulation course 117t is the rete that homogenous material constituted.Specifically, when last insulation course 117t had single layer structure, last insulation course 117t only comprised dielectric layer F2, and does not comprise macromolecule layer F1.That is to say that last insulation course 117t is dielectric layer F2.Therefore, in other embodiments, the display panels 100 of Fig. 3 B can not comprise macromolecule layer F1, so the macromolecule layer F1 among Fig. 3 B is only for illustrating non-limiting the utility model.
Fig. 4 A be display panels among Figure 1A at the enlarged diagram of first non-display area, and Fig. 4 B is the diagrammatic cross-section that III-III section along the line is drawn among Fig. 4 A.See also Fig. 4 A and Fig. 4 B, in the first non-display area 112b, active component array base board 110 can more comprise a plurality of bed courses 118, and these bed courses 118 all are disposed in the first non-display area 112b, and between these shared signal bus-bars 116 and frame glue 130.
These bed courses 118 all are electrically insulated with pixel array 114.Specifically, display panels 100 more comprises many distribution W1, and distribution W1 all is positioned at the first non-display area 112b, and electrically connects pixel array 114.Bed course 118 can be between two wherein adjacent distribution W1, but do not electrically connect any distribution W1, so that bed course 118 is electrically insulated with pixel array 114.
Following insulation course 117b covers these bed courses 118, and a plurality of distance piece 140 is disposed at these bed course 118 tops respectively, and contact goes up insulation course 117t, and some of them distance piece 140 respective slot R1, other distance pieces 140 are respective slot R1 not then.So, can there be difference in height on the surface of active component array base board 110, so that these distance piece 140 compressed degree are inequality.In addition, bed course 118 can be metal level, and can form simultaneously under same processing procedure with sweep trace 114s, for example bed course 118 and sweep trace 114s can by with one deck metallic diaphragm after little shadow and etching and form.
Fig. 5 A is the enlarged diagram of the utility model second embodiment display panels in first viewing area, and Fig. 5 B is the diagrammatic cross-section that IV-IV section along the line is drawn among Fig. 5 A.See also Fig. 5 A and Fig. 5 B, the two is similar for the display panels 100 of display panels 300 and first embodiment, therefore only introduce the two difference of first embodiment and second embodiment below, then no longer illustrate and repeated description as for the two some identical technical characterictic.
The two difference of first embodiment and second embodiment mainly is: the last insulation course 317t of display panels 300 is the rete with single layer structure, and do not comprise macromolecule layer F1, the dielectric layer F2(that wherein goes up insulation course 317t and can be among first embodiment sees also Fig. 2 B).Because the rete that last insulation course 317t is the tool single layer structure, and in order to allow the surface of active component array base board 310 of display panels 300 have difference in height, active component array base board 310 not only comprises a plurality of first bed course P1, but also comprises a plurality of second bed course P2.
These first bed courses P1 is between last insulation course 317t and these bridging lines 114c, and these second bed courses P2 is between last insulation course 317t and these sweep traces 114s, wherein the first bed course P1 and the second bed course P2 all the position on insulation course 117b down.In addition, a plurality of distance pieces 140 lay respectively at the top of these first bed courses P1, and other a plurality of distance piece 140 lays respectively at the top of these second bed courses P2.
The second bed course P2 can have sandwich construction.Specifically, each second bed course P2 can comprise a metal level P21 and semi-conductor layer P22, and metal level P21 is between semiconductor layer P22 and last insulation course 317t.The metal level P21 and the first bed course P1 can form under same processing procedure, for example the metal level P21 and the first bed course P1 form after little shadow and etching with one deck metallic diaphragm, so the two thickness of the metal level P21 and the first bed course P1 is close basically, to such an extent as to the thickness T 2 of the second bed course P2 can be greater than the thickness T 1 of the first bed course P1.
Based on the thickness T 2 of the second bed course P2 thickness T 1 greater than the first bed course P1, can be not smooth fully and have difference in height in the surface of active component array base board 310, therefore the distance piece 140 compressed degree that are positioned at second bed course P2 top can be greater than the distance piece 140 that is positioned at first bed course P1 top, and then impels these distance piece 140 compressed degree inequality.
Fig. 6 A is the enlarged diagram of the utility model second embodiment display panels at first non-display area, and Fig. 6 B is the diagrammatic cross-section that V-V section along the line is drawn among Fig. 6 A.See also Fig. 6 A and Fig. 6 B, active component array base board 310 more comprises a plurality of first 119a of pad portion and a plurality of second 119b of pad portion, and a plurality of distance piece 140 is disposed at the top of these first pads 119a of portion and the top of these second pads 119b of portion respectively.
Last insulation course 317t covers these first pads 119a of portion and these second pads 119b of portion, and these the first pads 119a of portion and second 119b of pad portion all are disposed at down on the insulation course 117b, and is positioned at the top of these bed courses 118.In addition, these first pads 119a of portion and these second pads 119b of portion all are disposed in the first non-display area 112b, and between these shared signal bus-bars 116 and frame glue 130.
Each second pad 119b of portion comprises a metal level P31 and semi-conductor layer P32, and wherein metal level P31 is between semiconductor layer P32 and last insulation course 317t.First 119a of pad portion, metal level P31 and data line 114d(see also Fig. 5 A) can under same processing procedure, form, for example first 119a of pad portion, metal level P31 and data line 114d are by forming after little shadow and etching with one deck metallic diaphragm, so first 119a of pad portion is close with the two thickness of metal level P31 basically, to such an extent as to the thickness T 4 of second 119b of pad portion is greater than the thickness T 3 of first 119a of pad portion.
Based on the thickness T 4 of second 119b of pad portion thickness T 3 greater than first 119a of pad portion, can be not smooth fully and have difference in height in the surface of active component array base board 310, therefore the distance piece 140 compressed degree that are positioned at second 119b of pad portion top can be greater than the distance piece 140 that is positioned at first 119a of pad portion top, and then impels these distance piece 140 compressed degree inequality.
In sum, in the utility model, because a plurality of distance pieces not only are disposed in second viewing area, and more be assigned in second non-display area, so compared to known display panels, the structure of the utility model energy forced fluid LCD panel, thereby have preferable anti-pressure ability.In addition, also because these spacer arrangement in second viewing area and second non-display area among the two, so these distance pieces more can be kept the two homogeneity of cell gap and thickness of liquid crystal layer, and then reduce the harmful effect of characteristics such as display speed, the visual angle to LCD and the contrast that becomes clear.
Though the utility model discloses as above with preferred embodiment; right its is not in order to limiting the utility model, anyly has the knack of alike skill person, in not breaking away from spirit and scope of the present utility model; the equivalence of doing to change with retouching is replaced, and still is in the scope of patent protection of the present utility model.