CN108445684A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN108445684A CN108445684A CN201810161205.6A CN201810161205A CN108445684A CN 108445684 A CN108445684 A CN 108445684A CN 201810161205 A CN201810161205 A CN 201810161205A CN 108445684 A CN108445684 A CN 108445684A
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- public electrode
- array substrate
- cabling
- auxiliary electrode
- display
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
A kind of array substrate of present invention offer, display panel and display device, in the array substrate：Every horizontal scanning line positioned at viewing area is electrically connected to the gate driving circuit positioned at non-display area, public electrode is electrically connected to the public electrode bus of non-display area, include the auxiliary electrode being electrically connected per horizontal scanning line, the coupled capacitor between auxiliary electrode and the public electrode bus per horizontal scanning line is roughly equal, so that the signal delay amount of all scan lines is suitable, it solves the problems, such as the display panel being made of the array substrate, the band of display device, improves its display effect.
Description
Technical field
The present invention relates to display technology fields, and more particularly to a kind of array substrate, display panel and its display device.
Background technology
With the development of display technology, the planes such as liquid crystal display (Liquid Crystal Display, LCD) display dress
It sets because having many advantages, such as that high image quality, power saving, fuselage is thin and has a wide range of application, and is widely used in mobile phone, TV, a number
The various consumer electrical products such as word assistant, digital camera, laptop, desktop computer, become the master in display device
Stream.
People not only require the display function of display device higher and higher at present, but also in order to preferably adapt to environment
Overall structure requirement, requirement in shape also stepping up, therefore special-shaped display panel generates therewith, as between at present
Through comprehensive screen display device as main trend.
Scan line and data line that pixel provides signal are generally comprised in liquid crystal display panel, in special-shaped display panel
In, since the shape of display panel is non-regular shape, when scan line is arranged with gate driving circuit, in order to adapt to display surface
The shape of plate, may be by so that the length of scanning line is inhomogenous in display panel, and the impedance for thereby resulting in scan line is different, in turn
So that the pixel of these scanning line drivings opens and closes Time Inconsistency, the viewing area of display panel is caused band occur existing
As affecting the display effect of display panel.Show therefore it provides a kind of display panel and display device solve viewing area band
As being this field urgent problem to be solved.
Invention content
In view of this, a kind of array substrate of offer of the embodiment of the present invention, display panel and its display device, can solve to show
Show the display band problem of panel and display device.
First, the present invention provides a kind of array substrate, including viewing area and the non-display area around viewing area；A plurality of data
Line and multi-strip scanning line are located at viewing area, the data line and the scan line multiple pixels of definition arranged in a crossed manner, each described
Pixel includes pixel electrode and public electrode；Gate driving circuit, the first cabling and public electrode bus are located at described non-display
Area, the scan line are electrically connected to the gate driving circuit by first cabling, the public electrode with it is described public
Electrode bus is electrically connected；Every first cabling includes the auxiliary electrode being electrically connected, every first cabling it is auxiliary
Help the coupled capacitor between electrode and the public electrode bus roughly equal.
In an embodiment of the invention, above-mentioned public electrode bus is arranged with the different layer of the first cabling, the auxiliary
Electrode is arranged with the first cabling same layer.
In an embodiment of the invention, above-mentioned public electrode bus is arranged with the different layer of the public electrode, described
Auxiliary electrode is arranged with the public electrode same layer.
In an embodiment of the invention, above-mentioned public electrode bus and the data line same layer are arranged, and described the
One cabling is arranged with the scan line same layer.
In an embodiment of the invention, above-mentioned public electrode is electrically conducting transparent material.
In an embodiment of the invention, above-mentioned auxiliary electrode is arranged in parallel with the public electrode bus, all
The auxiliary electrode is equal at a distance from the public electrode bus, and the length of whole auxiliary electrodes is roughly equal.
In an embodiment of the invention, above-mentioned auxiliary electrode is arranged with the different layer of the public electrode bus, and institute
It is mutually overlapping with the public electrode bus to state auxiliary electrode.
In an embodiment of the invention, above-mentioned array substrate includes the upper/lower terminal being located on first direction, with
And the left and right sides in second direction, the data line extend along a first direction, the scan line is along second direction
Extend；The gate driving circuit is located at at least side of the array substrate, and the gate driving circuit is in a first direction
On length be less than the viewing area length in a first direction.
In an embodiment of the invention, the cutting positioned at side where the gate driving circuit of above-mentioned array substrate
Chamfer is fillet.
Secondly, the present invention also provides a kind of display panels, including array substrate described in any one of the above embodiments.
In addition, the present invention also provides a kind of display device, including above-mentioned display panel.
Compared with prior art, technical solution provided by the present invention has the following advantages：Array base provided by the invention
Plate, every horizontal scanning line of viewing area are electrically connected to the gate driving circuit of non-display area, and public electrode is electrically connected to non-display area
Public electrode bus, per horizontal scanning line include the auxiliary electrode being electrically connected, per horizontal scanning line auxiliary electrode with it is described
Coupled capacitor between public electrode bus is roughly equal, so that the signal delay amount of all scan lines is suitable, solves
By the band problem for the display device that the array substrate forms, its display effect is improved.
Description of the drawings
By reading a detailed description of non-restrictive embodiments in the light of the attached drawings below, of the invention other
Feature, objects and advantages will become more apparent upon：
Fig. 1 is the schematic diagram for the array substrate that one embodiment of the invention provides；
Fig. 2 is the amplified schematic diagram in subregion in array substrate shown in Fig. 1；
Fig. 3 is the sectional view of the A1-A2 along Fig. 2；
Fig. 4 is the schematic diagram for the array substrate that another embodiment of the present invention provides；
Fig. 5 is the sectional view of the B1-B2 along Fig. 4；
Fig. 6 is the schematic diagram for the array substrate that further embodiment of this invention provides；
Fig. 7 is the sectional view of the C1-C2 along Fig. 6.
Specific implementation mode
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limitation of the invention.It also should be noted that in order to just
Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.For person of ordinary skill in the relevant
Known technology, method and apparatus may be not discussed in detail, but in the appropriate case, and the technology, method and apparatus should
It is considered as part of specification.
In shown here and discussion all examples, any occurrence should be construed as merely illustrative, without
It is as limitation.Therefore, other examples of exemplary embodiment can have different values.
First, the present invention provides a kind of array substrate, and Fig. 1 show the one of the array substrate that the embodiment of the present application is provided
Kind constitutes schematic diagram, and the application provides a kind of array substrate 01, referring to Fig. 1, is provided with viewing area AA and is set around viewing area AA
The non-display area BB set.
Specifically, for example can be：Array substrate 01 includes the upper/lower terminal being located on first direction D1, and is located at
The left and right sides on second direction D2, wherein first direction D1 and second direction D2 intersections.Array substrate 01 further includes being located at battle array
The gate driving circuit 10 of at least side of row substrate 01 and multi-strip scanning line and multiple data lines in the AA of viewing area, grid
Length on D in a first direction of the length in the first direction dl of driving circuit 10 less than viewing area AA, in this way, can subtract
The area of the non-display area BB of the upper and lower ends of small array substrate 01, is advantageously implemented narrow frame design.For example, array substrate 01
For round rectangle, the viewing area of array substrate 01 is round rectangle in other words, or, array substrate 01 is only located at grid
The cutting angle of 10 place side of driving circuit is fillet, and one end of the close fillet of the side non-display area of array substrate does not just have at this time
There are enough spaces to house gate driving circuit, the method that gate driving circuit compresses in a first direction can be shortened grid
The length of driving circuit in a first direction necessarily causes the length in a first direction of gate driving circuit to be less than viewing area
Length in a first direction.
About the concrete structure design of array substrate, for example, can be as shown in Figure 2,3 structure, please also refer to Fig. 1,2,
Shown in 3, Fig. 2 is the amplified schematic diagram in subregion in array substrate shown in Fig. 1, and Fig. 3 is the sectional view of the A1-A2 along Fig. 2.
Array substrate 01 includes viewing area AA and the non-display area BB around viewing area AA settings, and is located at viewing area AA
Pel array, the pel array includes the data line 32 of a plurality of configured in parallel and the scan line 31 of a plurality of configured in parallel, more
Data line 32 includes display driving switch (in figure with the multiple pixel P of definition arranged in a crossed manner of multi-strip scanning line 31, each pixel P
Be not shown) and structures such as pixel electrode (not shown), wherein display driving switch for example can be with grid, source electrode,
Source electrode (or drain electrode) connection of the thin film transistor (TFT) of three terminals of drain electrode, pixel electrode and thin film transistor (TFT).The pixel battle array
Row for example may include multiple lines and multiple rows pixel P, and the drain electrode (or source electrode) of the thin film transistor (TFT) in each column pixel P can for example connect
It is connected to same data line 32, data-signal is provided for the pixel P of respective column by the data line 32, it is often thin in row pixel P
The grid of film transistor can for example be connected to same scan line 31, and the pixel P by this scan line 31 for corresponding row is provided
Scanning signal.
In the present embodiment, each data line 32 extends along first direction D1 and D2 arranges in a second direction, each scan line 31
Along first direction D1 arrangements and D2 extends in a second direction.Gate driving circuit 10 is located at the non-display of the side of array substrate 01
In area BB, each scan line 31 is electrically connected to gate driving circuit 10 by the first cabling 21 positioned at non-display area BB respectively.It closes
In the concrete structure of gate driving circuit 10, such as can be：Gate driving circuit 10 includes at least two-stage shift register list
Member 11 is connected by first cabling 21 with a horizontal scanning line 31 per level-one shift register cell 11, so as to according to
It is secondary to input scanning signal to scan line 31, to realize the progressive scan of scan line 31.
Further, array substrate 01 for example further includes data drive circuit (not shown), data drive circuit example
Such as may include multiple data pins, be correspondingly connected with multiple data lines 32, can successively to 32 input data signal of data line,
And the display of predetermined image is realized under the control of scanning signal.
Gate driving circuit 10 is located in the non-display area BB of the viewing area sides AA, and whole scan lines 31 are all driven with the grid
Corresponding shift register cell 11 connects in dynamic circuit 10.Or：Gate driving circuit 10 includes two parts, respectively position
In in the non-display area BB of the both sides of viewing area AA, shift register cell 11 in a portion gate driving circuit 10 with
Odd number horizontal scanning line 31 connects, the shift register cell 11 in another part gate driving circuit 10 and even number horizontal scanning line 31
Connection；Alternatively, the both ends per horizontal scanning line 31 are connected to the corresponding shift register cell 11 in both sides simultaneously respectively, driving is improved
Ability, and signal delay is reduced, the embodiment of the present invention does not limit this.
In the present embodiment, gate driving circuit 10 for example may include multiple cascade shift register cells 11 with it is more
Drive signal bus 12, multiple cascade shift register cells 11 are electrically connected to by a plurality of drive signal bus 12 respectively
The integrated drive electronics of peripheral region.The quantity of shift register cell 11 is equal with the quantity of scan line 31 of viewing area AA, should
Multiple cascade shift register cells 11 are electrically connected by cascading cabling, pass through one per level-one shift register cell 11
First cabling 21 is connect with a horizontal scanning line 31 of viewing area AA, to be swept to input by multi-stage shift register unit 11
It retouches signal to be shifted, to realize the progressive scan to each horizontal scanning line.
In order to realize narrow frame, in the present embodiment, such as it can pass through and compress the distance between adjacent shift register 11
Or reduce the area of the non-display area BB shared by shift register 11 so that gate driving circuit 10 is in the first direction dl
In a first direction D of the length less than viewing area AA on length, but scan line 31 is to be uniformly distributed in entire viewing area AA
Interior, that is to say, that when line n scan line 31 is electrically connected to n-th grade of shift register 11 of gate driving circuit 10, line n
Scan line 31 and n-th grade of shift register 11 face might not be arranged in a second direction d 2, in other words n-th grade of shift LD
Device 11 might not be placed exactly on the extending direction of line n scan line 31, to pass through the first cabling when line n scan line 31
21 when being electrically connected to n-th grade of shift register 11, and the first cabling 21 might not extend along second direction D2, but may have
There are certain radian or turning.Moreover, with the difference in the region in the viewing area AA where each horizontal scanning line 31, often row is swept
It retouches line 31 and the spacing distance of the shift register cell 11 that is electrically connected in the first direction dl is also different, it is further in this way
Cause the first cabling 21 being electrically connected with different scanning line 31 radian or turning it is of different sizes, in other words with different scanning
The length for the first cabling 21 that line 31 is electrically connected is different.Since the path of the first cabling is different, length is different, then the first cabling
The meeting of resistance and capacitance is variant, therefore, per horizontal scanning line signal delay amount can with the increase of the resistance of the first cabling and
Increase, the display of viewing area also can generate band with the difference of above-mentioned signal delay amount, thereby reduce display effect.
Further, array substrate 01 further includes public electrode 33 and the public electrode bus in non-display area BB
23, public electrode 33 is electrically connected to public electrode bus 23, is that public electrode 33 transmits common electrical by public electrode bus 23
Signal, public electrode bus 23 is pressed for example to can be electrically connected to the integrated drive electronics of peripheral region.Public electrode bus 23 is located at
In non-display area BB, especially it is located in the non-display area BB of 10 side of close gate driving circuit of array substrate.Further
, D1 extends public electrode bus 23 along a first direction, and non-aobvious between gate driving circuit 10 and viewing area AA
Show in area BB, every first cabling 21 includes an auxiliary electrode 22 being electrically connected, and auxiliary electrode 22 and public electrode are total
Line 23 is arranged in parallel, and all the auxiliary electrode is equal at a distance from the public electrode bus, and all auxiliary electrodes
Length it is roughly equal so that between the auxiliary electrode 22 and public electrode bus 23 of every first cabling 21 coupling electricity
Hold roughly equal.
Certainly, in other embodiments of the present invention, the shape of auxiliary electrode 22 and it is not fixed, in other words auxiliary electrode
22 can also be with above-mentioned difference, as long as disclosure satisfy that every first is walked with the position relationship of public electrode bus 23, shape relation
Coupled capacitor between the auxiliary electrode 22 and public electrode bus 23 of line 21 is roughly equal.
It is different, long by the path of the first cabling compared to the coupling capacitance between auxiliary electrode and public electrode bus
The resistance of the first cabling of each item and capacitance difference caused by short difference can be ignored.Therefore, by every first cabling
Coupled capacitor substantially phase between the upper auxiliary electrode and public electrode bus that auxiliary electrode is set and makes every first cabling
Deng finally so that the signal delay amount of all scan lines is suitable, preventing the display device being made of the array substrate from occurring horizontal
Line improves its display effect.
Further, as shown in figure 3, in the present embodiment, the first cabling 21, auxiliary electrode 22, scan line and display drive
The grid of switch is set along in one metal layer M1 of the mat woven of fine bamboo strips, public electrode bus 23, data line and the source-drain electrode for showing driving switch
It is set along and is formed on substrate 101 in two metal layer M2 of the mat woven of fine bamboo strips, one metal layer M1 of the mat woven of fine bamboo strips and two metal layer M2 of the mat woven of fine bamboo strips, such as can pass through
102 insulation gap of gate insulating layer is arranged.Public electrode 33 is located at the side of the separate substrate 101 of second metal layer M2, and logical
It crosses flatness layer 103 with second metal layer M2 insulation gaps to be arranged, at this point, public electrode 33 for example can be by running through flatness layer
103 via is electrically connected with public electrode bus 23.First cabling 21, auxiliary electrode 22 and scan line same layer are formed, and can be made
Be directly electrically connected between three, it is simple in structure.
In the present embodiment, public electrode extends to non-display area and directly by via structure and public electrode bus electricity
Connection certainly in other embodiments, can also be by being electrically connected with public electrode bus and extending to the centre of viewing area
Line is electrically connected with public electrode, and the shape of public electrode can may be the piecemeal corresponding to each pixel for whole face formula
Formula, the present invention do not limit.
In other embodiments, structure as shown in figs. 4 and 5 is may be set to be, Fig. 4 is another implementation of the present invention
The schematic diagram for the array substrate that example provides, Fig. 5 is the sectional view of the B1-B2 along Fig. 4, in the present embodiment, each horizontal scanning line
31 are electrically connected to gate driving circuit 10 by first cabling 21, and every first cabling 21 is electrically connected therewith including at least one
The auxiliary electrode 22 connect, the coupled capacitor substantially phase between the auxiliary electrode 22 and public electrode bus 23 of every first cabling 21
Deng so that the signal delay amount of each horizontal scanning line is suitable, preventing from being occurred by the display device that the array substrate forms horizontal
Line improves its display effect.
In the present embodiment, the first cabling 21, scan line 31 and the grid of display driving switch are set along in one gold medal of the mat woven of fine bamboo strips
Belong to layer M1, public electrode bus 23, data line and the source-drain electrode of display driving switch are set along in two metal layer M2 of the mat woven of fine bamboo strips, the mat woven of fine bamboo strips one
Metal layer M1 and two metal layer M2 of the mat woven of fine bamboo strips is formed on substrate 101, such as can be arranged by 102 insulation gap of gate insulating layer.
Public electrode 33 is located at the side of the separate substrate 101 of second metal layer M2, and exhausted by flatness layer 103 and two metal layer M2 of the mat woven of fine bamboo strips
Intermarginal every setting, auxiliary electrode 22 is formed with 33 same layer of public electrode, at this point, public electrode 33 for example can be by running through flat
The via of layer 103 is electrically connected with public electrode bus 23, and auxiliary electrode 22 for example can be by sequentially passing through flatness layer 103 and grid
The via of pole insulating layer 102 is electrically connected with corresponding first cabling 21.Wherein, public electrode is formed by transparent conductive material, such as
The transparent conductive oxides such as tin indium oxide (Indium-Tin Oxide).First cabling 21 is formed with 31 same layer of scan line, can be with
So that be directly electrically connected between the two, it is simple in structure；Auxiliary electrode is arranged with public electrode same layer, will not increase processing procedure, simultaneously
It is overlapping with the sealant positioned at array substrate neighboring area because auxiliary electrode is located around in the non-display area of viewing area setting
Setting, and sealant needs follow-up progress ultraviolet light irradiation to be cured, and forms auxiliary electrode by transparent conductive material, Bu Huiying
The light transmittance of sealant region is rung, and then does not interfere with sealant solidification effect.
In other embodiments, structure as shown in Figures 6 and 7 is may be set to be, Fig. 6 is the another implementation of the present invention
The schematic diagram for the array substrate that example provides, Fig. 7 is the sectional view of the C1-C2 along Fig. 6, in the present embodiment, each horizontal scanning line
31 are electrically connected to gate driving circuit 10 by first cabling 21, and every first cabling 21 includes one and is electrically connected
Auxiliary electrode 22, the coupled capacitor between the auxiliary electrode 22 and public electrode bus 23 of every first cabling 21 is roughly equal,
So that the signal delay amount of each horizontal scanning line is suitable, prevent band occur by the display device that the array substrate forms,
Improve its display effect.
In the present embodiment, the first cabling 21, auxiliary electrode 22 are set with scan line together with the grid of display driving switch
It sets in one metal layer M1 of the mat woven of fine bamboo strips, public electrode bus 23, data line and the source-drain electrode of display driving switch are set along in two gold medal of the mat woven of fine bamboo strips
Belong to layer M2, one metal layer M1 of the mat woven of fine bamboo strips and two metal layer M2 of the mat woven of fine bamboo strips to be formed on substrate 101, such as can be exhausted by gate insulating layer 102
It is intermarginal every setting.Public electrode 33 is located at the side of the separate substrate 101 of second metal layer M2, and is insulated by flatness layer 103
Setting, at this point, public electrode 33 can be for example electrically connected by the via through flatness layer 103 with public electrode bus 23.It is auxiliary
Help electrode 22 parallel with public electrode bus 23 and overlapping setting, all the auxiliary electrodes and the public electrode bus away from
From equal, and the length of whole auxiliary electrodes is roughly equal so that the auxiliary electrode 22 of every first cabling 21 with
Coupled capacitor between public electrode bus 23 is roughly equal.Both first cabling 21 is formed with scan line same layer, can make
Between be directly electrically connected, it is simple in structure；Auxiliary electrode and public electrode same layer are arranged, and will not increase processing procedure, auxiliary electrode 22 with
Public electrode bus 23 is parallel and overlapping setting, therefore, when auxiliary electrode and public electrode bus are by lighttight metal material
When formation, its influence to sealant region light transmittance can be reduced as far as possible, such as auxiliary electrode can whole positions
In in the coverage area of public electrode bus, at this point, the introducing of auxiliary electrode not will increase lightproof area in non-display area
Area, and then do not interfere with sealant solidification effect.
Certainly, in other embodiments, may be set to be：First cabling, public electrode bus are together with scan line
Setting is set along with data line in two metal layer M2 of the mat woven of fine bamboo strips in one metal layer of the mat woven of fine bamboo strips, auxiliary electrode；Alternatively, the first cabling, common electrical
Pole bus is set along with scan line in one metal layer of the mat woven of fine bamboo strips, and auxiliary electrode is formed with public electrode same layer；Alternatively, public electrode is total
Line is set along with scan line in one metal layer of the mat woven of fine bamboo strips, and the first cabling is set along with data line in second metal layer, auxiliary electrode
It is formed with public electrode same layer.
The array substrate that embodiment of the present invention provides, by the way that auxiliary electrode is arranged in its periphery non-display area and makes
The coupled capacitor between auxiliary electrode and public electrode bus per horizontal scanning line is roughly equal, finally makes all scan lines
Signal delay amount is suitable, prevents band occur by the display device that the array substrate forms, improves its display effect.
Secondly, the present invention also provides a kind of display panels, including above-mentioned array substrate.The display panel can be liquid crystal
Display panel, OLED or electrophoretic display panel etc..By taking liquid crystal display panel as an example, when the display panel is LCD display
When plate, the display panel further includes the color membrane substrates being arranged oppositely with array substrate, and is sealed in array substrate and color film
Liquid crystal layer between substrate, array substrate are sealed to box with color membrane substrates by the sealant being set in the non-display area of periphery.
The shape of the array substrate is, for example, round rectangle or other non-regular shapes, and the array substrate is shown
Show that the shape in area can also be for example round rectangle or other non-regular shapes simultaneously；The shape of the array substrate is for example
Shape for the round rectangle with borehole area, the viewing area of the array substrate can also be for example with borehole area simultaneously
Round rectangle to reduce border width, and improves the exterior aesthetics for the display device being made from it.For example may be used in the area that hollows out
For placing the devices such as camera or receiver.Certainly, display panel provided by the invention can also have such as battle array accordingly
The irregular shape of row substrate.
In addition, the present invention also provides a kind of display device, including above-mentioned display panel, it is to be understood that the present invention is real
The display device for applying example offer, can be other displays with display function such as mobile phone, computer, TV, display device for mounting on vehicle
Device, the present invention are not specifically limited this.
Note that above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The present invention is not limited to specific embodiments described here, can carry out for a person skilled in the art it is various it is apparent variation,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out to the present invention by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
May include other more equivalent embodiments, and the scope of the present invention is determined by scope of the appended claims.
Claims (11)
1. a kind of array substrate, including viewing area and the non-display area around viewing area, it is characterised in that:
Multiple data lines and multi-strip scanning line are located at the viewing area, the data line and scan line definition arranged in a crossed manner
Multiple pixels, each pixel includes pixel electrode and public electrode；
Gate driving circuit, the first cabling and public electrode bus, are located at the non-display area, and the scan line passes through described the
One cabling is electrically connected to the gate driving circuit, and the public electrode is electrically connected with the public electrode bus；
Every first cabling includes the auxiliary electrode being electrically connected, the auxiliary electrode of every first cabling with it is described
Coupled capacitor between public electrode bus is roughly equal.
2. array substrate according to claim 1, which is characterized in that the public electrode bus and first cabling are different
Layer setting, the auxiliary electrode are arranged with the first cabling same layer.
3. array substrate according to claim 1, which is characterized in that the public electrode bus and the public electrode are different
Layer setting, the auxiliary electrode are arranged with the public electrode same layer.
4. array substrate according to claim 2 or 3, which is characterized in that the public electrode bus and the data line
Same layer is arranged, and first cabling is arranged with the scan line same layer.
5. array substrate according to claim 3, which is characterized in that the public electrode is electrically conducting transparent material.
6. array substrate according to claim 1, which is characterized in that the auxiliary electrode is flat with the public electrode bus
Row setting, all the auxiliary electrode is equal at a distance from the public electrode bus, and all length of the auxiliary electrode
It is roughly equal.
7. array substrate according to claim 6, which is characterized in that the auxiliary electrode and the public electrode bus are different
Layer setting, and the auxiliary electrode and the public electrode bus are mutually overlapping.
8. array substrate according to claim 1, which is characterized in that the array substrate includes being located on first direction
Upper/lower terminal, and the left and right sides in second direction, the data line extend along a first direction, the scan line
Extend along second direction；
The gate driving circuit is located at at least side of the array substrate, and the gate driving circuit is in a first direction
Length be less than the viewing area length in a first direction.
9. array substrate according to claim 8, which is characterized in that the array substrate is located at gate driving electricity
The cutting angle of side where road is fillet.
10. a kind of display panel, including such as claim 1-9 any one of them array substrates.
11. a kind of display device, including display panel as claimed in claim 10.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810161205.6A CN108445684A (en) | 2018-02-27 | 2018-02-27 | Array substrate, display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810161205.6A CN108445684A (en) | 2018-02-27 | 2018-02-27 | Array substrate, display panel and display device |
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| CN108445684A true CN108445684A (en) | 2018-08-24 |
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| CN201810161205.6A Pending CN108445684A (en) | 2018-02-27 | 2018-02-27 | Array substrate, display panel and display device |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061963A (en) * | 2018-10-26 | 2018-12-21 | 厦门天马微电子有限公司 | A kind of display panel and display device |
| CN109192172A (en) * | 2018-10-29 | 2019-01-11 | 厦门天马微电子有限公司 | Display panel and display device |
| CN109445218A (en) * | 2019-01-07 | 2019-03-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of display panel and preparation method thereof and display device |
| CN109742128A (en) * | 2019-01-28 | 2019-05-10 | 昆山国显光电有限公司 | Display and its display panel |
| CN110928082A (en) * | 2019-11-01 | 2020-03-27 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN114333580A (en) * | 2021-12-21 | 2022-04-12 | Tcl华星光电技术有限公司 | Display panel and display device |
| WO2023272825A1 (en) * | 2021-06-28 | 2023-01-05 | 武汉华星光电技术有限公司 | Display panel and display apparatus |
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| US11810504B2 (en) | 2020-09-30 | 2023-11-07 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788741A (en) * | 2006-01-18 | 2010-07-28 | 三星电子株式会社 | Liquid crystal display |
| CN102422210A (en) * | 2009-05-13 | 2012-04-18 | 夏普株式会社 | Liquid crystal display device |
| CN105182646A (en) * | 2015-10-13 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN105374334A (en) * | 2015-12-11 | 2016-03-02 | 武汉华星光电技术有限公司 | Liquid crystal display panel structure |
| US20160372037A1 (en) * | 2015-06-16 | 2016-12-22 | Samsung Display Co., Ltd. | Pixel and organic light emitting display device using the same |
| CN107092146A (en) * | 2017-05-03 | 2017-08-25 | 友达光电股份有限公司 | Array substrate |
| CN107424551A (en) * | 2017-05-25 | 2017-12-01 | 上海天马微电子有限公司 | Array base palte, special-shaped display and display device |
-
2018
- 2018-02-27 CN CN201810161205.6A patent/CN108445684A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788741A (en) * | 2006-01-18 | 2010-07-28 | 三星电子株式会社 | Liquid crystal display |
| CN102422210A (en) * | 2009-05-13 | 2012-04-18 | 夏普株式会社 | Liquid crystal display device |
| US20160372037A1 (en) * | 2015-06-16 | 2016-12-22 | Samsung Display Co., Ltd. | Pixel and organic light emitting display device using the same |
| CN105182646A (en) * | 2015-10-13 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN105374334A (en) * | 2015-12-11 | 2016-03-02 | 武汉华星光电技术有限公司 | Liquid crystal display panel structure |
| CN107092146A (en) * | 2017-05-03 | 2017-08-25 | 友达光电股份有限公司 | Array substrate |
| CN107424551A (en) * | 2017-05-25 | 2017-12-01 | 上海天马微电子有限公司 | Array base palte, special-shaped display and display device |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061963B (en) * | 2018-10-26 | 2022-05-20 | 厦门天马微电子有限公司 | Display panel and display device |
| CN109061963A (en) * | 2018-10-26 | 2018-12-21 | 厦门天马微电子有限公司 | A kind of display panel and display device |
| CN109192172A (en) * | 2018-10-29 | 2019-01-11 | 厦门天马微电子有限公司 | Display panel and display device |
| WO2020143100A1 (en) * | 2019-01-07 | 2020-07-16 | 深圳市华星光电半导体显示技术有限公司 | Display panel and manufacturing method thereof, and display device |
| CN109445218A (en) * | 2019-01-07 | 2019-03-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of display panel and preparation method thereof and display device |
| CN109742128B (en) * | 2019-01-28 | 2021-01-01 | 昆山国显光电有限公司 | Display and display panel thereof |
| CN109742128A (en) * | 2019-01-28 | 2019-05-10 | 昆山国显光电有限公司 | Display and its display panel |
| US11963405B2 (en) | 2019-01-28 | 2024-04-16 | Kunshan Go-Visionox Opto-Electronics Co., Ltd. | Display, display panel, and electronic terminal |
| CN110928082A (en) * | 2019-11-01 | 2020-03-27 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| US11810504B2 (en) | 2020-09-30 | 2023-11-07 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate and display device |
| US11862081B2 (en) | 2020-09-30 | 2024-01-02 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display panel and display device |
| WO2023272825A1 (en) * | 2021-06-28 | 2023-01-05 | 武汉华星光电技术有限公司 | Display panel and display apparatus |
| WO2023050471A1 (en) * | 2021-09-29 | 2023-04-06 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN114333580A (en) * | 2021-12-21 | 2022-04-12 | Tcl华星光电技术有限公司 | Display panel and display device |
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