CN201910415U - Conducting pad structure, chip packaging structure and driving component array substrate - Google Patents
Conducting pad structure, chip packaging structure and driving component array substrate Download PDFInfo
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- CN201910415U CN201910415U CN2010206794505U CN201020679450U CN201910415U CN 201910415 U CN201910415 U CN 201910415U CN 2010206794505 U CN2010206794505 U CN 2010206794505U CN 201020679450 U CN201020679450 U CN 201020679450U CN 201910415 U CN201910415 U CN 201910415U
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Abstract
The utility model relates to a conducting pad structure, comprising a conducting pad structure which is arranged at a peripheral circuit area of a driving component array substrate. The conducting pad structure is characterized by comprising a conducting pad and a plurality of conducting spacers arranged on the conducting pad, wherein the conducting spacers on the conducting pad are arranged into non-closed patterns. The utility model also provides a chip packaging structure and the driving component array substrate with the conducting pad structure. In the utility model, the problem that the airtightness is poor when a convex block for driving a chip is attached with the conducting pad structure can be solved.
Description
Technical field
The utility model relates to a kind of conductive pad structure, and particularly relevant for a kind of conductive pad structure with non-closed pattern.
Background technology
Along with the fast development of lcd technology, the LCD of a new generation just develops towards the direction of high brightness, wide viewing angle, fast, the high image resolution of reaction rate and full-colorization.
Generally speaking, at the periphery circuit region of liquid crystal panel a plurality of conductive pads can be set, and utilize anisotropic conductive that chip for driving is bonded on the conductive pad.So, can conducting between the conductive pad of the projection of chip for driving and liquid crystal panel by the conducting particles in the anisotropic conductive.
Figure 1A illustrates the generalized section into existing conductive pad structure.Figure 1B illustrates the schematic top plan view into the conductive pad structure of Figure 1A.Please be simultaneously with reference to Figure 1A and Figure 1B, existing conductive pad structure 100 comprises: conductive pad 102 and the ring-type fin 104 that is arranged at a plurality of sealings on the conductive pad 102.Anisotropic conductive P then places between the projection 108 of conductive pad structure 100 and chip for driving 106.Anisotropic conductive P is made up of conducting particles 110 and colloid 112.
When projection 108 that binds chip for driving 106 and conductive pad structure 100, the ring-type fin 104 of a plurality of sealings can be caught conducting particles 110, to increase the quantity of conducting particles 110.
Yet shown in Figure 1A, if the amount of anisotropic conductive P is too much, when projection 108 that binds chip for driving 106 and conductive pad structure 100, enclosed ring-type fin 104 makes unnecessary anisotropic conductive P to discharge smoothly on the contrary.Thus, make the projection 108 of chip for driving 106 and can't combining closely of conductive pad structure 100, will have influence on the projection 108 and the transmission of the telecommunication between the conductive pad structure 100 of chip for driving 106.
Summary of the invention
The purpose of this utility model is to provide a kind of conductive pad structure, the not good problem of adaptation in the time of can solving the projection of chip for driving and conductive pad structure and fit.
The utility model also proposes a kind of chip-packaging structure and active assembly array base plate with above-mentioned conductive pad structure, has excellent electrical property between the projection of chip for driving and the conductive pad structure and is connected.
Of the present utility model being characterised in that: a kind of conductive pad structure, comprise the conductive pad structure of a periphery circuit region that is arranged on an active assembly array base plate, it is characterized in that: this conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad.
Another feature of the present utility model is: a kind of active assembly array base plate, comprise the active assembly array base plate that has a viewing area and center on a periphery circuit region of this viewing area, and it is characterized in that: this active assembly array base plate comprises:
One chip is arranged at this periphery circuit region, and this chip has at least one conductive projection;
One conductive pad structure is arranged at this periphery circuit region, and this conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad; And
One anisotropic conductive is between this conductive projection and this conductive pad structure.
Of the present utility modelly be characterised in that one: a kind of chip-packaging structure, comprise the chip-packaging structure of a periphery circuit region that is arranged on an active assembly array base plate, it is characterized in that: this chip-packaging structure comprises:
One chip has at least one conductive projection;
One conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad; And
One anisotropic conductive is between this conductive projection and this conductive pad structure.
In an embodiment of the present utility model, above-mentioned non-closed pattern comprises the first non-closed pattern and the second non-closed pattern at least.The first non-closed pattern has a plurality of first openings.The second non-closed pattern has a plurality of second openings, and the second non-closed pattern is around the first non-closed pattern.
In an embodiment of the present utility model, the first above-mentioned opening and the width of second opening are between 1 micron～5 microns; The shape of above-mentioned non-closed pattern comprises rectangle, circle, triangle or ellipse; , above-mentioned conductive spacer comprises: many fins or a plurality of salient point; Above-mentioned conductive pad thickness is between 0.1 micron～2 microns; Above-mentioned conductive pad and conductive spacer are formed in one.
In an embodiment of the present utility model, above-mentioned anisotropic conductive comprises: colloid and a plurality of conducting particles.A plurality of conducting particless are distributed in the colloid, and chip electrically connects with the conductive pad structure via these conducting particless.
Based on above-mentioned, the utility model utilization is provided with a plurality of conductive spacers that are arranged in non-closed pattern on conductive pad.When chip and conductive pad utilized anisotropic conductive to be bonded to each other, the opening that unnecessary anisotropic conductive can see through between the conductive spacer was discharged.Thus, can promote the conductive projection of chip for driving and the closed intensity between the conductive pad structure, and guarantee that telecommunication between the two connects.
Advantage of the present utility model: a plurality of conductive spacers that are arranged in non-closed pattern are set on conductive pad.When chip combined with the conductive pad structure, unnecessary anisotropic conductive can see through the opening between the conductive spacer and discharge smoothly, can promote the conductive projection of chip and the adaptation between the conductive pad structure.In addition, conductive spacer can be caught conducting particles, is left on quantity on the conductive pad to increase conducting particles; The not good problem of adaptation when the projection of solution chip for driving and conductive pad structure are fitted promotes the conductive projection of chip for driving and the closed intensity between the conductive pad structure, and guarantees that telecommunication between the two connects.
For the new above-mentioned feature and advantage of this practicality can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
Description of drawings
Figure 1A is the generalized section of existing conductive pad structure.
Figure 1B is the schematic top plan view of the conductive pad structure of Figure 1A.
Fig. 2 is the schematic top plan view of the active assembly array base plate of the utility model embodiment.
Fig. 3 is the generalized section of the chip-packaging structure 208 of Fig. 2.
Fig. 4 is the schematic top plan view of the conductive pad structure of Fig. 3.
Fig. 5 is the schematic top plan view of the conductive pad structure of another embodiment of the utility model.
Fig. 6 is the utility model schematic top plan view of the conductive pad structure of an embodiment again.
Among the figure: 100,304,404,504 is the conductive pad structure; 102,304A is a conductive pad; 104 is the ring-type fin; 106 is chip for driving; 108 is projection; 110, CP1 is a conducting particles; 200 is active assembly array base plate; 202 is the viewing area; 204 is periphery circuit region; 206 is the picture element unit; 208 is chip-packaging structure; 302 is chip; 304A is a conductive pad; 304B is a conductive spacer; B1 is a conductive projection; D1 is a data line; F1 is the first non-closed pattern; F2 is the second non-closed pattern; G1 is a colloid; OP1 is first opening; OP2 is second opening; P, P1 are anisotropic conductive; S1 is a scan line.
Embodiment
The utility model proposes a kind of conductive pad structure, can solve the not good problem of adaptation that is caused when using anisotropic conductive to bind the projection of chip for driving and conductive pad structure with novel designs.This conductive pad structure with novel designs can be applicable in many chip-packaging structures and the relevant electronic installation.Below, be example with the active assembly array base plate of LCD, carry out the related description of the conductive pad structure of this creation.
Fig. 2 illustrates the schematic top plan view into the active assembly array base plate of the utility model one embodiment.Please refer to Fig. 2, active assembly array base plate 200 comprises: viewing area 202 and the periphery circuit region 204 that centers on viewing area 202.The utility model does not limit the kenel of active assembly array base plate 200.For instance, active assembly array base plate 200 can be general common plurality of groups of substrates of thin-film transistor, and this thin-film transistor for example is amorphous silicon membrane transistor or polycrystalline SiTFT.In addition, active assembly array base plate 200 can also be one to be integrated with the active assembly array base plate (Color Filter on Array substrate, COA substrate) of chromatic filter layer.
Please continue with reference to Fig. 2, the viewing area 202 of active assembly array base plate 200 comprise multi-strip scanning line S1, many data line D1 with a plurality of picture elements unit 206 of configured in array mode on viewing area 202.Scan line S1 is perpendicular to one another with data wire D1, and each picture element unit 206 electric property couplings are to scan line S1 and data wire D1.Particularly, periphery circuit region 204 can comprise a plurality of chip-packaging structures 208, the structure of each chip-packaging structure 208 such as following shown in Figure 3.
Fig. 3 illustrates the generalized section into the chip-packaging structure 208 of Fig. 2.Please be simultaneously with reference to Fig. 2 and Fig. 3, chip-packaging structure 208 comprises: chip 302, conductive pad structure 304 and anisotropic conductive P1.Chip 302 has at least one conductive projection B1, and chip 302 provides the driving signal to scan line S1, data wire D1, so that picture element unit 206 shows.Conductive projection B1 for example is the gold (Au) with high conductivity generally by the conducting metal made.
Fig. 4 illustrates the schematic top plan view into the conductive pad structure of Fig. 3.Please refer to Fig. 4, conductive pad structure 304 can comprise: conductive pad 304A and a plurality of conductive spacer 304B that are arranged on the conductive pad 304A.These conductive spacers 304B is arranged in non-closed pattern on conductive pad 304A.
For example, in Fig. 4, the conductive spacer 304B on the conductive pad 304A can be the fin of many L shaped or long strip types.L shaped conductive spacer 304B can surround the first non-closed pattern F1 of rectangle, and the conductive spacer 304B of strip can surround the second non-closed pattern F2 of rectangle, and the second non-closed pattern F2 is around the first non-closed pattern F1.
It may be noted that the first non-closed pattern F1 and the second non-closed pattern F2 have a plurality of first opening OP1 and a plurality of second opening OP2 respectively, and the first opening OP1 of the first non-closed pattern F1 can correspond to the non-opening part of the second non-closed pattern F2.In addition, the width of the first opening OP1 and the second opening OP2 can be designed to approximately the diameter smaller or equal to conducting particles CP1, for example between 1 micron～5 microns.
Holding above-mentioned, unnecessary colloid G1 can discharge smoothly via the first opening OP1 and the second opening OP2, and then can promote the conductive projection B1 of chip 302 and the closed intensity between the conductive pad structure 304.And, catch conducting particles CP1 by being provided with of the non-closed pattern F1 of multilayer, F2, so, can avoid when unnecessary colloid G1 discharges outside the conductive pad structure 304, too much conducting particles CP1 produces with the problem that colloid G1 is discharged from outside the conductive pad structure 304 together.
Referring again to Fig. 3 and Fig. 4, conductive pad 304A and conductive spacer 304B can be formed in one, its production method for example is by the position of micro-photographing process definition conductive spacer 304B on conductive pad 304A, cooperates dry-etching or Wet-type etching to produce conductive spacer 304B again on conductive pad 304A.Yet, also can make conductive pad 304A earlier, utilize shielding to cooperate the long-pending processing procedure in Shen long-pending conductive spacer 304B in Shen separately on conductive pad 304A again.
The non-closed pattern that conductive spacer 304B is arranged on conductive pad 304A is not exceeded with the embodiment of Fig. 4.Below will enumerate other conductive spacer 304B is arranged in nonocclusive pattern on conductive pad 304A embodiment.
Fig. 5 illustrates the schematic top plan view into the conductive pad structure of another embodiment of the utility model.Please refer to Fig. 5, conductive pad structure 404 is similar with the conductive pad structure 304 of Fig. 4, and identical assembly indicates with identical symbol.It should be noted that, both are difference, the conductive spacer 304B of present embodiment is the fin of arc, and the conductive spacer 504B of a part surrounds the oval-shaped first non-closed pattern F1, and another conductive spacer 304B partly surrounds the oval-shaped second non-closed pattern F2.
In the same manner, the second non-closed pattern F2 is also around the first non-closed pattern F1, and the opening OP1 of the first non-closed pattern F1 corresponds to the non-opening part of the second non-closed pattern F2.The width of the first opening OP1 and the second opening OP2 also can be designed to approximately the diameter (as 1 micron～5 microns) smaller or equal to conducting particles CP1, to avoid unnecessary colloid G1 to discharge conductive pad structure 404 when outer, be discharged from outside the conductive pad structure 404 with colloid G1 together with conducting particles CP1.
It should be noted that the non-closed pattern that conductive spacer 304B is arranged out on conductive pad 304, be not limited to the above-mentioned inside and outside two-layer first non-closed pattern F1, the second non-closed pattern F2.In other embodiments, more multi-layered non-closed pattern can be designed, more preferably to catch conducting particles CP1 on conductive pad 304.
In addition, non-closed pattern also is not limited to above-mentioned rectangle or ellipse, it also can be other nonocclusive geometric figure (for example circle or triangle etc.), or irregular figure etc., as long as the pattern of being arranged out is non-closed pattern, and have and to prevent that conducting particles CP1 is discharged from feature outside the conductive pad structure 304,404 with colloid G1, all belong in this origination techniques spirit scope.
Fig. 6 illustrates and is the utility model schematic top plan view of the conductive pad structure of an embodiment again.Please refer to Fig. 6, conductive pad structure 504 and above-mentioned conductive pad structure 304,404 are similar, and difference is that conductive spacer 504B is a salient point.See through a plurality of salient points that on conductive pad 304A, distribute, can increase the surface roughness of conductive pad 304A.When conductive projection B1 engages with the conductive pad structure 504 of Fig. 6, unnecessary colloid G1 still can be via conductive spacer 504B(salient point) between the gap and discharge smoothly outside the conductive pad structure 504, and conductive spacer 504B(salient point) can stop conducting particles CP1, be captured and stay quantity on the conductive pad 304A to increase conducting particles CP1.
It should be noted that, in other embodiments, also the salient point of Fig. 6 embodiment can be applied on the conductive pad structure with different Pareto diagrams, that is, the conductive pad sept 304B of Fig. 4 and Fig. 5 replaces with salient point, and is arranged in rectangle or oval-shaped non-closed pattern.
The utility model does not limit to above-mentioned preferred forms, and anyone can draw other various forms of rotation and lifting machines under enlightenment of the present utility model.All equalizations of being done according to the utility model claim change and modify, and all should belong to covering scope of the present utility model.
Claims (9)
1. conductive pad structure comprises the conductive pad structure of a periphery circuit region that is arranged on an active assembly array base plate, and it is characterized in that: this conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad.
2. conductive pad structure according to claim 1 is characterized in that: this non-closed pattern comprises at least:
One first non-closed pattern has a plurality of first openings; And
One second non-closed pattern has a plurality of second openings, and this second non-closed pattern is around this first non-closed pattern.
3. conductive pad structure according to claim 2 is characterized in that: the width of those first openings and those second openings is between 1 micron～5 microns.
4. conductive pad structure according to claim 1 is characterized in that: the shape of this non-closed pattern comprises: rectangle, circle, triangle or ellipse; Those conductive spacers comprise: many fins or a plurality of salient point; This conductive pad thickness is between 0.1 micron～2 microns; This conductive pad and those conductive spacers are formed in one.
5. an active assembly array base plate comprises the active assembly array base plate that has a viewing area and center on a periphery circuit region of this viewing area, and it is characterized in that: this active assembly array base plate comprises:
One chip is arranged at this periphery circuit region, and this chip has at least one conductive projection;
One conductive pad structure is arranged at this periphery circuit region, and this conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad; And
One anisotropic conductive is between this conductive projection and this conductive pad structure.
6. active assembly array base plate according to claim 5 is characterized in that: this non-closed pattern comprises at least:
One first non-closed pattern has a plurality of first openings; And
One second non-closed pattern has a plurality of second openings, and this second non-closed pattern is around this first non-closed pattern.
7. active assembly array base plate according to claim 6 is characterized in that: the width of those first openings and those second openings is between 1 micron～5 microns; The shape of this non-closed pattern comprises: rectangle, circle, triangle or ellipse; Those conductive spacers comprise: many fins or a plurality of salient point; This conductive pad thickness is between 0.1 micron～2 microns; This conductive pad and those conductive spacers are formed in one.
8. active assembly array base plate according to claim 5 is characterized in that: this anisotropic conductive comprises:
Colloid; And
A plurality of conducting particless are distributed in this colloid, and this chip electrically connects with this conductive pad structure via those conducting particless.
9. chip-packaging structure comprises the chip-packaging structure of a periphery circuit region that is arranged on an active assembly array base plate, and it is characterized in that: this chip-packaging structure comprises:
One chip has at least one conductive projection;
One conductive pad structure comprises:
One conductive pad; And
A plurality of conductive spacers are arranged on this conductive pad, and those conductive spacers are arranged in a non-closed pattern on this conductive pad; And
One anisotropic conductive is between this conductive projection and this conductive pad structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206794505U CN201910415U (en) | 2010-12-25 | 2010-12-25 | Conducting pad structure, chip packaging structure and driving component array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206794505U CN201910415U (en) | 2010-12-25 | 2010-12-25 | Conducting pad structure, chip packaging structure and driving component array substrate |
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| Publication Number | Publication Date |
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| CN201910415U true CN201910415U (en) | 2011-07-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2010206794505U Expired - Fee Related CN201910415U (en) | 2010-12-25 | 2010-12-25 | Conducting pad structure, chip packaging structure and driving component array substrate |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9607960B1 (en) | 2015-12-14 | 2017-03-28 | Industrial Technology Research Institute | Bonding structure and flexible device |
| WO2021189491A1 (en) * | 2020-03-27 | 2021-09-30 | 京东方科技集团股份有限公司 | Display module and display device |
| US11515234B2 (en) * | 2020-12-03 | 2022-11-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package including promoters and method of manufacturing the same |
-
2010
- 2010-12-25 CN CN2010206794505U patent/CN201910415U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9607960B1 (en) | 2015-12-14 | 2017-03-28 | Industrial Technology Research Institute | Bonding structure and flexible device |
| WO2021189491A1 (en) * | 2020-03-27 | 2021-09-30 | 京东方科技集团股份有限公司 | Display module and display device |
| US11980069B2 (en) | 2020-03-27 | 2024-05-07 | Boe Technology Group Co., Ltd. | Display and display device |
| US11515234B2 (en) * | 2020-12-03 | 2022-11-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package including promoters and method of manufacturing the same |
| US20230088723A1 (en) * | 2020-12-03 | 2023-03-23 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package including promoters and method of manufacturing the same |
| US11923274B2 (en) * | 2020-12-03 | 2024-03-05 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package including promoters and method of manufacturing the same |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110727 Termination date: 20161225 |