CN201773677U - Laminated chip inductor - Google Patents
Laminated chip inductor Download PDFInfo
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- CN201773677U CN201773677U CN2010205115761U CN201020511576U CN201773677U CN 201773677 U CN201773677 U CN 201773677U CN 2010205115761 U CN2010205115761 U CN 2010205115761U CN 201020511576 U CN201020511576 U CN 201020511576U CN 201773677 U CN201773677 U CN 201773677U
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Abstract
The utility model is applicable to the field of electronic component manufacturing, and provides a laminated chip inductor which comprises an upper cover, a lower cover and a plurality of insulation layers between the upper cover and the lower cover, wherein, 3/2 electrode coils are loaded on each of the insulation layers between the two insulation layers adjacent to the upper cover and the lower cover. In the utility model, the inner electrode structure of the laminated chip inductor is improved into a 3/2 surface inner electrode structure by reasonably setting the length of each layer of electrode units and integrating the easy operability in the technology, so that the quantity of coils formed in the inner electrode structure is greater under the condition of the same inductor length, and greater inductance can be generated in a limited space without adding technological procedures; besides, the manufacturing process is simple and efficient, and the cost is reduced; and the utility model can be widely applied to series products with small size and large inductance.
Description
Technical field
The utility model belongs to manufacture field of electronic elements, relates in particular to a kind of laminated chip inductor.
Background technology
Along with the development of electronic product, have chip inductor element short, little, light, thin, the reliability advantages of higher and obtained extensive use to high frequencyization, high speed and miniaturization.Reduce cost, improving performance is the effective means that enterprise enhances competitiveness.The reduction of general laminated chip inductor manufacturing cost, mainly based on raw material improvement (as ferrite powder, inner slurry etc.), but the method complex manufacturing process, fabrication cycle is long.In order to reduce cost, effectively means are exactly the coil that obtains high sensibility reciprocal in effective unit are, reduce and make required material and time.Inductor for other non-lamination sheet types can improve inductance value by increasing printing or coiled wire-wound coil quantity, but for laminated chip inductor, its size is (the about 0.3mm of thickness~0.8mm), improve inductance value by this method and have certain degree of difficulty that fixes.
The utility model content
The purpose of this utility model is to provide a kind of laminated chip inductor, is intended to solve the existing low problem of laminated chip inductor inductance value.
The utility model is to realize like this, laminated chip inductor, comprise loam cake, lower cover, be located at several insulating barriers between described loam cake and the lower cover, all be loaded with 3/2 electrode coil on each insulating barrier between two adjacent with described loam cake respectively insulating barriers with lower cover.
As optimal technical scheme of the present utility model:
Each insulating barrier is equipped with through hole, is loaded with conductor in the described through hole, and the electrode coil that adjacent insulating barrier is loaded with is connected by described conductor.
All be loaded with 3/2 electrode coil on two adjacent with described loam cake respectively insulating barriers with lower cover.
The utility model is by rationally setting the length of every layer of electrode unit, and the ease for operation on the composite technology, the interior electrode structure of laminated chip inductor is improved to 3/2 interior electrode structure, under the situation of identical inductances length and width, the coil that electrode structure forms in this is more, can produce higher inductance value in limited space, and need not increase manufacturing process, manufacturing process is simple and efficient, has reduced cost, can be widely used on the series of products of the high sensibility reciprocal of small size.
Description of drawings
Fig. 1 is existing laminated chip inductor structural representation;
Fig. 2 is the laminated chip inductor structural representation that the utility model first embodiment provides.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
The utility model embodiment is improved to 3/2 interior electrode structure with existing 3/4 interior electrode structure, increases coil quantity under the situation that does not increase inductor length, width and thickness, to improve inductance value.
The utility model embodiment provides a kind of laminated chip inductor, comprise loam cake, lower cover, be located at several insulating barriers between loam cake and the lower cover, all be loaded with 3/2 electrode coil on each insulating barrier between two adjacent with loam cake respectively insulating barriers with lower cover.
The utility model embodiment is by rationally setting the length of every layer of electrode unit, and the ease for operation on the composite technology, the interior electrode structure of laminated chip inductor is improved to 3/2 interior electrode structure, under the situation of identical inductances length and width, the coil quantity that electrode structure forms in being somebody's turn to do is many, can in limited space, produce higher inductance value, and need not increase manufacturing process, manufacturing process is simple and efficient, reduced cost, can be widely used on the series of products of the high sensibility reciprocal of small size.
Below in conjunction with specific embodiment specific implementation of the present utility model is described in detail:
Embodiment one:
Fig. 2 shows the structural representation of the laminated chip inductor that the utility model first embodiment provides, and for convenience of explanation, only shows the part relevant with the utility model embodiment.
This inductor comprises loam cake 1, lower cover 2 and a plurality of insulating barrier 3, all is provided with electrode unit 4 at each surface of insulating layer, and the electrode unit 4 on a plurality of insulating barriers has formed several complete coils, constitutes the basic structure of inductor.Existing laminated chip inductor mostly is 3/4 interior electrode structure, promptly 4 single-layer electrodes unit form 3 complete coil, present embodiment improves the coil composition, electrode unit in the individual layer is prolonged, around a circle half, make 2 single-layer electrodes unit form 3 complete coil, promptly form 3/2 interior electrode structure.Like this, for the inductor of equal length, the inductance value of 3/4 interior electrode structure inductor that 3/2 interior electrode structure inductor that present embodiment provides is more traditional doubles at least.
This 3/2 interior electrode structure adopts the lamination sheet type component manufacturing technology to make, and concrete making flow process is as follows:
The first step: form first insulating barrier, in first Jie's insulation, form the ground floor electrode unit;
Second step: above the ground floor electrode unit, form second insulating barrier, and on second insulating barrier, offer through hole, in through hole, fill conductor, the end of ground floor electrode unit and conductor are joined with the terminal corresponding position of ground floor electrode unit;
The 3rd step: on second insulating barrier, form second layer electrode unit, the initiating terminal of second layer electrode unit and the conductor in the through hole are joined, first, second layer electrode unit is connected;
Form the 3rd insulating barrier, triple electrode unit successively according to the aforesaid operations flow process, the 4th insulating barrier, the 4th layer of electrode unit, until last layer insulating and electrode unit, and make between the adjacent layer electrode unit by the conductor in the through hole on each insulating barrier and to connect.
In the above-mentioned electrode structure, be loaded with 1.5 circle electrodes on every layer insulating, 2 single-layer electrodes unit can form 3 complete coils, form 3/2 interior electrode structure.Be appreciated that, in the practical operation flow process, factors such as the complexity of comprehensive manufacturing process and operating efficiency, electrode on ground floor insulating barrier and last layer insulating can not be 1.5 circles, its concrete length is decided according to the practical operation situation, and its minute differences there is no considerable influence to the performance of inductor.
Following form is the relevant parameter table of comparisons of described 3/2 the interior electrode structure of present embodiment and traditional 3/4 interior electrode structure inductor:
Table one. the performance parameter table of comparisons when printing tie point number is identical
The electrode structure type | Printing tie point number | The electrode number of | Inductance value | |
3/4 interior electrode | 10 | 7.5 circle | 4.7 |
|
3/2 interior electrode | 10 | 14.5 circle | 12uH |
Table two. the technical parameter table of comparisons when forming the identical electrode number of turns
The electrode structure type | The internal electrode number of turns | Printing |
3/4 interior electrode | 14.5 circle | 19 |
3/2 interior electrode | 14.5 circle | 10 |
By above table as can be known, when tie point number (the total number that is equivalent to the through hole on the insulating barrier) was identical, the inductance value of 3/2 interior electrode structure inductor generation was more than two times of 3/4 interior electrode structure inductor of tradition; In the time will obtaining the electrode coil of equal number, 3/2 required tie point number of interior electrode structure only is about 1/2 of 3/4 interior electrode structure of tradition.By above table as seen, under the identical situation of inductance value, the inductor that present embodiment provides can be saved a plurality of tie points, saves and makes man-hour, enhances productivity.
The utility model embodiment is by rationally setting the length of every layer of electrode unit, and the ease for operation on the composite technology, the interior electrode structure of laminated chip inductor is improved to 3/2 interior electrode structure, can in limited space, produce higher inductance value, and need not increase manufacturing process, manufacturing process is simple and efficient, has reduced cost, can be widely used on the series of products of the high sensibility reciprocal of small size.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (3)
1. laminated chip inductor comprises loam cake, lower cover, is located at several insulating barriers between described loam cake and the lower cover, it is characterized in that, all is loaded with 3/2 electrode coil on each insulating barrier between two adjacent with lower cover with described loam cake respectively insulating barriers.
2. inductor as claimed in claim 1 is characterized in that each insulating barrier is equipped with through hole, is loaded with conductor in the described through hole, and the electrode coil that adjacent insulating barrier is loaded with is connected by described conductor.
3. inductor as claimed in claim 1 is characterized in that, all is loaded with 3/2 electrode coil on two adjacent with lower cover with described loam cake respectively insulating barriers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN2010205115761U CN201773677U (en) | 2010-08-31 | 2010-08-31 | Laminated chip inductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN2010205115761U CN201773677U (en) | 2010-08-31 | 2010-08-31 | Laminated chip inductor |
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CN201773677U true CN201773677U (en) | 2011-03-23 |
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CN2010205115761U Expired - Lifetime CN201773677U (en) | 2010-08-31 | 2010-08-31 | Laminated chip inductor |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102867634A (en) * | 2012-05-07 | 2013-01-09 | 深圳市固电电子有限公司 | Laminated chip inductor |
CN104900373A (en) * | 2014-03-04 | 2015-09-09 | 深圳振华富电子有限公司 | Large power chip multilayer inductor |
CN114551063A (en) * | 2022-04-02 | 2022-05-27 | 电子科技大学 | Resin type inductance structure |
-
2010
- 2010-08-31 CN CN2010205115761U patent/CN201773677U/en not_active Expired - Lifetime
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102867634A (en) * | 2012-05-07 | 2013-01-09 | 深圳市固电电子有限公司 | Laminated chip inductor |
CN104900373A (en) * | 2014-03-04 | 2015-09-09 | 深圳振华富电子有限公司 | Large power chip multilayer inductor |
CN114551063A (en) * | 2022-04-02 | 2022-05-27 | 电子科技大学 | Resin type inductance structure |
CN114551063B (en) * | 2022-04-02 | 2023-09-15 | 电子科技大学 | Resin type inductance structure |
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CX01 | Expiry of patent term |
Granted publication date: 20110323 |