CN201726332U - Novel double-frequency controlled high-power inverter - Google Patents
Novel double-frequency controlled high-power inverter Download PDFInfo
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- CN201726332U CN201726332U CN2010202407217U CN201020240721U CN201726332U CN 201726332 U CN201726332 U CN 201726332U CN 2010202407217 U CN2010202407217 U CN 2010202407217U CN 201020240721 U CN201020240721 U CN 201020240721U CN 201726332 U CN201726332 U CN 201726332U
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Abstract
The utility model discloses a novel double-frequency controlled high-power inverter, comprising a phase-shift isolated dual transformer circuit, a high-voltage rectifier circuit, a capacitance voltage-stabilizing filter circuit, a five-level diode clamped type high-voltage low-frequency inverter circuit, a five-level diode clamped type low-voltage high-frequency inverter circuit, an output filter circuit, an isolated driving circuit connected with the inverter circuits, and a control circuit connected with the isolated driving circuit. The utility model aims to provide the novel double-frequency controlled high-power inverter with the characteristics of high work efficiency, simple control, small output harmonic content, and fast system response.
Description
Technical field
The utility model patent relates to a kind of novel double frequency control high power contravariant device.
Background technology
The high power contravariant device is used very wide at electric and electronic technical field, as powerful frequency converter, active power filter, Static Var Compensator etc., and for high power contravariant device occasion, owing to have contradiction between the switching frequency of high-power switch device and the contact capacity, and the restriction of switching frequency is difficult to use the performance that the SPWM technology is improved the big capacity inverter of tradition, therefore people have done a lot of work at aspects such as circuit topology and control strategies, try hard to improve its performance when improving the inverter capacity.
Traditional two-level inverter realize in order to obtain the connection in series-parallel of high-power general dependence switching device, but this will bring a series of problems such as static state voltage equipoise, dynamic voltage balancing and current-sharing, and technical uncertain factor is a lot, and reliability is not high; And because output has only two level, harmonic wave of output voltage is bigger.
The jumbo method of early stage raising is to adopt multiple technology.In voltage source inverter, the alternating voltage of output is a square wave, in order to reduce harmonic wave, usually several square wave outputs is combined into sine wave.Multipleization system has that power output is big, operational efficiency is high, can improve advantages such as unitary device output harmonic wave, but have the following disadvantages simultaneously: pulse-ampli tude modulation is adopted in control, the system dynamics difference in response, must use the transformer of particular design, this will make system cost and loss increase greatly, and has increased the difficulty of control owing to reasons such as magnetic saturation and impulse currents.
Above-mentioned traditional inverter does not have too many breakthrough realizing the powerful while on performance, and with the complexity of system and expensive be cost.In recent years, multi-electrical level inverter is more and more receives publicity.It generally is to be that the synthetic staircase waveform of capacitance voltage is to approach sinusoidal output voltage by several level step typical case.The output waveform of this converter has better harmonic spectrum, and the voltage stress that each switching device bore is less, and switching device is operated in below the output voltage fundamental frequency, and switching loss is little, thereby this converter has become the focus of research.But there is such shortcoming in multi-electrical level inverter: clamping diode that needs are a large amount of or clamping capacitance, there is the mid-point voltage imbalance problem, output waveform is then being controlled very complexity more than five level, the cascade multi-level inverter needs more independent current source.
The utility model content
The utility model patent has overcome the deficiency of above technology, provides that a kind of loss is low, control is simple, the high power contravariant device of faster system response, novel combination type double frequency control that reliability is high.
The utility model adopts following technical scheme for addressing the above problem:
A kind of novel double frequency control high power contravariant device is characterized in that being made up of three identical inverter output circuits of structure, and each inverter output circuit includes
Double transformer circuit 1 is isolated in first phase shift that ac high-voltage input is become the secondary high pressure of two isolation;
The voltage commutation that a secondary generation of double transformer circuit 1 is isolated in first phase shift becomes the first high-voltage rectifier circuit 2 of high-voltage dc voltage;
The voltage commutation that another secondary generation of double transformer circuit 1 is isolated in first phase shift becomes the second high-voltage rectifier circuit 3 of high-voltage dc voltage;
The first capacitance voltage stabilizing filter circuit 4 that the direct voltage that the first high-voltage rectifier circuit 2 is produced carries out voltage stabilizing and filtering;
The second capacitance voltage stabilizing filter circuit 5 that the direct voltage that the second high-voltage rectifier circuit 3 is produced carries out voltage stabilizing and filtering;
High-voltage dc voltage is reverse into the five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6 of five level power frequency stepped voltage waveform;
Produce first isolated drive circuit 7 of the switching tube drive signal of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6;
Control signal is provided for first isolated drive circuit 7, and according to the control section circuit 8 that second isolated drive circuit 15 provides control signal that feeds back signal to of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6 outputs;
Double transformer circuit 9 is isolated in second phase shift that interchange input high pressure is become the secondary low-voltage of two isolation;
The voltage commutation that a secondary generation of double transformer circuit 9 is isolated in second phase shift becomes the first low-voltage rectifier circuit 10 of high-voltage dc voltage;
The voltage commutation that another secondary generation of double transformer circuit 9 is isolated in second phase shift becomes the second low-voltage rectifier circuit 11 of high-voltage dc voltage;
The 3rd capacitance voltage stabilizing filter circuit 12 that the direct voltage that the first low-voltage rectifier circuit 10 is produced carries out voltage stabilizing and filtering;
The 4th capacitance voltage stabilizing filter circuit 13 that the direct voltage that the second low-voltage rectifier circuit 11 is produced carries out voltage stabilizing and filtering;
Low-voltage dc voltage is reverse into five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14 of five-level high-frequency PWM voltage;
Produce second isolated drive circuit 15 of the switching tube drive signal of five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14;
The output filter circuit 16 that is connected with the cascade output of five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14 and the first circuit 6 of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates.
Compared with prior art, the beneficial effects of the utility model are:
1, this composite type double frequency control inverter topology is closed by one five level diode clamp formula low-frequency high-power inverter and one five level diode clamp formula high frequency small-power inverter stage joint group and is formed, topological structure is simple, has avoided traditional high power contravariant device to use a large amount of catching diode and independent capacitance.The low frequency inverter is mainly used in power output, can adopt low frequency switching devices such as GTO, so just can improve power grade; And high-frequency inverter is not mainly born the task of processing power, adopt high frequency switching devices such as IGBT, be mainly used in to improve waveform quality and improve system dynamics and answer performance, the advantage that can make full use of the low-and high-frequency switching device is like this improved the efficient of system response time and raising system when improving overall system capacity.
2, this composite type inverter control is simpler.Five level diode clamp formula low-frequency high-power inverters adopt the staircase waveform control mode of fixed pulse width, and whole inverter switching device pipe is operated in the power frequency state, and the switching loss of high power contravariant device is lower like this; The modulation signal of five level diode clamp formula high frequency small-power inverters is the difference of desirable sine wave output signal and low-frequency high-power inverter output signal, all carrier phase same signals of triangular carrier that this modulation signal is identical with four phase places are compared and are realized the high-frequency PWM modulation, therefore export the PWM waveform that to control, thereby improve the output waveform of composite type inverter.
3, for preventing that electric current occurring between high-power high-frequency inverter and the small-power low frequency inverter pours in down a chimney phenomenon, the utility model patent adopts a kind of special fixed pulse width modulation system at five level diode clamp formula low-frequency high-power inverters, level at this mode medium and low frequency high power contravariant device output staircase waveform is :+2E/3, E/3,0,-E/3,-2E/3 wherein E is the maximum of desirable sine wave output, the absolute value that makes desirable sine wave output of any time is all greater than the absolute value of power frequency staircase waveform output, the error modulation signal of high frequency small-power inverter just is always unipolar in half power frequency period like this, has avoided circulation occurring between the low-and high-frequency inverter and has poured in down a chimney phenomenon.
4, because the small-power inverter does not mainly provide power, employing is based on the high-frequency PWM modulation system of four carrier waves control in, so it is very little to make up total harmonic distortion of output waveform of inverter.
Description of drawings
Fig. 1 is a double frequency control inverter A phase output unit circuit;
Fig. 2 is a double frequency control inverter three-phase output schematic diagram;
Fig. 3 is five level diode clamp formula high pressure low frequency inverter output waveform schematic diagrames;
Fig. 4 is five level diode clamp formula low pressure high-frequency inverter output waveform schematic diagrames
Fig. 5 is a single-phase inversion circuits cascading output waveform schematic diagram
Fig. 6 is the output waveform spectrogram.
Embodiment
Be described in further detail below in conjunction with accompanying drawing and execution mode of the present utility model:
A kind of novel double frequency control high power contravariant device comprises A, B, inverter output circuit that C three-phase circuit structure is identical.
Referring to Fig. 1, be that example illustrates its implementation with A phase inverter circuit unit below:
The inverter output circuit includes first phase shift and isolates double transformer circuit 1, first, the second high-voltage rectifier circuit 2 and 3, first, the second capacitance voltage stabilizing filter circuit 4 and 5, five level diode clamp formula high pressure low frequency inverter circuits 6, first isolated drive circuit 7, control section circuit 8, double transformer circuit 9 is isolated in second phase shift, first, the second low- voltage rectifier circuit 10 and 11, the 3rd capacitance voltage stabilizing filter circuit 12 and the 4th capacitance voltage stabilizing filter circuit 13, five level diode clamp formula low pressure high frequency inverter circuit 14, second isolated drive circuit 15, output filter circuit 16.
The secondary high pressure of double transformer circuit 1 with two isolation of A cross streams high pressure input becoming isolated in first phase shift;
The voltage commutation that the first high-voltage rectifier circuit 2 is isolated a secondary generation of double transformer circuit 1 with first phase shift becomes high-voltage dc voltage;
The voltage commutation that the second high-voltage rectifier circuit 3 is isolated another secondary generation of double transformer circuit 1 with first phase shift becomes high-voltage dc voltage;
The first capacitance voltage stabilizing filter circuit 4 carries out voltage stabilizing and filtering with the direct voltage that the first high-voltage rectifier circuit 2 produces;
The second capacitance voltage stabilizing filter circuit 5 carries out voltage stabilizing and filtering with the direct voltage that the second high-voltage rectifier circuit 3 produces;
Five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6 is reverse into five level power frequency stepped voltage waveform with high-voltage dc voltage;
First isolated drive circuit 7 produces the switching tube drive signal of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6;
Control section circuit 8 provides control signal for first isolated drive circuit 7, and provides control signal according to second isolated drive circuit 15 that feeds back signal to of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit 6 outputs;
The secondary low-voltage that double transformer circuit 9 becomes A cross streams input high pressure two isolation is isolated in second phase shift;
The voltage commutation that the first low-voltage rectifier circuit 10 is isolated a secondary generation of double transformer circuit 9 with second phase shift becomes high-voltage dc voltage;
The voltage commutation that the second low-voltage rectifier circuit 11 is isolated another secondary generation of double transformer circuit 9 with second phase shift becomes high-voltage dc voltage;
The 3rd capacitance voltage stabilizing filter circuit 12 carries out voltage stabilizing and filtering with the direct voltage that the first low-voltage rectifier circuit 10 produces;
The 4th capacitance voltage stabilizing filter circuit 13 carries out voltage stabilizing and filtering with the direct voltage that the second low-voltage rectifier circuit 11 produces;
Five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14 are reverse into five-level high-frequency PWM voltage with low-voltage dc voltage;
Second isolated drive circuit 15 produces the switching tube drive signal of five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14;
Output filter circuit 16 is connected with the cascade output of five level diode clamp formula low pressure high-frequency inverter cascade element circuits 14 and the first circuit 6 of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates, and A phase cascade output waveform is carried out filtering.
Described control section circuit 8 is dsp chip or CPLD chip.The dsp chip model is TMS320LF2407A.CPLD chip model is EPM1270T144C5.
In the utility model, the switching device of described five level diode clamp formula high pressure low frequency inverter circuits 6 adopts the lower high-power switch devices of switching frequency such as GTO/IGCT, and five level diode clamp formula low pressure high frequency inverter circuit adopt the lower small power switch devices of switching frequency such as IGBT.Five level diode clamp formula high pressure low frequency inverters adopt fixed pulse width control mode output waveform (see figure 3), adopt this mode, and switching device can be operated in very low switching frequency, thereby make that the switching loss of high power contravariant device is just very low.Five level diode clamp formula low pressure high frequency inverter circuit adopt based on four high-frequency PWM modulator approach output waveform (see figure 4)s with same phase triangular carrier, and modulation signal is the difference of desired reference output sinusoidal signal and low-frequency high-power inverter output signal.Voltage waveform harmonic content by such cascade array output is very low (seeing Fig. 5 and Fig. 6) just.
Because nearly 48 of the switching devices in the main circuit, so need the output of 48 tunnel control impuls, only realize having suitable difficulty with DSP, if adopt CPLD to realize The whole control, can be limited by the internal resource of CPLD and cost again, if therefore both are combined, adopt the control system of DSP+CPLD, utilize programmable logic device speed fast, the characteristics that the I/O mouth is many, can export multichannel fixed pulse width waveform and multichannel high-frequency PWM waveform easily, and can guarantee synchronism, save the resource of DSP simultaneously, so just can utilize DSP to realize control and calculation function.
Claims (4)
1. a novel double frequency control high power contravariant device is characterized in that being made up of three identical inverter output circuits of structure, and each inverter output circuit includes
Double transformer circuit (1) is isolated in first phase shift that ac high-voltage input is become the secondary high pressure of two isolation;
The voltage commutation that a secondary generation of double transformer circuit (1) is isolated in first phase shift becomes the first high-voltage rectifier circuit (2) of high-voltage dc voltage;
The voltage commutation that another secondary generation of double transformer circuit (1) is isolated in first phase shift becomes the second high-voltage rectifier circuit (3) of high-voltage dc voltage;
The first capacitance voltage stabilizing filter circuit (4) that the direct voltage that the first high-voltage rectifier circuit (2) is produced carries out voltage stabilizing and filtering;
The second capacitance voltage stabilizing filter circuit (5) that the direct voltage that the second high-voltage rectifier circuit (3) is produced carries out voltage stabilizing and filtering;
High-voltage dc voltage is reverse into the five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit circuit (6) of five level power frequency stepped voltage waveform;
Produce first isolated drive circuit (7) of the switching tube drive signal of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit's circuit (6);
Control signal is provided for first isolated drive circuit (7), and according to the control section circuit (8) that second isolated drive circuit (15) provides control signal that feeds back signal to of five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit's circuit (6) output;
Double transformer circuit (9) is isolated in second phase shift that interchange input high pressure is become the secondary low-voltage of two isolation;
The voltage commutation that a secondary generation of double transformer circuit (9) is isolated in second phase shift becomes the first low-voltage rectifier circuit (10) of high-voltage dc voltage;
The voltage commutation that another secondary generation of double transformer circuit (9) is isolated in second phase shift becomes the second low-voltage rectifier circuit (11) of high-voltage dc voltage;
The 3rd capacitance voltage stabilizing filter circuit (12) that the direct voltage that the first low-voltage rectifier circuit (10) is produced carries out voltage stabilizing and filtering;
The 4th capacitance voltage stabilizing filter circuit (13) that the direct voltage that the second low-voltage rectifier circuit (11) is produced carries out voltage stabilizing and filtering;
Low-voltage dc voltage is reverse into five level diode clamp formula low pressure high-frequency inverter cascade element circuits (14) of five-level high-frequency PWM voltage;
Produce second isolated drive circuit (15) of the switching tube drive signal of five level diode clamp formula low pressure high-frequency inverter cascade element circuits (14);
The output filter circuit (16) that is connected with the cascade output of five level diode clamp formula low pressure high-frequency inverter cascade element circuits (14) and five level diode clamp formula high pressure low frequency inverter stage receipts or other documents in duplicates unit's circuit (6).
2. a kind of novel double frequency control high power contravariant device according to claim 1 is characterized in that described control section circuit (8) is dsp chip or CPLD chip.
3. a kind of novel double frequency control high power contravariant device according to claim 2 is characterized in that described dsp chip model is TMS320LF2407A.
4. a kind of novel double frequency control high power contravariant device according to claim 2 is characterized in that described CPLD chip model is EPM1270T144C5.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010202407217U CN201726332U (en) | 2010-06-21 | 2010-06-21 | Novel double-frequency controlled high-power inverter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010202407217U CN201726332U (en) | 2010-06-21 | 2010-06-21 | Novel double-frequency controlled high-power inverter |
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| CN201726332U true CN201726332U (en) | 2011-01-26 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106253643A (en) * | 2016-07-28 | 2016-12-21 | 东南大学 | A kind of double frequency phase-shifting carrier wave PWM control method based on subring energy-storage system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106253643A (en) * | 2016-07-28 | 2016-12-21 | 东南大学 | A kind of double frequency phase-shifting carrier wave PWM control method based on subring energy-storage system |
| CN106253643B (en) * | 2016-07-28 | 2018-07-17 | 东南大学 | A kind of double frequency phase-shifting carrier wave PWM control methods based on subring energy-storage system |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110126 Termination date: 20140621 |
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