CN201726305U - Pulse interface circuit for IPM - Google Patents
Pulse interface circuit for IPM Download PDFInfo
- Publication number
- CN201726305U CN201726305U CN201020184626XU CN201020184626U CN201726305U CN 201726305 U CN201726305 U CN 201726305U CN 201020184626X U CN201020184626X U CN 201020184626XU CN 201020184626 U CN201020184626 U CN 201020184626U CN 201726305 U CN201726305 U CN 201726305U
- Authority
- CN
- China
- Prior art keywords
- triode
- pulse
- pulse transformer
- diode
- winding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Abstract
The utility model discloses an interface circuit for driving pulse in an IGBT intelligent power module (IPM), which comprises a PWM signal access terminal, a triode Q1, a base resistor R1 of the triode Q1, a pulse transformer T1, a reverse serial diode D1 and an output side rectifier diode D2; the pulse transformer comprises three windings; the original side winding homonymous terminal of the pulse transformer T1 is accessed to a 5V power supply, and the other end thereof is serially connected with the triode Q1; the emitter of the triode Q1 is accessed to the ground of an input signal (the same ground with the 5V power supply); the homonymous terminal of the demagnetized winding of the pulse transformer T1 is serially connected with the reverse diode D1, and the other end thereof is connected with the original side winding homonymous terminal; the homonymous terminal of the output winding of the pulse transformer T1 is serially connected with the rectifier diode D2, and the other end thereof is a negative terminal of an output signal; and the other end of the diode D2 is the positive terminal of the output signal.
Description
Technical field
The utility model relates to the interface circuit of a kind of IGBT of being used for Intelligent Power Module (IPM) driving pulse, belongs to field of power electronics.
Background technology
Development along with power electronic technology, the application of IGBT Intelligent Power Module (IPM) more and more widely, in the high-power applications occasion, IGBT is opening the generation that can bring dc voltage high frequency burr in the turn off process at a high speed, and then have influence on system's power supply, thereby bring interference to control signal, the pulse interface circuit of existing application in the IPM interface circuit all is core with the optocoupler, the optocoupler output signal is because the existence of the inner triode pressure drop of optocoupler, make the pwm signal low level of output non-vanishing, in the application of IPM, be 2V because the high point of IPM input is put down, low level is 1.5, so be easy to receive interference, cause the mistake of IGBT to turn-off and open by mistake logical, can cause the distortion of power electronic equipment output waveform in actual applications, the damage of IGBT can be caused when serious, even the collapse of system can be caused.Adopt the pulse interface circuit of light-coupled isolation scheme can cause pwm signal to produce bigger transmission delay in addition, reduced the control precision of system.
Summary of the invention
The utility model has well solved above-mentioned the deficiencies in the prior art and problem, a kind of interface circuit of pulse is provided, and the simple and convenient cost of this circuit is low, can improve simultaneously to resist in disturbing performance, the reliability of raising system has reduced the transmission delay of pwm signal.
The technical solution of the utility model is as follows:
The pulse interface circuit that is used for IPM of the present utility model, include the pwm signal incoming end, triode Q1, the base resistance R1 of triode Q1, pulse transformer T1, oppositely be connected in series diode D1 and outlet side rectifier diode D2, it is characterized in that the Pulse Electric depressor in described is three windings, the former limit winding of the pulse transformer T1 5V power supply that terminates to of the same name, the other end and triode Q1 series connection, the emitter of triode Q1 receive input signal ground (with the 5V power supply be same ground), the end of the same name of the degaussing winding of pulse transformer T1 and backward diode D1 series connection, the other end links to each other with former limit winding end of the same name, the end of the same name of the output winding of pulse transformer T1 and rectifier diode D2 series connection, the other end is the negative terminal of output signal, and the other end of diode D2 is the anode of output signal.
Pulse interface circuit of the present utility model, its further technical scheme is that described pwm signal access amplitude is 5V, the pwm signal incoming end is connected with the base resistance R1 of triode Q1, and the size of resistance R 1 is 33K, and two diodes in the circuit are Schottky diode.The former limit of pulse transformer T1, degaussing and marginal umber of turn ratio are 1: 3: 3
Pulse interface circuit of the present utility model, its further technical scheme can also be that the pwm signal incoming end at this driving circuit of high-voltage frequency converter is parallel with a filter capacitor and comes the filtering peak voltage; Further technical scheme is that the size of filter capacitor is 10PF when pwm signal access amplitude is 5V again.
Pulse interface circuit of the present utility model, the degaussing winding that its further technical scheme can also be described pulse transformer T1 can be in input pwm signal duty ratio greater than adjusting the number of turn at 50% o'clock changing the amplitude of output pwm signal, with the demand of the IPM that satisfies all size.
The utlity model has following beneficial effect:
The output pwm signal low level of pulse interface circuit of the present utility model is 0, and anti-interference is greatly enhanced, and pulse transformer has been realized the pulse isolation features simultaneously, has improved the reliability of system.The duty ratio that the degaussing winding of pulse transformer guarantees the input pwm pulse signal is greater than 50% o'clock, and system still can export the pwm signal of duty ratio corresponding.The conventional pulse interface circuit signal delay that adopts the light-coupled isolation scheme postpones to be shortened greatly behind employing this programme, and then has improved the control precision of power electronic equipment greater than 2us.
Description of drawings
Fig. 1 is an electrical block diagram of the present utility model
Embodiment
Below in conjunction with accompanying drawing the utility model technology contents is explained:
As shown in Figure 1, the pulse interface circuit that is used for IPM of the present utility model, include the pwm signal incoming end, triode Q1, the base resistance R1 of triode Q1, pulse transformer T1, oppositely be connected in series diode D1 and outlet side rectifier diode D2, it is characterized in that the Pulse Electric depressor in described is three windings, the former limit winding of the pulse transformer T1 5V power supply that terminates to of the same name, the other end and triode Q1 series connection, the emitter of triode Q1 receive input signal ground (with the 5V power supply be same ground), the end of the same name of the degaussing winding of pulse transformer T1 and backward diode D1 series connection, the other end links to each other with former limit winding end of the same name, the end of the same name of the output winding of pulse transformer T1 and rectifier diode D2 series connection, the other end is the negative terminal of output signal, and the other end of diode D2 is the anode of output signal.It is 5V that pwm signal inserts amplitude, and the pwm signal incoming end is connected with the base resistance R1 of triode Q1, and the size of resistance R 1 is 33K, and two diodes in the circuit are Schottky diode.The former limit of pulse transformer T1, degaussing and marginal umber of turn ratio are 1: 3: 3
When input PW signal is high level 5V, triode Q1 base stage has electric current to flow through, and triode Q1 is in opening state, and 5V voltage is added on the former limit winding of pulse transformer T1, and then, export through diode D2 at the marginal pwm signal that induces 15V of pulse transformer T1.
When PWM is low level, triode Q1 base stage no current flows through, so triode Q1 is in cut-off state, the former limit winding of pulse transformer T1 is 0, and then at the pwm signal of marginal inducing-15V of pulse transformer T1, because this moment, rectifier diode D2 was in cut-off state, the pwm signal of output is a low level.
Claims (3)
1. the pulse interface circuit that is used for IPM, include the pwm signal incoming end, triode Q1, the base resistance R1 of triode Q1, pulse transformer T1, oppositely be connected in series diode D1 and outlet side rectifier diode D2, it is characterized in that the Pulse Electric depressor in described is three windings, the former limit winding of the pulse transformer T1 5V power supply that terminates to of the same name, the other end and triode Q1 series connection, the emitter of triode Q1 is received the ground of input signal, with the 5V power supply be same ground, the end of the same name of the degaussing winding of pulse transformer T1 and backward diode D1 series connection, the other end links to each other with former limit winding end of the same name, the end of the same name of the output winding of pulse transformer T1 and rectifier diode D2 series connection, the other end is the negative terminal of output signal, and the other end of diode D2 is the anode of output signal.
2. pulse interface circuit according to claim 1, it is characterized in that it is 5V that described pwm signal inserts amplitude, the pwm signal incoming end is connected with the base resistance R1 of triode Q1, and the size of resistance R 1 is 33K, and two diodes in the circuit are Schottky diode.
3. pulse interface circuit according to claim 1 is characterized in that former limit, degaussing and the marginal umber of turn ratio of pulse transformer T1 is 1: 3: 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020184626XU CN201726305U (en) | 2010-05-06 | 2010-05-06 | Pulse interface circuit for IPM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020184626XU CN201726305U (en) | 2010-05-06 | 2010-05-06 | Pulse interface circuit for IPM |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201726305U true CN201726305U (en) | 2011-01-26 |
Family
ID=43494658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201020184626XU Expired - Lifetime CN201726305U (en) | 2010-05-06 | 2010-05-06 | Pulse interface circuit for IPM |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201726305U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101860241A (en) * | 2010-05-06 | 2010-10-13 | 上海科祺工业调速有限公司 | Pulse interface circuit for IPM |
-
2010
- 2010-05-06 CN CN201020184626XU patent/CN201726305U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101860241A (en) * | 2010-05-06 | 2010-10-13 | 上海科祺工业调速有限公司 | Pulse interface circuit for IPM |
| CN101860241B (en) * | 2010-05-06 | 2013-08-14 | 上海科祺工业调速有限公司 | Pulse interface circuit for IPM |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101640526B (en) | IGBT driving circuit embedded with isolating source | |
| CN203135829U (en) | Transformer isolation-type gate drive circuit capable of performing negative-voltage switching off | |
| CN102594101A (en) | Isolated rapid turn-off metal oxide field effect transistor (MOFET) driving circuit | |
| CN202524281U (en) | Isolated rapid turn-off oxide field effect transistor (MOFET) driving circuit | |
| CN201830521U (en) | Offline type high-power LED (light-emitting diode) constant-current drive power supply | |
| CN101753085A (en) | Step motor controlled driving circuit | |
| CN105305831A (en) | Bridge type converter single-path signal gate driving circuit using isolation transformer | |
| CN104883035A (en) | Driving circuit for grid voltage of suspension switch tube | |
| CN203135826U (en) | Drive circuit of voltage type gate control device | |
| CN201726305U (en) | Pulse interface circuit for IPM | |
| CN2540657Y (en) | Secondary synchronous rectification circuit for anti-excite type switch voltage-stabilized source | |
| CN209217940U (en) | A kind of passive metal-oxide-semiconductor safe driving circuit of isolating transformer centre cap | |
| CN201601645U (en) | Control driving circuit of stepping motor | |
| CN201118531Y (en) | External transformer driving circuit | |
| CN103647437A (en) | High-voltage high-current IGBT driving system | |
| CN101860241B (en) | Pulse interface circuit for IPM | |
| CN203368305U (en) | Driving circuit of IGBT module power switch | |
| CN202424493U (en) | Driving circuit of liquid level control (LLC) half-bridge resonant converter | |
| CN217956948U (en) | PFC pulse width modulation signal control drive circuit | |
| CN203056968U (en) | Power supply circuit | |
| CN202424561U (en) | Synchronous rectification driving circuit | |
| CN105519270B (en) | A kind of pulse width signal amplifying circuit | |
| CN201918896U (en) | Controlling circuit for improving working current of switched reluctance motor and direct-current motor | |
| CN201219234Y (en) | Resonance driving module with dynamic power supply | |
| CN202455272U (en) | Power supply circuit with over-current protection |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI NEWPOWER TECHNOLOGY GROUP CO., LTD. Free format text: FORMER OWNER: SHANGHAI SUNPROM ELECTRIC CO., LTD. Effective date: 20120803 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 200235 XUHUI, SHANGHAI TO: 200233 JIADING, SHANGHAI |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20120803 Address after: 200233 Shanghai City, Jiading District Nanxiang Town, Shanghai Yi Road No. 355 Building 1 Room 302 Patentee after: Shanghai Newpower Technology Group Co., Ltd. Address before: 200235, room 804-806, block D, Everbright Exhibition, No. 80, Xuhui District, Shanghai, Caobao Road Patentee before: Shanghai Keqi Industrial Speed Control Co.,Ltd. |
|
| DD01 | Delivery of document by public notice |
Addressee: Shanghai New Source Technology Group Co., Ltd. Zheng Juwu Document name: Notification of Passing Examination on Formalities |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20110126 Effective date of abandoning: 20130814 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20110126 Effective date of abandoning: 20130814 |
|
| RGAV | Abandon patent right to avoid regrant | ||
| DD01 | Delivery of document by public notice |
Addressee: Shanghai Newpower Technology Group Co., Ltd. Document name: Notification to Pay the Fees |
|
| DD01 | Delivery of document by public notice |
Addressee: Zheng Juwu Document name: Notification of Passing Examination on Formalities |