The utility model content
The purpose of this utility model is to overcome the deficiency of above-mentioned prior art, and a kind of testing efficiency height is provided, the test signal input processing device that is used for detonation velocity meter easy to use.
Its technical scheme is: a kind of input shaper device that is used for detonation velocity meter, described input shaper device is connected to form successively by anti-jamming circuit, single-shot trigger circuit and signal integration circuit.
Its technique effect: the utility model adopts disconnected, logical mode to test explosion velocity, during test two input signals in no particular order, thereby reduced error, improved testing efficiency, bring great convenience to use; Simultaneously, all taking interference protection measure aspect hardware design and the software programming, the antijamming capability of complete machine is strong, can obtain accurate test result, meets standard GB/T13228-91 " commercial explosive explosion velocity determination method " technical requirement.
Embodiment
As shown in Figure 1, be used for the input shaper device of detonation velocity meter, described input shaper device is connected to form successively by anti-jamming circuit, single-shot trigger circuit and signal integration circuit.
As shown in Figure 2, anti-jamming circuit is made of input terminal, phase inverter, counter and RC filtering circuit, the input end of two phase inverter U2D, U2C is connected in parallel with connection terminal 3,1 and the RC filtering circuit of input terminal XHSR respectively, and common terminal 2 of input terminal inserts supply voltage VCC; The output terminal of two phase inverters is connected with the input end MR of two counter U3B, U3A respectively, and another input end CLK of counter is connected with clock output circuit respectively.Counter U3B, U3A are two tetrads, and its MR end all is the high level of input before the test, counter output T1=0, T2=0.MR=0 when there is Test input signal on certain road, counter begin counting.Phase inverter U2D, U2C electrify and flat turn the effect of changing and filter the low-voltage undesired signal.SHZ is the 10MHZ clock signal, when the input signal duration less than 0.2 μ s when (actual useful signal duration is worth much larger than this), filtering interference signals effectively, T1, the T2 state is constant.
Single-shot trigger circuit shown in Figure 3 is made of NAND gate circuit and phase inverter, the input end of two NAND gate circuit U5B, U5C is respectively by the first phase inverter U2E, the U2F corresponding connection of output terminal with two counter U3A, U3B, be in series with electric capacity and resistance between the output terminal of two NAND gate circuit and the ground respectively, the contact of the contact of series capacitance C10 and resistance R 14 and series capacitance C11 and resistance R 15, the corresponding respectively input end that inserts the second phase inverter U2B, U2A, the output terminal of second phase inverter another input end of corresponding NAND gate circuit respectively connect.When the output signal T1 of two counter U3A, U3B, T2 were high level by low transition, it was low level by the high level saltus step that the triggering monostable circuit makes XH1, XH2.Signal XH1, XH2 keep the low level time and are then decided by the product of the R14 in the monostable circuit and capacitor C 10, R15 and capacitor C 11.
Signal integration circuit shown in Figure 4 is made of NOR gate circuit and NAND gate circuit, two input ends of the first NOR gate circuit U6C respectively with single-shot trigger circuit in two second phase inverter U2B, the output terminal of U2A connects, the output terminal of first NOR gate circuit is in parallel to be connected with the input end of the second NOR gate circuit U6A and the input end of NAND gate circuit U5D, another input end of NAND gate circuit is connected with the output terminal of clock circuit, its output terminal is connected with the input end of the 3rd NOR gate circuit U6D, another input end of the 3rd NOR gate circuit is connected with supply voltage VCC, and its output terminal is connected with single-chip microcomputer.XH1, the XH2 of single-shot trigger circuit output is integrated into a high level square-wave signal GM through U6 two inputs four XOR gate, and the GM signal enables Sheffer stroke gate U5D, makes the SHZ signal input to U6D, and U6D inputs to the single-chip microcomputer counting to clock signal.
Its course of work: before the test ready two groups of certain at interval distances (range) of open close probe are inserted in the tested explosive cartridge, range can be set as requested.Disconnected-Tong probe connects 1,3 two connection terminal of input terminal XHSR respectively.When proper testing, the MR of two-way counter end all is the high level of input before the test, counter output T1=0, T2=0.When explosive charge, target 1 and target 2 are taken up in order of priority and are connected with common terminal, signal is by after the processing of anti-jamming circuit, single-shot trigger circuit and signal integration circuit, input to the single-chip microcomputer counting, that group of elder generation's conducting is initial timing signal, and that group of back conducting is then for stopping timing signal.