CN201681152U - Electronic type general mutual inductor check meter - Google Patents
Electronic type general mutual inductor check meter Download PDFInfo
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- CN201681152U CN201681152U CN2010201878059U CN201020187805U CN201681152U CN 201681152 U CN201681152 U CN 201681152U CN 2010201878059 U CN2010201878059 U CN 2010201878059U CN 201020187805 U CN201020187805 U CN 201020187805U CN 201681152 U CN201681152 U CN 201681152U
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Abstract
The utility model relates to an electronic type general mutual inductor check meter, which comprises an analogue signal conditioning module, a check circuit module, a high precision data acquiring module, a synchronizing clock module, an FPGA module, a digital signal processing and storing module, a display and keyboard module, a network interface module, and a general standard interface module, wherein the FPGA module comprises an AD control and storage module, a synchronizing control module, a network port control and storage module, and a data control central module. The utility model adopts DSP+FPGA framework, provides a check equipment which not only can check analogue electronic mutual inductor, but also can check digital electronic mutual inductor, and is conveniently portable.
Description
Technical field
The utility model relates to the transducer check technical field in the electric power digitalization, is particularly suitable for relating in the digital transformer substation the general mutual-inductor tester of electronic type that a kind of measuring accuracy to electromagnetic type and electronic type electric power mutual-inductor is carried out verification.
Background technology
Electric power is self-evident to the importance of a country, is to guarantee as the stable operation of the carrier electric system of electric power.Electric power mutual-inductor plays a part electric energy metrical and relay protection in electrical network, this closes great to guaranteeing normally moving to of electrical network.Mutual-inductor tester is the special-purpose exact instrument that is used for testing transformer error, so the development of high precision mutual-inductor tester seems particularly important.
Under the promotion of electric power digitalization and networked tide, be in now when the transition from the old to the new of electromagnetic transformer and electronic mutual inductor.Their output key distinction is aspect following three: 1) the electromagnetic type electric power mutual-inductor can be divided into electromagnetic potential transformer and electromagnetic current transducer again according to the difference of tested object, the effective value of their secondary side output is respectively 57.7V and 1A/5A, though electronic mutual inductor also can be divided into electronic current mutual inductor and electronic type voltage transformer, but the standard value of their output is respectively 1.625V～6.5V and 22.5mV～4V, can find out that thus the difference of output signal of two kinds of mutual inductors is very big.2) electronic mutual inductor can have the digital signal output interface, and traditional electromagnetic type electric power mutual-inductor does not then possess digital interface.Electronic mutual inductor with digital signal output interface is called digital electric minor mutual inductor, and the electronic mutual inductor with analog signal output interface is called analog electronic mutual inductor.Electronic mutual inductor both had been provided with the digital signal output interface analog signal output interface also had been set under a few cases, and which kind of output is visual reality use and respective handling.3) test philosophy of electromagnetic transformer and electronic mutual inductor is different, electromagnetic transformer is based on the electromagnetic induction principle manufacturing, but there are some fatal shortcomings, as bulky heaviness, magnetic saturation, dynamic range is little and insulating Design difficulty etc., electronic mutual inductor is based on the sensing technology and the photoelectron technology in modern times, volume is small and exquisite, and the measuring accuracy height is convenient to the digitizing networking and is sent out dress.Electronic mutual inductor will replace the common recognition that electromagnetic transformer is the world.
As can be known from the above analysis, because the simulation of analog electronic mutual inductor is output as light current and presses signal, huge with the output difference of electromagnetic transformer, and digital electric minor mutual inductor has digital signal output simultaneously, and traditional mutual-inductor tester can't be finished the verification to electronic mutual inductor.Therefore, a kind of calibration equipment of not only can the analog electronic mutual inductor of verification but also can check digit formula electronic mutual inductor of development is very necessary.
The main stream approach of transducer check device employing at present is a direct method, promptly utilizes electronic installation directly to obtain the effective value and the phase place of standard signal and measured signal, and then calculates ratio and angular difference between them.The implementation of this electronic equipment can be divided into two big classes substantially: computer based virtual instrument and based on the portable electric appts of the little process chip of numeral.Though virtual instrument is powerful, with high costs, and be not easy to go out to carry, working environment requires harsh.And adopting the portable calibration equipment of high-performance microprocessor design not only cheap, environmental resistance is strong, and measuring accuracy is becoming the main flow of checking electronic type transformers equipment at all not second to the virtual instrument based on industrial computer.
Though the mutual-inductor tester kind is abundant on the market, technology maturation, but make a general survey of market, the calibration equipment or the phoenix feathers and unicorn horns of compatible analog electronic mutual inductor of energy while and digital electric minor mutual inductor are even also have some idea of in the application of national patent.
The utility model content
The utility model purpose is, overcomes the shortcoming of prior art, provides a kind of electronic type general mutual-inductor tester.
In order to achieve the above object, the utility model provides a kind of electronic type general mutual-inductor tester, comprises analog signal conditioner module, checking circuit module, high-accuracy data acquisition module, synchronous clock module, FPGA module, digital signal processing and memory module, demonstration and Keysheet module, Network Interface Module and general standard interface module; Described FPGA module comprises AD control and memory module, synchronization control module, network interface control and memory module and Data Control Center module;
Signal source simulating signal that output terminal provides is input to the analog signal conditioner module, after analog signal conditioner module conditioning conversion, output to the checking circuit module, this output is after the checking circuit module is carried out the multiplying power conversion, and the gained ac voltage signal outputs to the high-accuracy data acquisition module; This ac voltage signal carries out analog to digital conversion again after the high-accuracy data acquisition inside modules converts differential signal to, AD control and memory module in the gained digital signal input FPGA module;
Digital electric minor voltage transformer (VT) or digital electric minor digital signal that current transformer provides are passed through Network Interface Module, send into network interface control and memory module in the FPGA module;
Set up the connection that transmits control signal between the synchronization control module in synchronous clock module and the FPGA module;
The keyboard of demonstration and Keysheet module partly is connected to the Data Control Center module of FPGA module, and the keyboard value that operating personnel's operation keyboard is partly imported is sent into the Data Control Center module;
In the described FPGA module, the connection of setting up the transmission clock signal between synchronization control module and AD control and the memory module; Data Control Center module and digital signal processing and memory module establish a communications link, communicate to connect by this and to carry out three kinds of information transmission: when the keyboard value that (1) is partly imported when operating personnel's operation keyboard is sent into the Data Control Center module, the Data Control Center module sends interruption to digital signal processing and memory module, and the keyboard value is delivered to digital signal processing and memory module; (2) digital signal processing and memory module output a control signal to the Data Control Center module, through the corresponding output respectively of Data Control Center module, comprise outputing to the analog signal conditioner module, outputing to the checking circuit module, output to the high-accuracy data acquisition module, output to Network Interface Module, and output to the synchronous clock module through synchronization control module through network interface control and memory module through AD control and memory module; (3) data of control of AD control and memory module and network interface and memory module storage output to digital signal processing and memory module through the Data Control Center module;
Digital signal processing and memory module comprise dsp processor, and dsp processor is handled the keyboard value by the Data Control Center module input of FPGA module, and the control signal that is produced is exported to the Data Control Center module; Dsp processor is handled the digital signal by AD control and memory module and network interface control and memory module input, and the final operation result of gained is delivered to the demonstration part in demonstration and the Keysheet module, and outwards exports by the general standard interface module.
And, described analog signal conditioner module comprises standard side voltage signal place in circuit, standard side current signal place in circuit, measured signal interface circuit and conditioning control module, and described signal source output terminal comprises standard electromagnetic potential transformer, standard electromagnetic current transducer, analog electronic type voltage transformer and analog electronic current mutual inductor;
Standard ac voltage signal that electromagnetic potential transformer provides is input to standard side voltage signal place in circuit, is converted to voltage signal SV1 through standard side voltage signal place in circuit;
Standard ac current signal that electromagnetic current transducer provides is input to standard side current signal place in circuit, is converted to voltage signal SI1 through standard side current signal place in circuit;
Analog voltage signal that analog electronic type voltage transformer provides inserts by the measured signal interface circuit, and this analog voltage signal is denoted as voltage signal EV1;
Analog voltage signal that analog electronic current mutual inductor provides inserts by the measured signal interface circuit, and this analog voltage signal is denoted as voltage signal EI1;
Voltage signal SV1, SI1, EV1, EI1 insert the conditioning control module, Data Control Center module in the FPGA module sends control signals to the conditioning control module, the conditioning control module selects one the tunnel as verification standard signal ST1 output according to control signal from voltage signal SV1 and SI1, select one the tunnel as verification measured signal SE1 output from voltage signal EV1 and EI1.
And described checking circuit module comprises verification holding circuit, analogue filter circuit, automatic multiplying power commutation circuit and verification control module,
Verification is input to verification holding circuit and analogue filter circuit with standard signal ST1 and verification simultaneously with measured signal SE1, and verification is exported behind analogue filter circuit with standard signal ST1, is designated as standard signal ST2; Verification is exported after the multiplying power commutation circuit is amplified adjustment automatically with the output of measured signal SE1 through analogue filter circuit again, is designated as measured signal SE2; Standard signal ST2 and measured signal SE2 send into the high-accuracy data acquisition module,
Data Control Center module in the FPGA module sends control signals to the verification control module; through the verification control module verification is passed through control verification holding circuit ground connection with standard signal ST1 and verification with measured signal SE1, through the enlargement ratio of the automatic multiplying power commutation circuit of verification control module adjustment.
And described high-accuracy data acquisition module comprises the same circuit of two covers, is respectively applied for the conversion of verification being used measured signal SE1 with standard signal ST1 and verification; Every cover circuit comprises signal conditioning circuit and A/D convertor circuit,
Standard signal ST2 after signal conditioning circuit is converted to a pair of differential signal, sends into A/D convertor circuit and converts digital signal in corresponding circuit kit,
Measured signal SE2 after signal conditioning circuit is converted to a pair of differential signal, sends into A/D convertor circuit and converts digital signal in corresponding circuit kit,
AD control in the FPGA module and memory module send control signals to the A/D convertor circuit in the two cover circuit, and A/D convertor circuit gained digital signal is connected to AD control and memory module.
And the clock signal that transmits between the synchronization control module in described synchronous clock module and the FPGA module comprises electrical clock signal and optical clock signal; Described synchronous clock module comprises a magnetic coupling isolated location and two opto-electronic conversion IC;
The electrical clock signal of peripherals output is sent into synchronization control module through magnetic coupling isolated location, and the electrical clock signal that synchronization control module is sent passes out to the periphery through magnetic coupling isolated location;
The optical clock signal of peripherals output converts electric signal to through a slice opto-electronic conversion IC, sends into synchronization control module through magnetic coupling isolated location then; The electrical clock signal that synchronization control module is sent is sent into another sheet opto-electronic conversion IC and is converted optical clock signal to and pass out to the periphery behind magnetic coupling isolated location.
And demonstration and Keysheet module adopt the LED display and the 4*4 matrix keyboard of 320*240 matrix.
And, Network Interface Module is integrated optical Ethernet port and electric ethernet port.
And the general standard interface module comprises serial ports and USB interface.
The utility model is being followed the directly thought of design on the basis of serious analysis test signal attribute, on hardware design, adopt the framework of DSP+FPGA, rely on the powerful digital processing ability of DSP special chip and the outstanding logic control ability of fpga chip, the outstanding design object of having finished: accuracy class is the 0.2s level when the verification object is electronic current mutual inductor, and precision is 0.2 grade when the verification electronic type voltage transformer.With compare with quasi-instrument, the utlity model has following advantage:
1. when adopting dsp chip as digital signal processor, available Processing Algorithm has bigger dirigibility on the basis that fully guarantees the test real-time, and the checking precision of this and tester is closely bound up; Adopting FPGA is all to seem masterly to the control of mimic channel or with the compatibility of various communication interfaces as the sequential logic controller, and follow-up scalable space is bigger.
2. design of the present utility model is on the basis that is based upon fully the output signal of main flow mutual inductor instantly, verification to different mutual inductors has versatility, than calibration equipment based on virtual instrument technique, do not need various utility appliance such as current-to-voltage converter, reduced the cost input, and operation is more convenient.
3. the utility model has been concentrated luminiferous ether network interface, electric Ethernet interface, USB interface, serial communication interface and light pulse per second (PPS) interface, can communicate by letter with peripheral digital devices quickly and easily, complies with the trend of electric power digitalization and networking.
4. the utility model adopts light-emitting diode display and keyboard as instrument and people's mutual media, can tackle different classes of mutual inductor on the one hand, strengthens the intelligent of instrument; When supporting to show measurement result on the other hand digital quantity and analog quantity dual mode are arranged, enriched the information that shows;
5. the utility model can be provided with the sampling rate in pulse per second (PPS) attribute and the analog signal digital process neatly, with various electronic mutual inductor compatibility in can increase the interference of white noise that sample frequency effectively reduces the output digital quantity neatly.
6. the utility model circuit design concentration degree height can utilize the assembly easily of available circuit chip, and finished-product volume is little, and is portable high.
Description of drawings
Fig. 1 is the general structure synoptic diagram of the utility model embodiment;
Fig. 2 is the analog signal conditioner modular structure synoptic diagram of the utility model embodiment;
Fig. 3 is the checking circuit modular structure synoptic diagram of the utility model embodiment;
Fig. 4 is the high-accuracy data acquisition modular structure synoptic diagram of the utility model embodiment;
Fig. 5 is the synchronous clock modular structure synoptic diagram of the utility model embodiment;
Fig. 6 is the FPGA modular structure synoptic diagram of the utility model embodiment;
Fig. 7 is demonstration and the Keysheet module structural representation of the utility model embodiment;
Fig. 8 is the dsp processor workflow diagram of the utility model embodiment.
Embodiment
Design philosophy of the present utility model is: different according to the output form of traditional electromagnetic type electric power mutual-inductor and electronic type electric power mutual-inductor, and checking precision must reach 0.2 grade design object when checking precision must reach 0.2S level and verification electronic type voltage transformer during in conjunction with the verification electronic current mutual inductor, and electromagnetic potential transformer, electromagnetic current transducer, analog electronic mutual inductor, the classification of digital electric minor mutual inductor are handled.At first, with the effective value of electromagnetic potential transformer output is that the ac voltage signal of 57.7V is converted to the signal that effective value is 4V, with the effective value of electromagnetic current transducer output is that the ac current signal of 5A/1A is converted to the ac voltage signal that effective value is 4V, utilizes selector switch therefrom to select one tunnel standard signal as the test circuit unit then; Secondly, the simulating signal of analog electronic current mutual inductor and the simulating signal of analog electronic type voltage transformer are inserted the measured signal of the utility model as the test circuit unit, be converted to digital signal synchronously with standard signal; Once more, the digital signal of digital electric minor mutual inductor is input to system of the present utility model from network interface, and standard signal is converted to digital signal by the utility model, thereby finishes the digitizing of test signal and utilize Digital Signal Processing to obtain test result.
Referring to accompanying drawing, the utility model is described in further detail below with reference to embodiment.
Figure 1 shows that general structure synoptic diagram of the present utility model.Core of the present utility model is to be made of digital signal processor (dsp processor) and on-site programmable gate array FPGA.DSP finish the calculation process of digital signal and storage, operation result real-time demonstration, USB mouth and serial ports control and with the communication function of FPGA.FPGA then is responsible for receiving from Ethernet and the storage digital signal, control criterion signal and Analog signals'digitalization to be measured and storage, other partly adjust control to systems such as analog signal conditioner module, checking circuit modules to obtain control information from DSP, receive the keyboard value and send the keyboard interrupt function to DSP.The utility model mainly comprises analog signal conditioner module, checking circuit module, high-accuracy data acquisition module, synchronous clock module, FPGA module, digital signal processing and memory module, demonstration and Keysheet module, Network Interface Module and general standard interface module.
For the simulating signal of electromagnetic potential transformer, electromagnetic current transducer, analog electronic current mutual inductor, the output of analog electronic type voltage transformer is handled, the utility model is connected analog signal conditioner module, checking circuit module, high-accuracy data acquisition module and AD control and memory module earlier successively.Signal source simulating signal that output terminal provides is input to the analog signal conditioner module, outputs to the checking circuit module after analog signal conditioner module conditioning conversion; The simulating signal of self simulation signal condition module input is after the checking circuit module is carried out the multiplying power conversion, and the gained ac voltage signal outputs to the high-accuracy data acquisition module; The ac voltage signal of self checking circuit module input is handled in the high-accuracy data acquisition inside modules, comprises carrying out analog to digital conversion, AD control and memory module in the gained digital signal input FPGA module after converting differential signal to.
For the digital signal with digital electric minor mutual inductor is input to the utility model from network interface, digital electric minor voltage transformer (VT) or digital electric minor digital signal that current transformer provides are passed through Network Interface Module, send into network interface control and memory module in the FPGA module.During concrete enforcement, what Network Interface Module received is a packet according to the form of stipulating in the IEC 61850-9-2 agreement, and from then on the FPGA module takes out corresponding data in the packet according to different digital verification objects.
During concrete enforcement, can be by the source of operating personnel's operation keyboard choice criteria signal and measured signal: choice criteria signal source be the ac voltage signal of 57.7V for the effective value of electromagnetic potential transformer output, and the source of measured signal is optional: the simulation of 1 analog electronic type voltage transformer is exported; The numeral output of 2 digital electric minor (voltage/current) mutual inductors.Perhaps choice criteria signal source is the ac current signal of 5A/1A for the effective value of electromagnetic current transducer output, and the source of measured signal can be selected: the simulation output of 1 analog electronic current mutual inductor; The numeral output of 2 digital electric minor (voltage/current) mutual inductors.This part can be by showing and Keysheet module cooperation realization.Of the present utility model being designed to, keyboard in demonstration and the Keysheet module partly is connected to the Data Control Center module of FPGA module, the keyboard value that operating personnel's operation keyboard is partly imported is sent into the Data Control Center module, the Data Control Center module sends interruption to digital signal processing and memory module, and the keyboard value is delivered to digital signal processing and memory module.And the demonstration in demonstration and the Keysheet module partly is connected to digital signal processing and memory module, and digital signal processing and the final operation result of memory module gained are delivered to and shown partly.When operating personnel by the input keyboard value, when requiring measured signal to adopt digital electric minor voltage transformer (VT) or digital electric minor current transformer that digital signal is provided, digital electric minor voltage transformer (VT) or digital electric minor digital signal that current transformer provides are passed through Network Interface Module, send into network interface control and memory module in the FPGA module, embodiment is designated as DA with this digital signal.
In order to guarantee that sampling work carries out smoothly, utility model is provided with the synchronous clock module, and sets up the connection that transmits control signal between the synchronization control module in synchronous clock module and FPGA module; And in the FPGA module, the connection of between synchronization control module and AD control and memory module, setting up the transmission clock signal.
Core in the FPGA module is the Data Control Center module, Data Control Center module and digital signal processing and memory module establish a communications link, communicate to connect by this and to carry out three kinds of information transmission: when the keyboard value that (1) is partly imported when operating personnel's operation keyboard is sent into the Data Control Center module, the Data Control Center module sends interruption to digital signal processing and memory module, and the keyboard value is delivered to digital signal processing and memory module; (2) digital signal processing and memory module output a control signal to the Data Control Center module, through the corresponding output respectively of Data Control Center module, comprise outputing to the analog signal conditioner module, outputing to the checking circuit module, output to the high-accuracy data acquisition module, output to Network Interface Module, and output to the synchronous clock module through synchronization control module through network interface control and memory module through AD control and memory module; (3) control of AD control and memory module and network interface and memory module stored data signal output to digital signal processing and memory module through the Data Control Center module.That is to say that the Data Control Center module is as the control information dispatching centre, all set up with analog signal conditioner module, checking circuit module, synchronization control module, AD control and memory module and network interface control and memory module and communicate to connect.
Digital signal processing and memory module comprise dsp processor, and dsp processor is handled the keyboard value by the Data Control Center module input of FPGA module, and the control signal that is produced is exported to the Data Control Center module; Dsp processor is handled the digital signal by AD control and memory module and network interface control and memory module input, and the final operation result of gained is delivered to the demonstration part in demonstration and the Keysheet module, and outwards exports by the general standard interface module.During concrete enforcement,, generally also the storer that is connected to dsp processor can be set, for example FLASH and SDRAM for computing and the event memory of supporting dsp processor.The mode of dsp processor processing digital signal is among the embodiment, carries out adopting after the FIR filtering fft algorithm to obtain the amplitude and the phase information of signal to digital signal, obtains the ratio and the angular difference of standard signal and measured signal thus, and final operation result is preserved.The general standard interface module of embodiment comprises serial ports and USB interface, can be connected with personal computer by standard serial port, can the configuration-system parameter also show measurement result in real time on PC; Test result can be input to the USB memory device by USB interface.
The analog signal conditioner module is carried out suitable conditioning conversion to the voltage/current signals of analog quantity, and provides impedance matching function to completely cut off signal source output terminal and checking circuit module of the present utility model, the stability in enhancing signal source.Referring to Fig. 2, the analog signal conditioner module of embodiment is handled 4 kinds of inputs.Wherein, the output of standard electromagnetic potential transformer is that effective value is the analog voltage signal (ac voltage signal) of 57.7V, and it is the voltage signal SV1 of 4V that its standard side voltage signal place in circuit cell translation that inputs to the analog signal conditioner module is become amplitude; The output of standard electromagnetic current transducer is that effective value is the analog current signal (ac current signal) of 5A/1A, it is inputed to standard side current signal place in circuit, and effect becomes the voltage signal SI1 that amplitude is 4V through standard side current signal place in circuit cell translation; The simulation of analog electronic type voltage transformer is output as the voltage signal of 1.625V～6.5V, the simulation of analog electronic current mutual inductor is output as the voltage signal of 22.5mV～4V, it is inserted the measured signal interface circuit do not do conditioning, be denoted as EV1 and EI1.Dsp processor partly receives the verification configuration information that operating personnel are provided with by the keyboard of demonstration and Keysheet module, send concrete instruction to the FPGA module, the Data Control Center module of FPGA module selects one the tunnel as verification standard signal ST1 again to conditioning control module sending controling instruction from SV1 and SI1; When not adopting DA to originate, from EV1 and EI1, select one the tunnel as verification measured signal SE1 as measured signal.
Embodiment selects the conversion output amplitude of 4v as electromagnetic potential transformer and electromagnetic current transducer, be to consider that the precision of AD conversion under the situation of amplitude 4V is pretty good, and the AD conversion range is 0～5V.Even signal can reach 120% of nominal value, 4*120%=4.8 is also still less than 5V.And unified amplitude helps simplifying the computing of dsp processor.
Adopt the checking circuit module, the multiplying power conversion that can suit to the analog signals of input is to improve last measuring accuracy.As shown in Figure 3, standard signal ST1 and measured signal SE1 are input to verification holding circuit and analogue filter circuit simultaneously.Verification is exported behind analogue filter circuit with standard signal ST1, is designated as standard signal ST2; Verification is exported after the multiplying power commutation circuit is amplified adjustment automatically with the output of measured signal SE1 through analogue filter circuit again, is designated as measured signal SE2; Standard signal ST2 and measured signal SE2 send into the high-accuracy data acquisition module.If the variation range of signal is too big, measurement result is with regard to less stable when signal value is too little.Therefore to set the initial value of automatic multiplying power commutation circuit be its minimum enlargement ratio 0.4 to embodiment.Can be converted to digital signal after standard signal ST1 and SE1 process checking circuit module and the high-accuracy data acquisition module, if DSP digital signal in view of the above judges that measured signal SE1 has exceeded the verification range, then immediately to FPGA module send state information, by the Data Control Center module controls verification control module in the FPGA module, with standard signal ST1 and measured signal SE1 by verification holding circuit ground connection; When influencing measuring accuracy if the amplitude of DSP differentiation measured signal SE1 is less, then immediately to FPGA module send state information, impel the Data Control Center module controls verification control module in the FPGA module, rationally adjust the enlargement ratio of automatic multiplying power commutation circuit by the verification control module.Among the embodiment, by the character and the checking precision of input signal, set in the automatic multiplying power commutation circuit, the enlargement ratio of measured signal SE1 then has four gears such as 0.4,1,6,36.
Embodiment is provided with the high-accuracy data acquisition module, so that convert the ac voltage signal of checking circuit module output to differential signal to reduce the interference of common-mode noise, improves the measuring accuracy of system, converts digital signal then to.The high-accuracy data acquisition module comprises identical signal conditioning circuit and the A/D convertor circuit of two covers as shown in Figure 4.ST2 and SE2 by the output of checking circuit module are single-ended voltage signal, represent measured signal and standard signal respectively.They at first are input to inner signal conditioning circuit and convert two pairs of differential signals to, and these two pairs of differential signals are input to A/D convertor circuit and convert digital signal to.Differential signal can significantly suppress the common-mode noise of signal inside, to improve system accuracy.During concrete enforcement, A/D convertor circuit can adopt AD chip (as AD767818 position bit wide).A/D convertor circuit is connected with the AD control and the concrete of memory module of FPGA inside, but the reference chip explanation.The transformation result of AD chip then outputs to AD control and memory module, is stored so that the dsp processor computing is used by AD control and memory module.
Synchronous clock has important effect in the AD sampling process, embodiment provides the I/O of synchronous clock to enable by the synchronous clock module, and takes necessary magnetic coupling to isolate to guarantee measured signal and the standard signal time synchronized in sampling process.As shown in Figure 5, the synchronous clock module is the interface of peripherals and work synchronous clock of the present utility model, wherein Chuan Shu synchronous clock has four kinds of patterns, they all eliminate noise in the transmission course to improve the stability of system through magnetic coupling isolated location: the electrical clock signal of peripherals output is sent into synchronization control module through magnetic coupling isolated location, and the electrical clock signal that synchronization control module is sent passes out to the periphery through magnetic coupling isolated location; The optical clock signal of peripherals output converts electric signal to through a slice opto-electronic conversion IC, sends into synchronization control module through magnetic coupling isolated location then; The electrical clock signal that synchronization control module is sent is sent into another sheet opto-electronic conversion IC and is converted optical clock signal to and pass out to the periphery behind magnetic coupling isolated location.Under synchronous clock module and synchronization control module support, AD control and memory module control A/D convertor circuit are worked under electric synchronous clock, realize synchronized sampling.
During concrete enforcement, can select the attribute of synchronous clock by keyboard by operating personnel:
I/O light/electric rising edge/negative edge
Dsp processor handle and operating personnel's selection control corresponding word send to the Data Control Center module of FPGA inside, and the Data Control Center module is sent out control word again to synchronization control module.Decision is the outside pulse per second (PPS) of reception or oneself generation pulse per second (PPS) and sends synchronization control module according to control word, thus control synchronous clock module working method.
The EP2C20 product of the Cyclone II series of the ALTERA company that the FPGA module of embodiment is selected for use is provided with field programmable gate array according to functional requirement and gets final product.Referring to Fig. 6:
AD control and memory module: the instruction that synchronizing clock signals that the reception synchronization control module is sent and Data Control Center module send, control enabling of high-accuracy data acquisition inside modules two cover circuit according to rule then, the AD transformation result is deposited into the scheduling of this inside modules for the Data Control Center module.
Synchronization control module: control synchronous clock module receptions/output light or electric synchronous clock, and in FPGA inside this synchronous clock is transferred to AD and controls and memory module.
The Network Interface Module of network interface control and memory module: embodiment is integrated optical Ethernet port and electric ethernet port.Therefore the Network Interface Module data that are sent to this module are divided into two classes, luminiferous ether network data and electric Ethernet data.The instruction that this module sends according to the Data Control Center module decides the choice to these two classes data.
The Data Control Center module: inner other the module of this module integrated FPGA is the bridge that inner other modules of FPGA and DSP carry out data interaction.This functions of modules is as follows: 1, keyboard scan value and the keyboard value passed to dsp processor is the important component part of man-machine interaction; 2, dsp processor is understood operating personnel's intention and corresponding instruction is sent to this module according to the keyboard value, and then this module is finished control to inner other modules of analog signal conditioner module, checking circuit module and FPGA according to this instruction.3, control of AD control and memory module and network interface and memory module stored data signal output to digital signal processing and memory module through this module.
Demonstration and Keysheet module show test results in real time and the man-machine interactive control function are provided, and show and Keysheet module connected mode such as Fig. 7 in the utility model: the demonstration of embodiment and Keysheet module comprise the LED display of a matrix keyboard and the 320*240 of a 4*4.Wherein the 4*4 matrix keyboard is connected with the FPGA module, during each button, the keyboard value can at first be sent to the Data Control Center module of FPGA inside, pass to dsp processor in the mode of interrupting then, dsp processor is carried out corresponding program according to key assignments and test result is presented on the LED display in real time.Show and Keysheet module as the man-machine interaction media, rich functions is arranged: with digital form show measurement result, with wave form shows signal attribute, the attribute of synchronous clock is set, the utility model self is configured etc.
For the sake of ease of implementation, the utility model provides the core process of dsp processor, as shown in Figure 8:
1. system initialization generally need correctly dispose the inner numerous control register of dsp processor according to hardware circuit, simultaneously will be by the duty of FPGA module settings system peripherals circuit.
2. whether inquiry has keyboard interrupt, if having, then carries out corresponding service routine according to key assignments; If do not have, then skip the keyboard interrupt routine and enter the data query interruption.
3. among the embodiment, be responsible for receiving and preserve standard signal and measured signal after the digitizing by the FPGA module.Among the embodiment with 2048 sample points of the sampling rate of 4000Hz sampling.After finishing, data acquisition sends data interruption to dsp processor by the FPGA module.Therefore, dsp processor interrupts having judged whether data interruption by circulation inquiry constantly.If data interruption is arranged, then program skips to next step---fetch data; If there is not data interruption, then jumps to inquiry keyboard and interrupt.
4.DSP processor obtains two piece of data from the FPGA module, the corresponding standard signal source of a piece of data, the corresponding measured signal of another part source.
5. carry out the data computation step.Embodiment at first adopts the FIR filtering algorithm to reduce white noise in the signal in this step, next adopts 1024 fft algorithms to calculate the effective value and the phase information of signal, calculates in view of the above as the electronic mutual inductor in source to be measured with as the difference of the electromagnetic transformer of standard source.
6. test result is exported in real time, update displayed is on LED display, and display result is upgraded 1 time p.s..Protection domain of the present utility model is not limited to above embodiment.
Claims (8)
1. the general mutual-inductor tester of electronic type is characterized in that: comprise analog signal conditioner module, checking circuit module, high-accuracy data acquisition module, synchronous clock module, FPGA module, digital signal processing and memory module, demonstration and Keysheet module, Network Interface Module and general standard interface module; Described FPGA module comprises AD control and memory module, synchronization control module, network interface control and memory module and Data Control Center module;
Signal source simulating signal that output terminal provides is input to the analog signal conditioner module, after analog signal conditioner module conditioning conversion, output to the checking circuit module, this output is after the checking circuit module is carried out the multiplying power conversion, and the gained ac voltage signal outputs to the high-accuracy data acquisition module; This ac voltage signal carries out analog to digital conversion again after the high-accuracy data acquisition inside modules converts differential signal to, AD control and memory module in the gained digital signal input FPGA module;
Digital electric minor voltage transformer (VT) or digital electric minor digital signal that current transformer provides are passed through Network Interface Module, send into network interface control and memory module in the FPGA module;
Set up the connection that transmits control signal between the synchronization control module in synchronous clock module and the FPGA module;
The keyboard of demonstration and Keysheet module partly is connected to the Data Control Center module of FPGA module, and the keyboard value that operating personnel's operation keyboard is partly imported is sent into the Data Control Center module;
In the described FPGA module, the connection of setting up the transmission clock signal between synchronization control module and AD control and the memory module; Data Control Center module and digital signal processing and memory module establish a communications link, communicate to connect by this and to carry out three kinds of information transmission: when the keyboard value that (1) is partly imported when operating personnel's operation keyboard is sent into the Data Control Center module, the Data Control Center module sends interruption to digital signal processing and memory module, and the keyboard value is delivered to digital signal processing and memory module; (2) digital signal processing and memory module output a control signal to the Data Control Center module, through the corresponding output respectively of Data Control Center module, comprise outputing to the analog signal conditioner module, outputing to the checking circuit module, output to the high-accuracy data acquisition module, output to Network Interface Module, and output to the synchronous clock module through synchronization control module through network interface control and memory module through AD control and memory module; (3) data of control of AD control and memory module and network interface and memory module storage output to digital signal processing and memory module through the Data Control Center module;
Digital signal processing and memory module comprise dsp processor, and dsp processor is handled the keyboard value by the Data Control Center module input of FPGA module, and the control signal that is produced is exported to the Data Control Center module; Dsp processor is handled the digital signal by AD control and memory module and network interface control and memory module input, and the final operation result of gained is delivered to the demonstration part in demonstration and the Keysheet module, and outwards exports by the general standard interface module.
2. general watt of sensor tester of electronic type according to claim 1, it is characterized in that: described analog signal conditioner module comprises standard side voltage signal place in circuit, standard side current signal place in circuit, measured signal interface circuit and conditioning control module, and described signal source output terminal comprises standard electromagnetic potential transformer, standard electromagnetic current transducer, analog electronic type voltage transformer and analog electronic current mutual inductor;
Standard ac voltage signal that electromagnetic potential transformer provides is input to standard side voltage signal place in circuit, is converted to voltage signal SV1 through standard side voltage signal place in circuit;
Standard ac current signal that electromagnetic current transducer provides is input to standard side current signal place in circuit, is converted to voltage signal SI1 through standard side current signal place in circuit;
Analog voltage signal that analog electronic type voltage transformer provides inserts by the measured signal interface circuit, and this analog voltage signal is denoted as voltage signal EV1;
Analog voltage signal that analog electronic current mutual inductor provides inserts by the measured signal interface circuit, and this analog voltage signal is denoted as voltage signal EI1;
Voltage signal SV1, SI1, EV1, EI1 insert the conditioning control module, Data Control Center module in the FPGA module sends control signals to the conditioning control module, the conditioning control module selects one the tunnel as verification standard signal ST1 output according to control signal from voltage signal SV1 and SI1, select one the tunnel as verification measured signal SE1 output from voltage signal EV1 and EI1.
3. the general mutual-inductor tester of electronic type according to claim 2 is characterized in that: described checking circuit module comprises verification holding circuit, analogue filter circuit, automatic multiplying power commutation circuit and verification control module,
Verification is input to verification holding circuit and analogue filter circuit with standard signal ST1 and verification simultaneously with measured signal SE1, and verification is exported behind analogue filter circuit with standard signal ST1, is designated as standard signal ST2; Verification is exported after the multiplying power commutation circuit is amplified adjustment automatically with the output of measured signal SE1 through analogue filter circuit again, is designated as measured signal SE2; Standard signal ST2 and measured signal SE2 send into the high-accuracy data acquisition module,
Data Control Center module in the FPGA module sends control signals to the verification control module; through the verification control module verification is passed through control verification holding circuit ground connection with standard signal ST1 and verification with measured signal SE1, through the enlargement ratio of the automatic multiplying power commutation circuit of verification control module adjustment.
4. the general mutual-inductor tester of electronic type according to claim 3 is characterized in that: described high-accuracy data acquisition module comprises the same circuit of two covers, is respectively applied for the conversion of verification being used measured signal SE1 with standard signal ST1 and verification; Every cover circuit comprises signal conditioning circuit and A/D convertor circuit,
Standard signal ST2 after signal conditioning circuit is converted to a pair of differential signal, sends into A/D convertor circuit and converts digital signal in corresponding circuit kit,
Measured signal SE2 after signal conditioning circuit is converted to a pair of differential signal, sends into A/D convertor circuit and converts digital signal in corresponding circuit kit,
AD control in the FPGA module and memory module send control signals to the A/D convertor circuit in the two cover circuit, and A/D convertor circuit gained digital signal is connected to AD control and memory module.
5. according to claim 1 or 2 or the 3 or 4 general mutual-inductor testers of described electronic type, it is characterized in that: the clock signal that transmits between the synchronization control module in described synchronous clock module and the FPGA module comprises electrical clock signal and optical clock signal; Described synchronous clock module comprises a magnetic coupling isolated location and two opto-electronic conversion IC;
The electrical clock signal of peripherals output is sent into synchronization control module through magnetic coupling isolated location, and the electrical clock signal that synchronization control module is sent passes out to the periphery through magnetic coupling isolated location;
The optical clock signal of peripherals output converts electric signal to through a slice opto-electronic conversion IC, sends into synchronization control module through magnetic coupling isolated location then; The electrical clock signal that synchronization control module is sent is sent into another sheet opto-electronic conversion IC and is converted optical clock signal to and pass out to the periphery behind magnetic coupling isolated location.
6. according to claim 1 or 2 or the 3 or 4 general mutual-inductor testers of described electronic type, it is characterized in that: demonstration and Keysheet module adopt the LED display and the 4*4 matrix keyboard of 320*240 matrix.
7. according to claim 1 or 2 or the 3 or 4 general mutual-inductor testers of described electronic type, it is characterized in that: Network Interface Module is integrated optical Ethernet port and electric ethernet port.
8. according to claim 1 or 2 or the 3 or 4 general mutual-inductor testers of described electronic type, it is characterized in that: the general standard interface module comprises serial ports and USB interface.
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| CN2010201878059U CN201681152U (en) | 2010-05-05 | 2010-05-05 | Electronic type general mutual inductor check meter |
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