CN201673902U - Ball grid array integrated circuit packaging block for resisting transient electric over stress - Google Patents

Ball grid array integrated circuit packaging block for resisting transient electric over stress Download PDF

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Publication number
CN201673902U
CN201673902U CN2010202140954U CN201020214095U CN201673902U CN 201673902 U CN201673902 U CN 201673902U CN 2010202140954 U CN2010202140954 U CN 2010202140954U CN 201020214095 U CN201020214095 U CN 201020214095U CN 201673902 U CN201673902 U CN 201673902U
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China
Prior art keywords
integrated circuit
moment
parts
electrical overloads
conductive layer
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Expired - Fee Related
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CN2010202140954U
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Chinese (zh)
Inventor
曾昭华
雷华敏
蔡峰
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WUHAN POLYMART NEW MATERIAL TECHNOLOGY Co Ltd
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WUHAN POLYMART NEW MATERIAL TECHNOLOGY Co Ltd
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Publication of CN201673902U publication Critical patent/CN201673902U/en
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Abstract

The utility model relates to the field of the packaging of integrated circuits and provides a ball grid array integrated circuit packaging block for resisting transient electric over stress, comprising an integrated circuit chip, a lead substrate, a lead welding pad and welding balls, wherein a component for resisting the transient electric over stress is arranged at the bottom of the lead substrate, and the welding balls are connected with the component for resisting the transient electric over stress and lead welding pad respectively. The utility model has the advantages of simple structure and convenient use and can be used for protecting the integrated circuit chip from the damage of the transient electric over stress (EOS), especially suppressing the damage of the electrostatic discharge.

Description

Anti-moment electrical overloads the spherical grid array integrated circuit package blocks
Technical field
The utility model relates to the integrated circuit encapsulation field, specifically a kind of anti-moment electrical overloads the spherical grid array integrated circuit package blocks, especially a kind of spherical grid array integrated circuit package blocks that can suppress damage of electrostatic discharge.
Background technology
Along with the arrival of information age, the general trend of electronic product is miniaturization, high frequencyization.Circuit designers has adopted compound very lagre scale integrated circuit (VLSIC) (VLSI) and new IC technology.Yet, use these technology to make the easier trick of electronic equipment be subjected to the damage of moment electrical overloads (EOS), as Electrostatic Discharge, electric fast transition and lightning induction etc.Above-mentioned these to electronic component, particularly high density integrated package electronic component has great threat.Because moment, the electrical overloads phenomenon can cause localized heat to produce, high current density, high electric field strength, so that can cause integrated circuit block to lose efficacy is burnt as semiconductor element, perhaps causes electronic jamming, as loses transmission and the data that store etc.Wherein, Electrostatic Discharge to be electronic product in assembling, use a kind of modal moment electrical overloads phenomenon.ESD is a kind of quick, low-yield, the form of energy that peak value piezoelectricity is high.To electronic component, particularly high density integrated package electronic component has great threat.Portable type electronic product is subjected to the damage of the ESD of human body contact generation especially easily.Electrostatic hazard has caused quite serious consequence and loss.It once caused the annual direct economic loss of global electronic industry to reach the over ten billion dollar.And potential loss, as in aerospace industry, static discharge causes rocket and satellites transmits failure, disturbs the operation of aerospace craft, and electronic equipment is malfunctioning etc. on the battlefield, and its loss is then beyond measure.
Spherical grid array integrated circuit (BGA) encapsulation is a kind of common integrated circuit encapsulation technology, has good electric, heat dissipating, and the characteristic that can effectively dwindle the packaging body area.In electronic product, be mainly used in the product of the above high density structure of 300 pin counts dress, as chipset, CPU, Flash, partly communication is with IC etc.
Current, integrated circuit industry to moment electrical overloads (EOS), especially Electrostatic Discharge the protection aspect still be faced with great challenge.The main performance in the following areas:
Esd protection ability on the integrated circuit (IC) chip only has 2KV at present, mainly is to be used for protection component to exempt from the ESD attack in assembling process.And in the use of electronic equipment, moment electrical overloads voltage can be far above 2kV, can surpass 14KV as the ESD voltage that produces by human body.Therefore, it is in urgent need to be improved to have anti-moment electrical overloads ability of integrated circuit (IC) chip.
In the current electronic product, use discrete esd protection element (as TVS, MOV, Zener diode, EDS inhibitor etc.) to be installed on the circuit board (PCB) and to protect integrated circuit (IC) chip mostly.Discrete esd protection element need take the area of a large amount of PCB, incompatible current miniaturization of electronic products development trend.Therefore, adding moment electrical overloads defencive function becomes the desirable approach of dealing with problems in the integrated circuit (IC) chip encapsulated circuit.
Summary of the invention
The purpose of this utility model is exactly in order to overcome above-mentioned the deficiencies in the prior art part; and provide the spherical grid array integrated circuit package blocks of a kind of anti-moment electrical overloads; it is simple in structure; easy to use; can be used for protecting integrated circuit (IC) chip to avoid the destruction of moment electrical overloads (EOS), especially can suppress the infringement of static discharge.
The technical scheme that its technical problem that solves the utility model adopts is: anti-moment electrical overloads the spherical grid array integrated circuit package blocks, comprise integrated circuit (IC) chip, lead-in wire substrate, lead pad and soldered ball, it is provided with anti-moment electrical overloads parts at the lead-in wire base plate bottom, described soldered ball respectively with anti-moment the electrical overloads parts be connected with lead pad.
In technique scheme, described anti-moment the electrical overloads parts form by adhesive linkage, conductive layer and insulating barrier; This, electrical overloads parts were provided with and the corresponding array through-hole of lead pad anti-moment; Be provided with the voltage sensitivity parts in the described conductive layer in the electric conducting material of connecting through hole and the conductive layer between the electric conducting material of remainder, these voltage sensitivity parts are connected the electric conducting material of connecting through hole with the electric conducting material of remainder in the conductive layer; The electric conducting material of connecting through hole links to each other with soldered ball on the conductive layer, and the electric conducting material of remainder links to each other with ground wire on the conductive layer.
In technique scheme, described anti-moment the adhesive linkage of electrical overloads parts bonding with the lead-in wire base plate bottom, conductive layer is located between adhesive linkage and the insulating barrier.
In technique scheme, described voltage sensitivity parts have non-linear conductive characteristic, and promptly in low-voltage state, resistivity is very high, is insulator; When transient voltage reached the high voltage standard value, the resistivity of voltage sensitivity parts reduced, and is electric conductor, and after transient voltage disappeared, the voltage sensitivity parts became insulator again.
The utility model is under the normal condition of no moment electrical overloads, and the voltage sensitivity parts are insulator, and electric current leads to the chip circuit of integrated circuit through the lead pad on soldered ball and the lead-in wire substrate.When the integrated circuit package blocks is subjected to that moment, electrical overloads was impacted, as ESD, the voltage sensitivity parts can become electric conductor, by moment the heavy current that produced of electrical overloads flow through the electric conducting material ground connection of voltage sensitivity parts remainder on conductor layer, make the moment high-energy that produced of electrical overloads obtain discharging, alleviate chip circuit is impacted by ground connection.Thereby protected integrated circuit (IC) chip in the spherical grid array integrated circuit package blocks to avoid the damage of moment electrical overloads.Behind high voltage pulse, the voltage sensitivity parts become insulator again.Therefore can repeatedly protect integrated circuit (IC) chip.
The beneficial effects of the utility model are; not only make the integrated circuit package blocks anti-moment electrical overloads ability improve greatly; reducing the integrated circuit package blocks is installing; storage; moment electrical overloads damage in transportation and the use; also can reduce the user demand of discrete protection component, thereby save the plate face area occupied of PCB, for the miniaturization of electronic device provides chance.Simultaneously, owing to simplified the mounting process of electronic product, the manufacturing cost that helps saving electronic product improves productivity effect.
Description of drawings
The structural representation of the spherical grid array integrated circuit package blocks of Fig. 1 the utility model electrical overloads of anti-moment.
In Fig. 2 the utility model anti-moment the electrical overloads parts side sectional structure schematic diagram.
Soldered ball and lead-in wire substrate and anti-moment broken section structural representation of being connected of electrical overloads parts in the spherical grid array integrated circuit package blocks of Fig. 3 electrical overloads of anti-moment.
Electrical overloads protective circuit schematic diagram in the spherical grid array integrated circuit package blocks of Fig. 4 electrical overloads of anti-moment.
Anti-moment electrical overloads parts conductive layer application example 1 structural representation in Fig. 5 the utility model.
Anti-moment electrical overloads parts conductive layer application example 2 structural representations in Fig. 6 the utility model.
Embodiment
The utility model will be further described below in conjunction with drawings and Examples.
As shown in Figure 1, the spherical grid array integrated circuit package blocks 1 of the utility model electrical overloads of anti-moment comprises anti-moment electrical overloads parts 2, lead-in wire substrate 3, soldered ball 4, integrated circuit (IC) chip 5 and package casing 6.Anti-moment, electrical overloads parts 2 were arranged on the bottom of lead-in wire substrate 3.
As shown in Figure 2, above-mentioned anti-moment the electrical overloads parts 2 be by adhesive layer 7, the composite wafer that conductive layer 8 and insulating barrier 9 constitute.Have on the thin slice and the corresponding array through-hole 10 of the ball grid array of spherical grid array integrated circuit package blocks.Be provided with voltage sensitivity parts 13 in the conductive layer 8, these voltage sensitivity parts 13 are arranged between the electric conducting material 12 of remainder in the electric conducting material 11 of connecting through hole in the conductive layer 8 and the conductive layer 8, and the electric conducting material 11 of connecting through hole is connected with the electric conducting material 12 of remainder in the conductive layer 8.Above-mentioned adhesive layer 7 can will resist moment electrical overloads parts 2 to be fixed on the lead-in wire substrate 3, and conductive layer 8 is located between adhesive linkage 7 and the insulating barrier 9.Conductive layer 8 can be made of any electric conducting material, as metal forming, and conducting resinl, plated metal etc.Insulating barrier 9 can prevent the integrated circuit short circuit.Voltage sensitivity parts 13 can be inorganic silicon, and the metal oxide pressure sensitive also can be polymer voltage mutant materials.Voltage sensitivity parts 13 have non-linear conductive characteristic, and promptly in low-voltage state, the resistivity of polymer voltage mutant materials is very high, is insulator; When voltage reaches a certain high-voltage value, during critical voltage, the resistivity of polymer voltage mutant materials sharply reduces, and becomes electric conductor.
As shown in Figure 3, be the soldered ball in the utility model 4 and lead-in wire substrate 3 and anti-moment broken section structure of being connected of electrical overloads parts 2.Each soldered ball 4 links to each other with the lead pad 14 of lead-in wire in the substrate 3.Soldered ball 4 also is connected with the electric conducting material 11 of connecting through hole on the anti-moment electrical overloads parts 2 simultaneously; the electric conducting material 12 of remainder links to each other with ground wire on the conductive layer 8; formed the EOS protective circuit on a lead-in wire of spherical grid array integrated circuit piece, its protective circuit schematic diagram as shown in Figure 4.Under the normal condition of no moment electrical overloads, voltage sensitivity parts 13 are insulator, lead to the chip circuit of integrated circuit through lead pad 14 by soldered ball 4 from the electric current of printed board circuit (PCB).When the integrated circuit package blocks is subjected to that moment, electrical overloads was impacted, as ESD, moment quick voltage, lightning etc., voltage sensitivity parts 13 can become electric conductor, by the moment heavy current that produced of electrical overloads, from the electric conducting material 11 of soldered ball 4 by connecting through hole flow through voltage sensitivity parts 13 again on conductive layer 8 remaining electric conducting material 12 connect ground wires, make the moment high-energy that produced of electrical overloads obtain discharging, alleviate chip circuit is impacted by ground connection.Thereby protected integrated circuit (IC) chip in the integrated circuit package blocks to avoid the damage of moment electrical overloads.Behind high voltage pulse, voltage sensitivity parts 12 become insulator again.Therefore can repeatedly protect integrated circuit (IC) chip.
As shown in Figure 5, in the utility model anti-moment electrical overloads parts 2 application examples 1 conductive layer 8 on each through hole 10 outer circle groove 15 that are provided with, groove 15 electric conducting material 17 that the electric conducting material 16 of connecting through hole and groove 15 circles are outer is isolated.Voltage sensitivity parts 13 are set in the groove 15, and voltage sensitivity parts 13 couple together the electric conducting material 16 of connecting through hole and the electric conducting material 17 outside groove 15 circles.
As shown in Figure 6, in the utility model anti-moment electrical overloads parts 2 application examples 2 conductive layer 8 on the circumference of each through hole 10 on the one or more block of conductive material 18 that distributing, a gap 20 is arranged between the electric conducting material 19 of remainder on each block of conductive material 18 and the conductive layer 8, and gap 20 is isolated with the electric conducting material 19 of remainder on the block of conductive material 18 of connecting through hole and the conductive layer 8.Voltage sensitivity parts 13 are set in the gap 20, and voltage sensitivity parts 13 couple together the electric conducting material 19 of remainder on the block of conductive material 18 of connecting through hole and the conductive layer 8.

Claims (4)

1. anti-moment electrical overloads the spherical grid array integrated circuit package blocks, comprise integrated circuit (IC) chip, lead-in wire substrate, lead pad and soldered ball, it is characterized in that: be provided with anti-moment electrical overloads parts at the lead-in wire base plate bottom, described soldered ball respectively with anti-moment the electrical overloads parts be connected with lead pad.
2. anti-moment according to claim 1 electrical overloads the spherical grid array integrated circuit package blocks, it is characterized in that: described anti-moment the electrical overloads parts form by adhesive linkage, conductive layer and insulating barrier; This, electrical overloads parts were provided with and the corresponding array through-hole of lead pad anti-moment; Be provided with the voltage sensitivity parts in the described conductive layer in the electric conducting material of connecting through hole and the conductive layer between the electric conducting material of remainder, these voltage sensitivity parts are connected the electric conducting material of connecting through hole with the electric conducting material of remainder in the conductive layer; The electric conducting material of connecting through hole links to each other with soldered ball on the conductive layer, and the electric conducting material of remainder links to each other with ground wire on the conductive layer.
3. anti-moment according to claim 1 electrical overloads the spherical grid array integrated circuit package blocks, it is characterized in that: described anti-moment the adhesive linkage of electrical overloads parts bonding with the lead-in wire base plate bottom, conductive layer is located between adhesive linkage and the insulating barrier.
4. anti-moment according to claim 1 electrical overloads the spherical grid array integrated circuit package blocks, it is characterized in that: described voltage sensitivity parts have non-linear conductive characteristic, promptly in low-voltage state, resistivity is very high, is insulator; When transient voltage reached the high voltage standard value, the resistivity of voltage sensitivity parts reduced, and is electric conductor, and after transient voltage disappeared, the voltage sensitivity parts became insulator again.
CN2010202140954U 2010-05-31 2010-05-31 Ball grid array integrated circuit packaging block for resisting transient electric over stress Expired - Fee Related CN201673902U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010202140954U CN201673902U (en) 2010-05-31 2010-05-31 Ball grid array integrated circuit packaging block for resisting transient electric over stress

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010202140954U CN201673902U (en) 2010-05-31 2010-05-31 Ball grid array integrated circuit packaging block for resisting transient electric over stress

Publications (1)

Publication Number Publication Date
CN201673902U true CN201673902U (en) 2010-12-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010202140954U Expired - Fee Related CN201673902U (en) 2010-05-31 2010-05-31 Ball grid array integrated circuit packaging block for resisting transient electric over stress

Country Status (1)

Country Link
CN (1) CN201673902U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20101215

Termination date: 20180531

CF01 Termination of patent right due to non-payment of annual fee