CN201623075U - Package structure of external heat-dissipating plate of heat dissipation part with locking hole of resin circuit board chip flip - Google Patents
Package structure of external heat-dissipating plate of heat dissipation part with locking hole of resin circuit board chip flip Download PDFInfo
- Publication number
- CN201623075U CN201623075U CN201020118834XU CN201020118834U CN201623075U CN 201623075 U CN201623075 U CN 201623075U CN 201020118834X U CN201020118834X U CN 201020118834XU CN 201020118834 U CN201020118834 U CN 201020118834U CN 201623075 U CN201623075 U CN 201623075U
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- China
- Prior art keywords
- heat dissipation
- chip
- circuit board
- resin circuit
- lock hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model relates to a package structure of an external heat-dissipating plate of a heat dissipation part with a locking hole of resin circuit board chip flip, comprising a chip (3), a single or multi-layered resin circuit board (9), a metal convex block (10) and a plastic package body (8). A heat dissipation part (7) is arranged above the chip (3) and is provided with a locking hole (7.1), and a conductive or nonconductive thermal-conductive binding material II (6) is inlaid between the heat dissipation part (7) and the chip (3). A heat-dissipating plate (11) is arranged above the heat dissipation part (7) and is fixedly connected with the heat dissipation part (7) by a screw (12) passing through the locking hole (7.1). The capability of heat dissipation is strong, and the heat of the chip can be rapidly transmitted to the outside of the package body.
Description
(1) technical field
The utility model relates to a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure.Belong to the semiconductor packaging field.
(2) background technology
The radiating mode of traditional Chip Packaging form mainly be to have adopted the Metal Substrate island of chip below as heat radiation conduction instrument or approach, and there is following not enough point in the heat radiation of this conventional package mode conduction:
1, Metal Substrate island volume is too little
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and in limited packaging body, to imbed the interior pin (as shown in Figures 1 and 2) of metal of Metal Substrate island and signal, power supply conduction usefulness simultaneously, very the little so effective area on Metal Substrate island and volume just seem, and the function of the heat radiation of high heat also will be served as in the Metal Substrate island simultaneously, will seem deficiency more.
2, baried type Metal Substrate island (as shown in Figures 1 and 2)
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and the Metal Substrate island is about dependence or four fine support bars in corner fix or support metal Ji Dao, also because the characteristic of this fine support bar, the heat that has caused the Metal Substrate island to be absorbed from the chip, can't conduct out from fine support bar fast, so the heat of chip can't or be transmitted to the packaging body external world fast, caused the life-span quick aging of chip even burn or burnt out.
3, Metal Substrate island exposed type (as shown in Figures 3 and 4)
Though expose on the Metal Substrate island, can provide also will good heat-sinking capability than the heat sinking function of baried type, because the volume on Metal Substrate island and area still very little in packaging body, so heat dissipation capability can be provided, still very limited.
(3) summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, and providing a kind of can provide heat dissipation capability strong resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure.
The purpose of this utility model is achieved in that a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure, include chip, the single or multiple lift resin circuit board that is carried of chip below, the metal coupling that chip is used to the signal interconnection of single or multiple lift resin circuit board, conduction between chip and the described single or multiple lift resin circuit board or nonconducting heat conduction bonding material I and plastic-sealed body, above described chip, be provided with radiating block, this radiating block has lock hole, is equipped with conduction or nonconducting heat conduction bonding material II between this radiating block and the described chip; Be provided with heating panel above described radiating block, described heating panel is fixedlyed connected with radiating block by described lock hole with screw.
The beneficial effects of the utility model are:
The utility model passes through addition radiating block above chip, and sets up heating panel outside plastic-sealed body, serves as the function of the heat radiation of high heat, can provide heat dissipation capability strong, makes the heat of chip can be transmitted to the packaging body external world fast.Can be applied in and make it become height or superelevation heat radiation (High Thermal or Super High Thermal) ability on the packaging body of general packing forms and the packaging technology, can become SHT-FBP/QFN as FBP can become SHT-QFN/BGA and can become SHT-BGA/CSP and can become SHT-CSP ...Avoided the life-span quick aging of chip even burn or burnt out.
(4) description of drawings
Fig. 1 is Metal Substrate island baried type chip-packaging structure schematic diagram in the past.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is Metal Substrate island exposed type chip-packaging structure schematic diagram in the past.
Fig. 4 is the vertical view of Fig. 3.
Fig. 5 is the utility model resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure schematic diagram.
Fig. 6 is another embodiment schematic diagram of the utility model resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure.
Reference numeral among the figure:
Conduction or nonconducting heat conduction bonding material I2, chip 3, conduction or nonconducting heat conduction bonding material II6, radiating block 7, lock hole 7.1, plastic-sealed body 8, resin circuit board 9, metal coupling 10, heating panel 11, screw 12.
(5) embodiment
Referring to Fig. 5, Fig. 5 is the utility model resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure schematic diagram.As seen from Figure 5, the utility model resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure, include chip 3, the single or multiple lift resin circuit board 9 that is carried of chip below, the metal coupling 10 that chip is used to the signal interconnection of single or multiple lift resin circuit board, conduction between chip and the described single or multiple lift resin circuit board or nonconducting heat conduction bonding material I2 and plastic-sealed body 8, above described chip 3, be provided with radiating block 7, this radiating block 7 has lock hole 7.1, is equipped with conduction or nonconducting heat conduction bonding material II 6 between this radiating block 7 and the described chip 3; Be provided with heating panel 11 above described radiating block 7, described heating panel 11 usefulness screws 12 are fixedlyed connected with radiating block 7 by described lock hole 7.1.
The material of described radiating block 7 can be copper, aluminium, pottery or alloy etc.
The material of described metal coupling 10 can be tin, gold or alloy etc.
The material of described heating panel 11 can be copper, aluminium, pottery or alloy etc.
Described heating panel 11 can have one or more layers, as shown in Figure 6.
Claims (5)
1. resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure, include chip (3), the single or multiple lift resin circuit board (9) that is carried of chip below, the metal coupling that chip is used to the signal interconnection of single or multiple lift resin circuit board (10), conduction between chip and the described single or multiple lift resin circuit board or nonconducting heat conduction bonding material I (2) and plastic-sealed body (8), it is characterized in that being provided with radiating block (7) in described chip (3) top, this radiating block (7) has lock hole (7.1), is equipped with conduction or nonconducting heat conduction bonding material II (6) between this radiating block (7) and the described chip (3); Be provided with heating panel (11) in described radiating block (7) top, described heating panel (11) is fixedlyed connected with radiating block (7) by described lock hole (7.1) with screw (12).
2. a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure according to claim 1, the material that it is characterized in that described radiating block (7) is copper, aluminium, pottery or alloy.
3. a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure according to claim 1, the material that it is characterized in that described metal coupling (10) is tin, gold or alloy.
4. a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure according to claim 1, the material that it is characterized in that described heating panel (11) is copper, aluminium, pottery or alloy.
5. a kind of resin circuit board chip-flip lock hole heat dissipation block externally connected with heat dissipation plate encapsulating structure according to claim 1 is characterized in that described heating panel (11) has one or more layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201020118834XU CN201623075U (en) | 2010-01-30 | 2010-01-30 | Package structure of external heat-dissipating plate of heat dissipation part with locking hole of resin circuit board chip flip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201020118834XU CN201623075U (en) | 2010-01-30 | 2010-01-30 | Package structure of external heat-dissipating plate of heat dissipation part with locking hole of resin circuit board chip flip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201623075U true CN201623075U (en) | 2010-11-03 |
Family
ID=43026532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201020118834XU Expired - Fee Related CN201623075U (en) | 2010-01-30 | 2010-01-30 | Package structure of external heat-dissipating plate of heat dissipation part with locking hole of resin circuit board chip flip |
Country Status (1)
Country | Link |
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CN (1) | CN201623075U (en) |
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2010
- 2010-01-30 CN CN201020118834XU patent/CN201623075U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101103 Termination date: 20140130 |