CN201594399U - Programmer terminal - Google Patents
Programmer terminal Download PDFInfo
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- CN201594399U CN201594399U CN2010200228443U CN201020022844U CN201594399U CN 201594399 U CN201594399 U CN 201594399U CN 2010200228443 U CN2010200228443 U CN 2010200228443U CN 201020022844 U CN201020022844 U CN 201020022844U CN 201594399 U CN201594399 U CN 201594399U
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- liquid crystal
- local bus
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Abstract
A programmer terminal is characterized by comprising a main control module, a liquid crystal display, a button and a buzzer. The main control module includes a CCM3118 processor and a storage. The CCM3118 processor is provided with a C*CoreC310 processor core, a serial communication interface, a liquid crystal controller interface, an external bus interface and a C*Core local bus. The external bus interface is connected with the C*Core local bus, the liquid crystal display is connected with the liquid crystal controller interface, the storage is connected with the C*Core local bus, and a plurality of multifunctional inputs and outputs are further connected onto the C*Core local bus. The programmer terminal can be connected with an embedded product via a cable, start programming operation of a chip by pressing the button, display programming information through the liquid crystal display in real time with audio indication whether or not being successful after programming, avoid inherent technical shortages of conventional programmers and testing procedure of a FLASH chip, and lower production cost.
Description
Technical field
The utility model relates to a kind of programming device, particularly a kind of programmable device terminal.
Background technology
In the design of embedded system, the software code of operating system and application program all is solidificated in the nonvolatile memory, and wherein Flash is widely used in built-in field with advantages such as it are erasable often, storage speed is fast, capacity reaches low price greatly.In the production phase of embedded product, how a large amount of FLASH chips is programmed, be the problem that manufacturer need face.
When original programmable device is programmed to the FLASH chip, need be fixed on the FLASH chip on the socket of programmable device, control by PC end software, set programmable device at the specific operating circuit of the type FLASH chip, produce the erasing voltage and the program timing sequence of FLASH chip necessity, finish the programming action of chip.Its defective is:
1, when the content of FLASH chip need change, general way was:
(1) welds the FLASH chip that loads the program of haveing been friends in the past on the following pcb board, have the FALSH chip of new procedures on being welded again; Like this, be easy to cause the physical damage of chip and pcb board, and efficient is very low;
(2) be welded with the anchor clamps of FLASH chip on the pcb board, take out the FLASH chip that old program is housed in the anchor clamps, in the FLASH chip, place it in the anchor clamps again with programmable device programming new procedures.Owing to use anchor clamps, the chip loading and unloading are simple, but anchor clamps cost height, poor reliability, and the general volume of anchor clamps is bigger, this layout that increases pcb board, wiring difficulty.
2, the packing forms of FLASH chip has variedly, needs the corresponding conversion socket of configuration, cost an arm and a leg as the conversion socket of BGA encapsulation, and the life-span access times restriction is arranged, increased production cost of products.
Summary of the invention
Technical problem to be solved in the utility model is at the deficiencies in the prior art, and the programmable device that a kind of structure is more reasonable, simple and efficient to handle, cost is low terminal is provided.
Technical problem to be solved in the utility model is to realize by following technical scheme.The utility model is a kind of programmable device terminal, is characterized in, it comprises main control module, liquid crystal display, button and hummer; Described main control module comprises CCM3118 processor and storer, the CCM3118 processor is provided with C*Core C310 processor core, serial communication interface SCI (Serial Communications Interface), liquid-crystal controller interface LCDC (Liquid Crystal Display Controller), external bus interface EBI (External Bus Interface) and C*Core local bus (C*Core Local Bus), external bus interface EBI is connected with the C*Core local bus, liquid crystal display is connected with liquid-crystal controller interface LCDC, on serial communication interface SCI, be connected with serial ports, storer is connected with the C*Core local bus, also be connected with several multi-functional input and output GPIO (General-purposeinput/output) on the C*Core local bus, described button is connected with the C*Core local bus by multi-functional input and output GPIO respectively with hummer.
Technical problem to be solved in the utility model can also further realize by following technical scheme.Above-described programmable device terminal is characterized in, described storer is SRAM, NorFlash and NandFlash storer.
If no special instructions, employed english abbreviation all adopts general explanation of the prior art in the utility model.
The utility model can be realized only just can being connected with embedded product by a single data cable, clicks the programming operation that button on the utility model can begin the FLASH chip.Programming information in operating process shows in real time that by liquid crystal display of the present utility model programming finishes the back success or not and has correspondingly auditory tone cues.Before carrying out a new product FLASH programming, need carry out necessary configuration to the utility model by serial ports, configuration finishes the configuration surroundings that the back utmost point can break away from PC.In the operation of the FLASH of utility model chip programming, need not external any opertaing device.During use, required programming data is kept in the utility model terminal by configuration in advance, utilize a JTAG cable to be connected on the jtag interface of the product of will programming, by the operation that button of the present utility model begins or stops to programme, programming state information offers the operator by liquid crystal display and sound.
JTAG (Joint Test Action Group) is the detection PCB of formulation in 1985 and a standard of IC chip, and nineteen ninety is modified to the IEEE1149.1-1990 standard.The JTAG standard definition shift register of a serial, the respective pins of chip is distributed in each unit of register, each independently is called BSC (boundary scan cell) in the unit, the BSC of this series connection is in the inner formation of IC JTAG loop, all BSR (boundary scan register) activate by jtag test, and these IC pins keep normal function at ordinary times.BSDL (border descriptive language) is the description to the boundary scan characteristic of the chip of compatible jtag interface, has mainly described the characteristics such as corresponding relation of jtag instruction system, BSC and the chip pin of chip.
The utility model utilizes the instruction that interconnects between the test chip of jtag interface, has realized the programming operation to the FLASH device, has realized man-machine interaction by IO interface such as liquid crystal, button and sound.
Compared with prior art, the utlity model has following technique effect:
(1) it has avoided adopting the inherent shortcoming of the programmable device of original technology fully, does not need the FLASH chip is taken off from pcb board, also FLASH chip conversion socket not.
(2) in programming process, do not want external PC, do not need numerous and diverse configuration operation process.
(3) use the utility model can obtain to be programmed the fine or not state of product immediately, avoided adopting the product of the programmable device programming of original technology need increase the link of FLASH chip testing, reduced production cost.
Description of drawings
Fig. 1 is a kind of structured flowchart of the present utility model.
Embodiment
Following with reference to accompanying drawing, further describe concrete technical scheme of the present utility model, so that those skilled in the art understands the present invention further, and do not constitute restriction to its right.
Embodiment 1.A kind of programmable device terminal, it comprises main control module, liquid crystal display, button and hummer; Described main control module comprises CCM3118 processor and storer, the CCM3118 processor is provided with C*Core C310 processor core, serial communication interface SCI, liquid-crystal controller interface LCDC, external bus interface EBI and C*Core local bus, external bus interface EBI is connected with the C*Core local bus, liquid crystal display is connected with liquid-crystal controller interface LCDC, on serial communication interface SCI, be connected with serial ports, storer is connected with the C*Core local bus, also be connected with several multi-functional input and output GPIO on the C*Core local bus, described button is connected with the C*Core local bus by multi-functional input and output GPIO respectively with hummer.
Embodiment 2.In the embodiment 1 described programmable device terminal, described storer is SRAM, NorFlash and NandFlash storer.
Claims (2)
1. a programmable device terminal is characterized in that, it comprises main control module, liquid crystal display, button and hummer; Described main control module comprises CCM3118 processor and storer, the CCM3118 processor is provided with C*Core C310 processor core, serial communication interface SCI, liquid-crystal controller interface LCDC, external bus interface EBI and C*Core local bus, external bus interface EBI is connected with the C*Core local bus, liquid crystal display is connected with liquid-crystal controller interface LCDC, on serial communication interface SCI, be connected with serial ports, storer is connected with the C*Core local bus, also be connected with several multi-functional input and output GPIO on the C*Core bus, described button is connected with the C*Core local bus by multi-functional input and output GPIO respectively with hummer.
2. programmable device terminal according to claim 1 is characterized in that, described storer is SRAM, NorFlash and NandFlash storer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010200228443U CN201594399U (en) | 2010-01-08 | 2010-01-08 | Programmer terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010200228443U CN201594399U (en) | 2010-01-08 | 2010-01-08 | Programmer terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201594399U true CN201594399U (en) | 2010-09-29 |
Family
ID=42776467
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010200228443U Expired - Fee Related CN201594399U (en) | 2010-01-08 | 2010-01-08 | Programmer terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201594399U (en) |
-
2010
- 2010-01-08 CN CN2010200228443U patent/CN201594399U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100929 Termination date: 20140108 |