CN201548618U - Stochastic resonance noise filtering and weak periodic signal detecting circuit - Google Patents
Stochastic resonance noise filtering and weak periodic signal detecting circuit Download PDFInfo
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- CN201548618U CN201548618U CN2009202008002U CN200920200800U CN201548618U CN 201548618 U CN201548618 U CN 201548618U CN 2009202008002 U CN2009202008002 U CN 2009202008002U CN 200920200800 U CN200920200800 U CN 200920200800U CN 201548618 U CN201548618 U CN 201548618U
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Abstract
The utility model relates to a stochastic resonance noise filtering and weak periodic signal detecting circuit. The stochastic resonance noise filtering and weak periodic signal detecting circuit comprises a signal amplification circuit, a summing integrator circuit and a comparing feedback circuit. The signal amplification circuit comprises two operational amplifiers, a variable resistance and two grounding resistances; the summing integrator circuit comprises a summing operational amplifier, an integral operational amplifier, two grounding resistances and an integrator capacitor, wherein an output end of the integral operational amplifier is connected with the integrator capacitor so as to be used as a signal output end; the comparing feedback circuit comprises 6 comparators, 2 reversers, 1 operational amplifier, 6 variable resistances and three grounding resistances. The stochastic resonance noise filtering and weak periodic signal detecting circuit can significantly strengthen a weak periodic pulse signal in an electrical signal including noise and obviously weaken the noise, and realizes the extraction of useful weak electric signal under condition of strong noise.
Description
Technical field
The utility model belongs to the electronic signal process field, relates to a kind of circuit, specifically is a kind of accidental resonance noise filtering and weak periodic signal detecting circuit.
Background technology
To the processing classic method that contains noise signal is to carry out filtering by wave filter.But wave filter can only carry out filtering to the signal of certain frequency range.For example: low-pass filter passes through low-band signal, the filtering high frequency band signal.Hi-pass filter passes through high frequency band signal, the filtering low-band signal.This technology is difficult to utilize noise energy that the useful signal in the very noisy is strengthened, and makes noise attentuation, and with the useful signal and the noise separation of same frequency range, thereby extract useful signal.And based on the non-linear filtering method of accidental resonance principle, can utilize noise energy that signal is enhanced, improve signal to noise ratio (S/N ratio), the feeble signal that is submerged in the noise background is extracted, so, all have wide practical use in fields such as fault detect, bio signal extraction, image and voice messaging identification, DOA estimation.
The phenomenon of accidental resonance is found by scientists such as Benzi at first, that is: when a non-linear continuous bistable system model is imported faint periodic signal and noise signal simultaneously, under the suitable parameters condition, when noise is strengthened to a certain intensity, signal to noise ratio (S/N ratio) not only can not reduce, the phase inverted output signal can significantly be strengthened, and this phenomenon is called as " accidental resonance " phenomenon.Signal processing method based on the accidental resonance principle is a kind of new signal disposal route.At present, the signal Processing of accidental resonance principle is a core with continuous bistable system mathematical model mainly.When input, measured signal can not be regulated often, needs to reconcile parameter and reaches best input effect.But relation is complicated between this continuous flip-flop model parameter, and this brings difficulty for regulating parameter rapidly.
We have proposed a kind of piecewise linearity accidental resonance mathematical model.It is simple that this model has the parameter regulation relation, is easy to different frequency signals is realized the characteristics of accidental resonance.
This model is:
Wherein, t represents the time,
Expression x (t) differentiates, and x (t) is the output signal after handling, and a, b, c are real parameter, and a＞b＞0, c＞0; S (t)=Ks (t), K is an amplification coefficient, s (t) is the noise signal that contains to be detected, s (t)=H (t)+η (t), H (t) represents input signal to be detected, η (t) represents noise signal;
The relation of this aspect of model value and parameter is: be positioned at x=± b place at the bottom of the trap, barrier height Δ U=c, about two outside line segments and abscissa axis give
Obviously, be to concern one to one between eigenwert and the parameter, regulating one of them parameter only can influence a feature.Change barrier height, only need to regulate parameter c.The change of parameter c only influences barrier height, can not influence other features such as position at the bottom of the trap.This adjusting for parameter has obvious superiority.
Summary of the invention
The purpose of this utility model just provides a kind of accidental resonance noise filtering and weak periodic signal detecting circuit, this circuit designs according to above-mentioned (1) formula accidental resonance piecewise linearity mathematical model, weak periodic signal in the very noisy significantly can be strengthened, noise contribution obviously weakens, and can extract useful ultra-weak electronic signal under strong noise background.
The utility model circuit comprises signal amplification circuit, summation integrating circuit, comparison feedback circuit.
Signal amplification circuit comprises the first operational amplifier U1, the second operational amplifier U2, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the first variable resistor R101, the first stake resistance R201, the second stake resistance R202.One end of first resistance R 1 is connected with the measured signal input end, the reverse input end of the first operational amplifier U1 is connected with the other end of first resistance R 1 and an end of second resistance R 2, the in-phase input end of the first operational amplifier U1 is connected with the end of the first stake resistance R201, the other end ground connection of the first stake resistance R201, the output terminal of the first operational amplifier U1 is connected with the other end of second resistance R 2 and an end of the 3rd resistance R 3; The reverse input end of the second operational amplifier U2 is connected with the other end of the 3rd resistance R 3 and the stiff end of the first variable resistor R101, the input end in the same way of the second operational amplifier U2 is connected with the end of the second stake resistance R202, the other end ground connection of the second stake resistance R202, the output terminal of the second operational amplifier U2 is connected with the adjustable end of the first variable resistor R101.
The summation integrating circuit comprises sum operational amplifier U3, integral operation amplifier U4, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 3rd stake resistance R203, the 4th stake resistance R204, integrator capacitor C 1.The reverse input end of sum operational amplifier U3 is connected with an end of the 4th resistance R 4, an end of the 5th resistance R 5 and an end of the 6th resistance R 6, the other end of the 4th resistance R 4 is connected with the output terminal of the second operational amplifier U2, the input end in the same way of sum operational amplifier U3 is connected with the end of the 3rd stake resistance R203, the other end ground connection of the 3rd stake resistance R203, the output terminal of sum operational amplifier U3 is connected with the other end of the 6th resistance R 6 and an end of the 7th resistance R 7; The reverse input end of integral operation amplifier U4 is connected with the other end of the 7th resistance R 7 and an end of integrator capacitor C 1, the input end in the same way of integral operation amplifier U4 is connected with the end of the 4th stake resistance R204, the other end ground connection of the 4th stake resistance R204, the output terminal of integral operation amplifier U4 is connected with the other end of integrator capacitor C 1, and this end is as signal output part.
Relatively feedback circuit comprises the first comparer B1, the second comparer B2, the 3rd comparer B3, the 4th comparer B4, the 5th comparer B5, the 6th comparer B6, the first reverser F1, the second reverser F2, operational amplifier U5, the second adjustable resistance R102, the 3rd variable resistor R103, the 4th variable resistor R104, the 5th variable resistor R105, the 6th variable resistor R106, the 7th variable resistor R107, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21, the 22 resistance R 22, the 23 resistance R 23, the 24 resistance R 24, the 25 resistance R 25, the 5th stake resistance R205, the 6th stake resistance R206, the 7th stake resistance R207.The stiff end of the second adjustable resistance R102 is connected with positive supply, another stiff end ground connection, and the stiff end of the 3rd variable resistor R103 is connected with negative supply, another stiff end ground connection.
One end of the 8th resistance R 8 is connected with the input end in the same way of the first comparer B1, one end of the 11 resistance R 11 is connected with the reverse input end of the second comparer B2, one end of the 12 resistance R 12 is connected with the input end in the same way of the 3rd comparer B3, one end of the 15 resistance R 15 is connected with the reverse input end of the 4th comparer B4, one end of the 16 resistance R 16 is connected with the input end in the same way of the 5th comparer B5, one end of the 19 resistance R 19 is connected with the reverse input end of the 6th comparer B6, the other end of the 8th resistance R 8, the other end of the 11 resistance R 11, the other end of the 12 resistance R 12, the other end of the 15 resistance R 15, the other end of the 16 resistance R 16, the other end of 19 resistance R 19 all is connected with the output terminal of integral operation amplifier U4; One end of the 9th resistance R 9 is connected with the reverse input end of the first comparer B1, an end of the tenth resistance R 10 is connected with the input end in the same way of the second comparer B2, and the other end of the other end of the 9th resistance R 9 and the tenth resistance R 10 is connected with the adjustable end of the second adjustable resistance R102; One end of the 17 resistance R 17 is connected with the reverse input end of the 5th comparer B5, an end of the 18 resistance R 18 is connected with the input end in the same way of the 6th comparer B6, and the other end of the 17 resistance R 17 and the other end of the 18 resistance R 18 are connected with the adjustable end of the 3rd variable resistor R103; One end of the 13 resistance R 13 is connected with the reverse input end of the 3rd comparer B3, the 14 resistance R 14 is connected the other end ground connection of the other end of the 13 resistance R 13 and the 14 resistance R 14 with the input end in the same way of the 4th comparer B4.The output terminal of the first comparer B1 is connected with the adjustable end of the 4th variable resistor R104, the output terminal of the second comparer B2 is connected with an end of the 20 resistance R 20, the output terminal of the 3rd comparer B3 is connected with an end of the 21 resistance R 21, the output terminal of the output terminal of the 4th comparer B4 and the 5th comparer B5 is connected with the adjustable end of the 6th variable resistor R106, and the output terminal of the 6th comparer B6 is connected with an end of the 22 resistance R 22;
The reverse input end of the first reverser F1 is connected with the other end of the other end of the 20 resistance R 20, the 21 resistance R 21 and an end of the 23 resistance R 23, the input end in the same way of the first reverser F1 is connected with the end of the 5th stake resistance R205, the other end ground connection of the 5th stake resistance R205, the output terminal of the first reverser F1 is connected with the adjustable end of the other end of the 23 resistance R 23 and the 6th variable resistor R106;
The reverse input end of the second reverser F2 is connected with an end of the other end of the 22 resistance R 22 and the 24 resistance R 24, the input end in the same way of the second reverser F2 is connected with the end of the 6th stake resistance R206, the other end ground connection of the 6th stake resistance R206, the output terminal of the second reverser F2 is connected with the adjustable end of the other end of the 24 resistance R 24 and the 7th variable resistor R107;
The reverse input end of operational amplifier U5 is connected with the stiff end of the 4th variable resistor R104, the stiff end of the 5th variable resistor R105, the stiff end of the 6th variable resistor R106, the stiff end of the 7th variable resistor R107 and an end of the 25 resistance R 25, the input end in the same way of operational amplifier U5 is connected with the end of the 7th stake resistance R207, the other end ground connection of the 7th stake resistance R207, the output terminal of operational amplifier U5 is connected with the other end of the other end of the 25 resistance R 25 and the 5th resistance R 5, constitutes backfeed loop.
In the above-mentioned comparison feedback circuit, the first comparer B1 and the 6th comparer B6 are single power supply, when input end signal is greater than the reverse input end signal in the same way, are output as positive high level, otherwise are 0; The second comparer B2, the 3rd comparer B3, the 4th comparer B4 and the 5th comparer B5 are the negative and positive dual power power supply, when input end signal is greater than the reverse input end signal in the same way, are output as positive high level, otherwise are negative high level.
Circuit working principle of the present utility model is:
To be measured contains noise signal s (t) through the signal input part input, obtains S (t)=Ks (t) after signal amplification circuit amplifies, and S (t) and the feedback signal U ' that compares feedback circuit sue for peace the output of this summer through sum operational amplifier U3
Send into integrator U4 integration again and get output signal x (t), x (t) is the signal after the processing;
Feedback signal U ' is by relatively feedback circuit generation, relatively the input signal of feedback circuit is x (t), the adjustable end of variable resistor R102 provides benchmark voltage+b, and the adjustable end of variable resistor R103 provides benchmark voltage-b, and power supply ground end provides benchmark voltage 0.
Relatively feedback circuit comprises four feedback selector channel, arbitrary moment has only a passage by gating, whether gating is relatively determined with reference voltage by x (t), by the gating of comparer B1 control selector channel whether the first feedback selection path, have only when x (t) 〉=b, comparer B1 just exports high level, amplifies output through U5
By the gating of comparer B2 and B3 control selector channel whether the second feedback selection path has only when 0≤x (t)＜b, and comparer B2 and B3 just export positive high level simultaneously, export through reverser F1 and amplifier U5
By the gating of comparer B4 and B5 control selector channel whether the 3rd feedback selection path has only when-b≤x (t)＜0, and comparer B4 and B5 just export positive high level simultaneously, export through amplifier U5
The 4th feedback selection path by the gating of comparer B6 control selector channel whether, have only when x (t)＜-during b, comparer B6 just exports high level, amplifies output through U5
The utility model provides a kind of accidental resonance circuit, noisy acoustoelectric signal to be measured is imported this circuit, not only the useful signal that is submerged in the very noisy can be strengthened, noise is significantly weakened, realization extracts the purpose of feeble signal from strong noise background, and this circuit also has the characteristics that parameter is easy to regulate.This circuit can be applied to many application scenarios.Many application scenarios all need to detect and extract the periodic signal that is submerged in the noise in the reality.As in plant equipment, because gap, wearing and tearing, small factors such as crackle, at the early stage faint periodic pulse signal that is submerged in the noise that often exists of fault.Biological information is as breathing also a kind of often periodic signal such as heartbeat.This circuit arrangement can directly combine with sensor, constitutes detecting instrument; Can constitute nonlinear filter, portable and miniature signal supervisory instrument etc.
Description of drawings
Fig. 1 is the utility model schematic block circuit diagram;
Fig. 2 is the utility model circuit diagram.
Embodiment
According to (1) formula and (2) formula, the utility model principle is expressed as feedback structure shown in Figure 1.This structure by amplification, summation, integration and relatively feedback form.In conjunction with Fig. 1 circuit theory, the circuit diagram of a kind of accidental resonance noise filtering and weak periodic signal detecting circuit as shown in Figure 2, this circuit comprises signal amplification circuit, summation integrating circuit, comparison feedback circuit.
Signal amplification circuit comprises the first operational amplifier U1, the second operational amplifier U2, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the first variable resistor R101, the first stake resistance R201, the second stake resistance R202.One end of first resistance R 1 is connected with the measured signal input end, the reverse input end of the first operational amplifier U1 is connected with the other end of first resistance R 1 and an end of second resistance R 2, the in-phase input end of the first operational amplifier U1 is connected with the end of the first stake resistance R201, the other end ground connection of the first stake resistance R201, the output terminal of the first operational amplifier U1 is connected with the other end of second resistance R 2 and an end of the 3rd resistance R 3; The reverse input end of the second operational amplifier U2 is connected with the other end of the 3rd resistance R 3 and the stiff end of the first variable resistor R101, the input end in the same way of the second operational amplifier U2 is connected with the end of the second stake resistance R202, the other end ground connection of the second stake resistance R202, the output terminal of the second operational amplifier U2 is connected with the adjustable end of the first variable resistor R101.
The summation integrating circuit comprises sum operational amplifier U3, integral operation amplifier U4, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 3rd stake resistance R203, the 4th stake resistance R204, integrator capacitor C 1.The reverse input end of sum operational amplifier U3 is connected with an end of the 4th resistance R 4, an end of the 5th resistance R 5 and an end of the 6th resistance R 6, the other end of the 4th resistance R 4 is connected with the output terminal of the second operational amplifier U2, the input end in the same way of sum operational amplifier U3 is connected with the end of the 3rd stake resistance R203, the other end ground connection of the 3rd stake resistance R203, the output terminal of sum operational amplifier U3 is connected with the other end of the 6th resistance R 6 and an end of the 7th resistance R 7; The reverse input end of integral operation amplifier U4 is connected with the other end of the 7th resistance R 7 and an end of integrator capacitor C 1, the input end in the same way of integral operation amplifier U4 is connected with the end of the 4th stake resistance R204, the other end ground connection of the 4th stake resistance R204, the output terminal of integral operation amplifier U4 is connected with the other end of integrator capacitor C 1, and this end is as signal output part.
Relatively feedback circuit comprises the first comparer B1, the second comparer B2, the 3rd comparer B3, the 4th comparer B4, the 5th comparer B5, the 6th comparer B6, the first reverser F1, the second reverser F2, operational amplifier U5, the second adjustable resistance R102, the 3rd variable resistor R103, the 4th variable resistor R104, the 5th variable resistor R105, the 6th variable resistor R106, the 7th variable resistor R107, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21, the 22 resistance R 22, the 23 resistance R 23, the 24 resistance R 24, the 25 resistance R 25, the 5th stake resistance R205, the 6th stake resistance R206, the 7th stake resistance R207.The stiff end of the second adjustable resistance R102 is connected with positive supply, another stiff end ground connection, and the stiff end of the 3rd variable resistor R103 is connected with negative supply, another stiff end ground connection.
One end of the 8th resistance R 8 is connected with the input end in the same way of the first comparer B1, one end of the 11 resistance R 11 is connected with the reverse input end of the second comparer B2, one end of the 12 resistance R 12 is connected with the input end in the same way of the 3rd comparer B3, one end of the 15 resistance R 15 is connected with the reverse input end of the 4th comparer B4, one end of the 16 resistance R 16 is connected with the input end in the same way of the 5th comparer B5, one end of the 19 resistance R 19 is connected with the reverse input end of the 6th comparer B6, the other end of the 8th resistance R 8, the other end of the 11 resistance R 11, the other end of the 12 resistance R 12, the other end of the 15 resistance R 15, the other end of the 16 resistance R 16, the other end of 19 resistance R 19 all is connected with the output terminal of integral operation amplifier U4; One end of the 9th resistance R 9 is connected with the reverse input end of the first comparer B1, an end of the tenth resistance R 10 is connected with the input end in the same way of the second comparer B2, and the other end of the other end of the 9th resistance R 9 and the tenth resistance R 10 is connected with the adjustable end of the second adjustable resistance R102; One end of the 17 resistance R 17 is connected with the reverse input end of the 5th comparer B5, an end of the 18 resistance R 18 is connected with the input end in the same way of the 6th comparer B6, and the other end of the 17 resistance R 17 and the other end of the 18 resistance R 18 are connected with the adjustable end of the 3rd variable resistor R103; One end of the 13 resistance R 13 is connected with the reverse input end of the 3rd comparer B3, the 14 resistance R 14 is connected the other end ground connection of the other end of the 13 resistance R 13 and the 14 resistance R 14 with the input end in the same way of the 4th comparer B4.The output terminal of the first comparer B1 is connected with the adjustable end of the 4th variable resistor R104, the output terminal of the second comparer B2 is connected with an end of the 20 resistance R 20, the output terminal of the 3rd comparer B3 is connected with an end of the 21 resistance R 21, the output terminal of the output terminal of the 4th comparer B4 and the 5th comparer B5 is connected with the adjustable end of the 6th variable resistor R106, and the output terminal of the 6th comparer B6 is connected with an end of the 22 resistance R 22.
The reverse input end of the first reverser F1 is connected with the other end of the other end of the 20 resistance R 20, the 21 resistance R 21 and an end of the 23 resistance R 23, the input end in the same way of the first reverser F1 is connected with the end of the 5th stake resistance R205, the other end ground connection of the 5th stake resistance R205, the output terminal of the first reverser F1 is connected with the adjustable end of the other end of the 23 resistance R 23 and the 6th variable resistor R106.
The reverse input end of the second reverser F2 is connected with an end of the other end of the 22 resistance R 22 and the 24 resistance R 24, the input end in the same way of the second reverser F2 is connected with the end of the 6th stake resistance R206, the other end ground connection of the 6th stake resistance R206, the output terminal of the second reverser F2 is connected with the adjustable end of the other end of the 24 resistance R 24 and the 7th variable resistor R107.
The reverse input end of operational amplifier U5 is connected with the stiff end of the 4th variable resistor R104, the stiff end of the 5th variable resistor R105, the stiff end of the 6th variable resistor R106, the stiff end of the 7th variable resistor R107 and an end of the 25 resistance R 25, the input end in the same way of operational amplifier U5 is connected with the end of the 7th stake resistance R207, the other end ground connection of the 7th stake resistance R207, the output terminal of operational amplifier U5 is connected with the other end of the other end of the 25 resistance R 25 and the 5th resistance R 5, constitutes backfeed loop.
In the above-mentioned comparison feedback circuit, the first comparer B1 and the 6th comparer B6 are single power supply, when input end signal is greater than the reverse input end signal in the same way, are output as positive high level, otherwise are 0; The second comparer B2, the 3rd comparer B3, the 4th comparer B4 and the 5th comparer B5 are the negative and positive dual power power supply, when input end signal is greater than the reverse input end signal in the same way, are output as positive high level, otherwise are negative high level.
Wherein, the actual measured signal that contains noise is through the reverse input end input of the first operational amplifier U1, through U1, U2 amplify S (t);
U3 is a summer, input signal S (t) and feedback signal U ' are sued for peace
U4 is an integrator, to input signal
Integration gets x (t); X (t) is the signal after the processing.
R102, R103 provide respectively ± the b comparative voltage.Regulate R102, R103, the voltage of R102, R103 intermediate node is respectively ± b, supply in comparer as reference voltage.
The feedback selection path mainly constitutes (frame of broken lines part among Fig. 2) by comparator bank.
Selection path 2 is by comparer B2 and comparer B3 control.Comparer B2 and comparer B3 are the negative and positive dual power power supply, are used for detecting the signal of 0≤x＜b.When x＜b, comparer B2 is output as U
Max, and when x 〉=b, comparer B2 is output as-U
Max, when x 〉=0, comparer B3 is output as U
Max, and when x＜0, comparer B3 is output as low level-U
MaxSo, having only when 0≤x＜b, comparer B2 and the coefficient path of comparer B3 could be exported high level, otherwise are 0, through reverser F1 and amplifier U5 output
Selection path 3 is by comparer B4 and comparer B5 control.Comparer B4 and B5 also are negative and positive dual power power supplies, with selection path 3 in like manner, be used for the signal of detection-b≤x＜0.Have only when-b≤x (t)＜0, comparer B4 and B5 just export positive high level simultaneously, export through amplifier U5
Selection path 4 is controlled by comparer B6.Comparer B6 is single supply U
MaxPower supply, be used for detecting x＜-signal of b.When x＜-during b, comparer B6 is output as U
MaxOtherwise, be 0, have only when x (t)＜-during b, comparer B6 just exports high level, amplifies output through reverser F2 and amplifier U5
Once determined the value of parameter a, b, c and K in (1) formula, just can regulate resistance value in view of the above, it is met the demands, and K can realize that parameter a, b, c can realize its satisfied (2) formula by regulating resistance R 104, R105, R106, R107 and R25 by regulating R101.Present embodiment is got a=2, b=1, c=0.5, K=10.
Claims (1)
1. accidental resonance noise filtering and weak periodic signal detecting circuit comprise signal amplification circuit, summation integrating circuit, comparison feedback circuit, it is characterized in that:
Signal amplification circuit comprises first operational amplifier (U) 1, second operational amplifier (U2), first resistance (R1), second resistance (R2), the 3rd resistance (R3), first variable resistor (R101), first stake resistance (R201), second stake resistance (R202); One end of first resistance (R1) is connected with the measured signal input end, the reverse input end of first operational amplifier (U1) is connected with the other end of first resistance (R1) and an end of second resistance (R2), the in-phase input end of first operational amplifier (U1) is connected with an end of first stake resistance (R201), the other end ground connection of first stake resistance (R201), the output terminal of first operational amplifier (U1) is connected with the other end of second resistance (R2) and an end of the 3rd resistance (R3); The reverse input end of second operational amplifier (U2) is connected with the other end of the 3rd resistance (R3) and the stiff end of first variable resistor (R101), the input end in the same way of second operational amplifier (U2) is connected with an end of second stake resistance (R202), the other end ground connection of second stake resistance (R202), the output terminal of second operational amplifier (U2) is connected with the adjustable end of first variable resistor (R101);
The summation integrating circuit comprises sum operational amplifier (U3), integral operation amplifier (U4), the 4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6), the 7th resistance (R7), the 3rd stake resistance (R203), the 4th stake resistance (R204), integrator electric capacity (C1); The reverse input end of sum operational amplifier (U3) is connected with an end of the 4th resistance (R4), an end of the 5th resistance (R5) and an end of the 6th resistance (R6), the other end of the 4th resistance (R4) is connected with the output terminal of second operational amplifier (U2), the input end in the same way of sum operational amplifier (U3) is connected with an end of the 3rd stake resistance (R203), the other end ground connection of the 3rd stake resistance (R203), the output terminal of sum operational amplifier (U3) is connected with the other end of the 6th resistance (R6) and an end of the 7th resistance (R7); The reverse input end of integral operation amplifier (U4) is connected with the other end of the 7th resistance (R7) and an end of integrator electric capacity (C1), the input end in the same way of integral operation amplifier (U4) is connected with an end of the 4th stake resistance (R204), the other end ground connection of the 4th stake resistance (R204), the output terminal of integral operation amplifier (U4) is connected with the other end of integrator electric capacity (C1), and this end is as signal output part;
Relatively feedback circuit comprises first comparer (B1), second comparer (B2), the 3rd comparer (B3), the 4th comparer (B4), the 5th comparer (B5), the 6th comparer (B6), first reverser (F1), second reverser (F2), operational amplifier (U5), the second adjustable resistance (R102), the 3rd variable resistor (R103), the 4th variable resistor (R104), the 5th variable resistor (R105), the 6th variable resistor (R106), the 7th variable resistor (R107), the 8th resistance (R8), the 9th resistance (R9), the tenth resistance (R10), the 11 resistance (R11), the 12 resistance (R12), the 13 resistance (R13), the 14 resistance (R14), the 15 resistance (R15), the 16 resistance (R16), the 17 resistance (R17), the 18 resistance (R18), the 19 resistance (R19), the 20 resistance (R20), the 21 resistance (R21), the 22 resistance (R22), the 23 resistance (R23), the 24 resistance (R24), the 25 resistance (R25), the 5th stake resistance (R205), the 6th stake resistance (R206), the 7th stake resistance (R207); A stiff end of the second adjustable resistance (R102) is connected with positive supply, another stiff end ground connection, and a stiff end of the 3rd variable resistor (R103) is connected with negative supply, another stiff end ground connection;
One end of the 8th resistance (R8) is connected with the input end in the same way of first comparer (B1), one end of the 11 resistance (R11) is connected with the reverse input end of second comparer (B2), one end of the 12 resistance (R12) is connected with the input end in the same way of the 3rd comparer (B3), one end of the 15 resistance (R15) is connected with the reverse input end of the 4th comparer (B4), one end of the 16 resistance (R16) is connected with the input end in the same way of the 5th comparer (B5), one end of the 19 resistance (R19) is connected with the reverse input end of the 6th comparer (B6), the other end of the 8th resistance (R8), the other end of the 11 resistance (R11), the other end of the 12 resistance (R12), the other end of the 15 resistance (R15), the other end of the 16 resistance (R16), the other end of 19 resistance (R19) all is connected with the output terminal of integral operation amplifier (U4); One end of the 9th resistance (R9) is connected with the reverse input end of first comparer (B1), an end of the tenth resistance (R10) is connected with the input end in the same way of second comparer (B2), and the other end of the other end of the 9th resistance (R9) and the tenth resistance (R10) is connected with the adjustable end of the second adjustable resistance (R102); One end of the 17 resistance (R17) is connected with the reverse input end of the 5th comparer (B5), an end of the 18 resistance (R18) is connected with the input end in the same way of the 6th comparer (B6), and the other end of the 17 resistance (R17) and the other end of the 18 resistance (R18) are connected with the adjustable end of the 3rd variable resistor (R103); One end of the 13 resistance (R13) is connected with the reverse input end of the 3rd comparer (B3), the 14 resistance (R14) is connected with the input end in the same way of the 4th comparer (B4), the other end of the 13 resistance (R13) and the other end ground connection of the 14 resistance (R14); The output terminal of first comparer (B1) is connected with the adjustable end of the 4th variable resistor (R104), the output terminal of second comparer (B2) is connected with an end of the 20 resistance (R20), the output terminal of the 3rd comparer (B3) is connected with an end of the 21 resistance (R21), the output terminal of the output terminal of the 4th comparer (B4) and the 5th comparer (B5) is connected with the adjustable end of the 6th variable resistor (R106), and the output terminal of the 6th comparer (B6) is connected with an end of the 22 resistance (R22);
The reverse input end of first reverser (F1) is connected with the other end of the 20 resistance (R20), the other end of the 21 resistance (R21) and an end of the 23 resistance (R23), the input end in the same way of first reverser (F1) is connected with an end of the 5th stake resistance (R205), the other end ground connection of the 5th stake resistance (R205), the output terminal of first reverser (F1) is connected with the adjustable end of the other end of the 23 resistance (R23) and the 6th variable resistor (R106);
The reverse input end of second reverser (F2) is connected with the other end of the 22 resistance (R22) and an end of the 24 resistance (R24), the input end in the same way of second reverser (F2) is connected with an end of the 6th stake resistance (R206), the other end ground connection of the 6th stake resistance (R206), the output terminal of second reverser (F2) is connected with the adjustable end of the other end of the 24 resistance (R24) and the 7th variable resistor (R107);
The stiff end of the reverse input end of operational amplifier (U5) and the 4th variable resistor (R104), the stiff end of the 5th variable resistor (R105), the stiff end of the 6th variable resistor (R106), the stiff end of the 7th variable resistor (R107) and an end of the 25 resistance (R25) connect, the input end in the same way of operational amplifier (U5) is connected with an end of the 7th stake resistance (R207), the other end ground connection of the 7th stake resistance (R207), the output terminal of operational amplifier (U5) is connected with the other end of the other end of the 25 resistance (R25) and the 5th resistance (R5), constitutes backfeed loop.
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| CN2009202008002U CN201548618U (en) | 2009-12-07 | 2009-12-07 | Stochastic resonance noise filtering and weak periodic signal detecting circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101741349B (en) * | 2009-12-07 | 2012-06-20 | 杭州电子科技大学 | Circuit for filtering stochastic resonance noise and detecting weak periodic signal |
| CN103063914A (en) * | 2012-12-29 | 2013-04-24 | 杭州电子科技大学 | Weak signal detection circuit based on modulation bistable stochastic resonance theory |
| CN107273064A (en) * | 2016-03-31 | 2017-10-20 | 佳能株式会社 | Signal Processing Apparatus And Signal Processing Method |
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2009
- 2009-12-07 CN CN2009202008002U patent/CN201548618U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101741349B (en) * | 2009-12-07 | 2012-06-20 | 杭州电子科技大学 | Circuit for filtering stochastic resonance noise and detecting weak periodic signal |
| CN103063914A (en) * | 2012-12-29 | 2013-04-24 | 杭州电子科技大学 | Weak signal detection circuit based on modulation bistable stochastic resonance theory |
| CN103063914B (en) * | 2012-12-29 | 2015-06-17 | 杭州电子科技大学 | Weak signal detection circuit based on modulation bistable stochastic resonance theory |
| CN107273064A (en) * | 2016-03-31 | 2017-10-20 | 佳能株式会社 | Signal Processing Apparatus And Signal Processing Method |
| US10715192B2 (en) | 2016-03-31 | 2020-07-14 | Canon Kabushiki Kaisha | Signal processing apparatus, signal processing method, and storage medium |
| CN107273064B (en) * | 2016-03-31 | 2021-02-09 | 佳能株式会社 | Signal processing device and signal processing method |
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