CN201499134U - Digital predistortion power amplifier - Google Patents
Digital predistortion power amplifier Download PDFInfo
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- CN201499134U CN201499134U CN2009200627667U CN200920062766U CN201499134U CN 201499134 U CN201499134 U CN 201499134U CN 2009200627667 U CN2009200627667 U CN 2009200627667U CN 200920062766 U CN200920062766 U CN 200920062766U CN 201499134 U CN201499134 U CN 201499134U
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Abstract
The utility model discloses a digital predistortion power amplifier, which comprises a digital predistortion unit, a digital predistortion adaptive controller, a first digital-to-analogue conversion unit, an upper frequency conversion unit, a power divider, a first wave length delay unit, a peak value amplifier, a second wave length delay unit, a coupler, a carrier amplifier, a first lower frequency conversion unit, a first analogue-to-digital conversion unit, an envelope extraction unit and a first signal processing unit, wherein one end of the envelope extraction unit is connected with a baseband signal receiving terminal, the other end thereof is connected with a grid terminal of the peak value amplifier. The utility model adopts the envelope extraction unit to extract envelope signals of the input baseband signals, the first signal processing unit processes the envelope signals to be grid voltage value of the peak value amplifier, and further, the grid voltage value of the peak value amplifier can be set according to the variation of the envelope signals. Therefore, the real-time work of the peak value amplifier stays in a high efficiency state.
Description
Technical field
The utility model relates to mobile communication system intermediate power amplifier field, relates in particular to a kind of digital pre-distorting power amplifier.
Background technology
Along with the Large scale construction of 3G network, in order to reduce CAPEX (Capital Expenditure, equity type investment) and OPEX (Operating Expense, operation cost), the efficient of power amplifier more and more becomes the focus that operator pays close attention to.Can improve common the having of technology of efficiency power amplifier: Doherty technology, envelope-tracking technology, envelope are eliminated regeneration techniques, adaptive-biased technology, peak value minimizing technology etc.High efficiency power amplifier not only can be saved the electricity charge for operator, can also save the investment of auxiliary facilities such as power supply, and because the simplification of production technology has reduced the requirement of complete machine heat radiation, increases stabilization of equipment performance, and network performance is better.
The Doherty technology is to improve a kind of common technology of efficiency power amplifier at present, as Fig. 1 is the schematic diagram of the digital pre-distorting power amplifier of available technology adopting Doherty technology, it comprises the digital pre-distortion unit, the digital predistortion adaptation controller, D/A conversion unit, the up-conversion unit, power splitter, the first wavelength delay cell, peak amplifier, the second wavelength delay cell, coupler, carrier amplifier, down-converter unit and AD conversion unit, the input of digital pre-distortion unit is connected with the baseband signal receiving terminal, output passes through D/A conversion unit successively, the up-conversion unit is connected with the input of power splitter, one of them output of power splitter is successively by the first wavelength delay cell, peak amplifier is connected with the input of coupler, another output of power splitter passes through carrier amplifier successively, be connected between the input of the second wavelength delay cell and peak amplifier and coupler, an output of coupler passes through down-converter unit, an input of AD conversion unit and digital predistortion adaptation controller is connected, another input of digital predistortion adaptation controller is connected with the baseband signal receiving terminal, and the output of digital predistortion adaptation controller is connected with the control end of described digital pre-distortion unit;
The baseband signal receiving terminal is used to receive the baseband signal of input, the baseband signal of input becomes radiofrequency signal after the upward frequency conversion through the conversion of D/A conversion unit and up-conversion unit after through the pre-distortion of digital pre-distortion unit and outputs to power splitter, power splitter is divided into two-way with this radiofrequency signal, output to peak amplifier after wherein one tunnel 1/4 wavelength through the first wavelength delay cell postpones, other one tunnel amplification through carrier amplifier, the signal coupling that 1/4 wavelength of the second wavelength delay cell postpones after amplify with peak amplifier the back outputs to coupler, coupler is exported one road signal, other one road signal is outputed to down-converter unit carry out down-converted, the conversion of signals of AD conversion unit after with down-converted outputs to the digital predistortion adaptation controller for the feedback baseband signal, baseband signal that the digital predistortion adaptation controller is relatively imported and feedback baseband signal, the output pre-distortion parameters is to the pre-distortion unit, the pre-distortion unit carries out pre-distortion according to pre-distortion parameters to the baseband signal of input, reaches the purpose of adaptive control by the baseband signal of relatively feeding back baseband signal and input.
Carrier amplifier and peak amplifier can both be designed to transmit peak power output to load with the efficient of the best.Carrier amplifier is conventional AB or class-b amplifier, can control its operating state by grid voltage 2 value sizes are set in the real work.Peak amplifier is ability amplifying signal when the input radio frequency signal power surpasses a certain minimum threshold only, usually makes it be operated in similar C class state by fence 1 value size is set in the real work.
Grid voltage 1 value of peak amplifier is to set a fixed value according to the average power of radiofrequency signal, with the power maximum that guarantees that peak amplifier is exported, thereby improves the effect of power amplifier output.Because the envelope of the baseband signal of input is a continually varying, and grid voltage 1 value of peak amplifier is fixed, the operating state of peak amplifier then can not be set in real time along with the variation of the envelope of importing baseband signal, cause the output effect of digital pre-distorting power amplifier lower, limited the raising of digital pre-distorting power amplifier power amplification efficiency.
Summary of the invention
The utility model provides a kind of digital pre-distorting power amplifier, and it can improve the power amplification efficiency of peak amplifier, thereby improves the power amplification efficiency of digital pre-distorting power amplifier.
The technical solution of the utility model is: a kind of digital pre-distorting power amplifier comprises digital pre-distortion unit, digital predistortion adaptation controller, first D/A conversion unit, up-conversion unit, power splitter, the first wavelength delay cell, peak amplifier, the second wavelength delay cell, coupler, carrier amplifier, first down-converter unit and first AD conversion unit;
The input of described digital pre-distortion unit is connected with the baseband signal receiving terminal, output is successively by described first D/A conversion unit, the up-conversion unit is connected with the input of described power splitter, one of them output of described power splitter is successively by the described first wavelength delay cell, peak amplifier is connected with the input of described coupler, another output of described power splitter is successively by described carrier amplifier, the second wavelength delay cell is connected between the input of described peak amplifier and coupler, an output of described coupler is successively by described first down-converter unit, an input of first AD conversion unit and described digital predistortion adaptation controller is connected, another input of described digital predistortion adaptation controller is connected with described baseband signal receiving terminal, and the output of described digital predistortion adaptation controller is connected with the control end of described digital pre-distortion unit;
Also comprise the envelope extraction unit and first signal processing unit, an end of described envelope extraction unit is connected with described baseband signal receiving terminal, and the other end is connected with the gate terminal of described peak amplifier by described first signal processing unit;
Described envelope extraction unit is used to extract the envelope signal of the baseband signal of input, and described envelope signal outputed to described first signal processing unit, described first signal processing unit is treated to described envelope signal the grid voltage value of described peak amplifier work.
Digital pre-distorting power amplifier of the present utility model, described digital pre-distorting power amplifier extracts the envelope signal of the baseband signal of input by envelope extraction unit, first signal processing unit is treated to this envelope signal the grid voltage value of peak amplifier work, and then the grid voltage value of peak amplifier can be set according to the variation of envelope signal, make the real-time high efficiency state that is operated in of peak amplifier, thereby improve the power amplification efficiency of the utility model digital pre-distorting power amplifier output.
Description of drawings
Fig. 1 is the structural principle block diagram of digital pre-distorting power amplifier in the prior art;
Fig. 2 is the utility model digital pre-distorting power amplifier structural principle block diagram in one embodiment;
Fig. 3 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 4 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 5 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 6 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 7 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 8 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Fig. 9 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Figure 10 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment;
Figure 11 is the utility model digital pre-distorting power amplifier structural principle block diagram in another embodiment.
Embodiment
Digital pre-distorting power amplifier of the present utility model, can extract the envelope signal of the baseband signal of input, this envelope signal is treated to the grid voltage value of peak amplifier work, then the utility model can be set the grid voltage value of peak amplifier according to the variation of envelope signal, so that peak amplifier according to the variation real-time working of envelope signal at high efficiency power amplification state, thereby improve the power amplification efficiency of the utility model digital pre-distorting power amplifier output.
Below in conjunction with accompanying drawing specific embodiment of the utility model is done a detailed elaboration.
Digital pre-distorting power amplifier of the present utility model, as Fig. 2, comprise digital pre-distortion unit, digital predistortion adaptation controller, first D/A conversion unit, up-conversion unit, power splitter, the first wavelength delay cell, peak amplifier, the second wavelength delay cell, coupler, carrier amplifier, first down-converter unit and first AD conversion unit;
The input of described digital pre-distortion unit is connected with the baseband signal receiving terminal, output is successively by described first D/A conversion unit, the up-conversion unit is connected with the input of described power splitter, one of them output of described power splitter is successively by the described first wavelength delay cell, peak amplifier is connected with the input of described coupler, another output of described power splitter is successively by described carrier amplifier, the second wavelength delay cell is connected between the input of described peak amplifier and coupler, an output of described coupler is successively by described first down-converter unit, an input of first AD conversion unit and described digital predistortion adaptation controller is connected, another input of described digital predistortion adaptation controller is connected with described baseband signal receiving terminal, and the output of described digital predistortion adaptation controller is connected with the control end of described digital pre-distortion unit;
Also comprise the envelope extraction unit and first signal processing unit, an end of described envelope extraction unit is connected with described baseband signal receiving terminal, and the other end is connected with the gate terminal of described peak amplifier by described first signal processing unit;
Described envelope extraction unit is used to extract the envelope signal of the baseband signal of input, and described envelope signal outputed to described first signal processing unit, described first signal processing unit is treated to described envelope signal the grid voltage value of described peak amplifier work.
The grid voltage value of peak amplifier can be set according to the envelope variation of baseband signal like this, guarantee that peak amplifier can be according to the variation real-time working of envelope signal at the high efficiency state.
The up-conversion unit and first down-converter unit can comprise frequency mixer and local oscillator respectively in the specific implementation, and frequency mixer carries out Frequency mixing processing according to the frequency of local oscillator output to the signal of importing.
In a preferred embodiment, as Fig. 5, the utility model also comprises the secondary signal processing unit, the one end is connected with the output of described envelope extraction unit, the other end is connected with the gate terminal of described carrier amplifier, is used for described envelope signal is treated to the grid voltage value of described carrier amplifier work.Make carrier amplifier keep under the constant situation of gain, variation reaches optimum in real time according to envelope signal in linearisation of the signal of its amplification output, can improve the output signal linearityization of carrier amplifier like this, further improve the efficient of the utility model digital pre-distorting power amplifier.
In a preferred embodiment, as Fig. 3, described first signal processing unit comprises the first look-up table unit, the first grid voltage value processing unit, the input of the described first look-up table unit is connected with the output of described envelope extraction unit, and the output of the described first look-up table unit is connected with the gate terminal of described peak amplifier by the described first grid voltage value processing unit;
The described first look-up table unit receives described envelope signal, export each digital grid voltage value successively according to its correspondence table of storing in advance, this each digital grid voltage value is converted to the grid voltage value of described peak amplifier work after through the digital-to-analogue conversion of the described first grid voltage value processing unit, processing and amplifying; The correspondence table that the described first look-up table unit is stored in advance comprises the digital grid voltage value of the control described peak amplifier efficiency operation corresponding with the envelope signal value.
Different envelope signal values, the grid voltage value of peak amplifier efficient operation are also different, and general trend is that the envelope signal value diminishes, and the grid voltage value of peak amplifier efficient operation also diminishes; The envelope signal value is big more, and the grid voltage value of peak amplifier efficient operation also becomes greatly, guarantees that delivery efficiency is the highest under peak amplifier gains constant situation.The grid voltage value of peak amplifier is not fixed like this, but relevant with the envelope of the baseband signal of importing, and can make the peak amplifier real-time working at the high efficiency state like this by the variation of control-grid voltage value.This shows that real-time working has improved the efficient of peak amplifier at the high efficiency state to peak amplifier along with the envelope variation of input baseband signal.
In a preferred embodiment, as Fig. 4, described first signal processing unit can comprise the first envelope filter unit and first linear amplification unit, the input of the described first envelope filter unit is connected with the output of described envelope extraction unit, and the output of the described first envelope filter unit is connected with the gate terminal of described peak amplifier by described first linear amplification unit;
The described first envelope filter unit receives described envelope signal, it is carried out outputing to described first linear amplification unit after the Filtering Processing, and described first linear amplification unit is the grid voltage value of described peak amplifier work according to the grid voltage value parameter of the described peak amplifier envelope signal processing and amplifying after with described Filtering Processing.This first linear amplification unit is to adjust multiplication factor according to the grid voltage value parameter scope of peak amplifier, so that the output effect of described peak amplifier reaches the highest in real time according to the variation of importing the baseband signal envelope, can improve the output effect of peak amplifier like this.
In a preferred embodiment, as Fig. 6, described secondary signal processing unit can comprise second look-up table unit, the second grid voltage value processing unit, the input of described second look-up table unit is connected with the output of described envelope extraction unit, and the output of described second look-up table unit is connected with the gate terminal of described carrier amplifier by the described second grid voltage value processing unit;
Described second look-up table unit receives described envelope signal, export each digital grid voltage value successively according to its correspondence table of storing in advance, this each digital grid voltage value is converted to the grid voltage value of described peak amplifier work after through the digital-to-analogue conversion of the described second grid voltage value processing unit, processing and amplifying; The correspondence table that described second look-up table unit is stored in advance comprises the digital grid voltage value of the control described carrier amplifier efficiency operation corresponding with the envelope signal value.
Different envelope signal values, the grid voltage value of carrier amplifier efficient operation are also different, and general trend is that the envelope signal value diminishes, and the grid voltage value of carrier amplifier efficient operation also diminishes; The envelope signal value is big more, and the grid voltage value of carrier amplifier efficient operation also becomes greatly, guarantees that delivery efficiency is the highest under carrier amplifier gains constant situation.The grid voltage value of carrier amplifier is not fixed like this, but relevant with the envelope of the baseband signal of importing, and can make the carrier amplifier real-time working at the high efficiency state like this by the variation of control-grid voltage value.This shows that real-time working has improved the efficient of carrier amplifier at the high efficiency state to carrier amplifier along with the envelope variation of input baseband signal.
In a preferred embodiment, as Fig. 7, described secondary signal processing unit can comprise the second envelope filter unit and second linear amplification unit, the input of the described second envelope filter unit is connected with the output of described envelope extraction unit, and the output of the described second envelope filter unit is connected with the gate terminal of described carrier amplifier by described second linear amplification unit;
The described second envelope filter unit receives described envelope signal, it is carried out outputing to described second linear amplification unit after the Filtering Processing, and described second linear amplification unit is the grid voltage value of described carrier amplifier work according to the grid voltage value parameter of the described carrier amplifier envelope signal processing and amplifying after with described Filtering Processing.The multiplication factor of described second linear amplification unit is that the grid voltage value parameter according to carrier amplifier is provided with, guarantee to keep under the constant situation of gain at carrier amplifier, its linearisation of amplifying the signal of exporting is along with the variation of importing the baseband signal envelope reaches optimum in real time.Can improve the output signal linearityization of carrier amplifier like this.
In a preferred embodiment, digital pre-distorting power amplifier of the present utility model also comprises the time delay adjustment unit, (first signal processing unit comprises the first look-up table unit and the first grid voltage value processing unit in the figure as Figure 11, the secondary signal processing unit comprises the second look-up table unit and the second grid voltage value processing unit, the time delay adjustment unit is connected between the input of the output of described envelope extraction unit and described first look-up table unit and second look-up table unit), be connected between the input of the output of described envelope extraction unit and described first signal processing unit and described secondary signal processing unit, perhaps be connected between the input of the output of described envelope extraction unit and described first signal processing unit, perhaps be connected between the input of the output of described envelope extraction unit and described secondary signal processing unit, be used for described envelope signal is carried out delay process, so that the baseband signal of described input is through described envelope extraction unit, the baseband signal that outputs to time of gate terminal of described peak amplifier and described input after described first signal processing unit processes is through described pre-distortion unit, first D/A conversion unit, the up-conversion unit, power splitter is to the time synchronized of peak amplifier, so that the envelope variation of the baseband signal of the operating state of peak amplifier and input is synchronous, peak amplifier can be operated under the high efficiency state like this, improves the operating efficiency of peak amplifier; The baseband signal that the baseband signal that perhaps also can make described input outputs to time of gate terminal of described carrier amplifier and described input after through described envelope extraction unit, described first signal processing unit processes is through described pre-distortion unit, first D/A conversion unit, up-conversion unit, the power splitter time synchronized to carrier amplifier, so that the envelope variation of the baseband signal of the operating state of carrier amplifier and input is synchronous, improve the efficient of carrier amplifier work.
In a preferred embodiment, as Fig. 8, the utility model also comprises first filter and second filter, described first filter is connected between the input of the output of described up-conversion unit and described power splitter, and described second filter is connected between the input of the output of described first down-converter unit and described first AD conversion unit.Interference signal when first filter is used for the mixing of filtering up-conversion unit is to export pure radiofrequency signal to power splitter; Interference signal when second filter is used for the filtering first down-converter unit mixing outputs to first AD conversion unit with the purer analog signal of output.
In a preferred embodiment, also can handle in order to make digital pre-distorting power amplifier of the present utility model radiofrequency signal, improve the range of application of the utility model digital pre-distorting power amplifier, interface such as to put be in the equipment of radiofrequency signal so that the utility model can be applied to repeater, tower.As Fig. 9, the utility model can also comprise second down-converter unit, second AD conversion unit, Digital Down Convert unit; One end of described second down-converter unit is connected with the radiofrequency signal receiving terminal, and the other end is connected with described baseband signal receiving terminal by second AD conversion unit, Digital Down Convert unit successively;
Described second down-converter unit is down-converted to intermediate-freuqncy signal with the radiofrequency signal of input, again through the analog-to-digital conversion of described AD conversion unit, and the down-converted of Digital Down Convert unit after be converted to the zero intermediate frequency digital signal and output to described baseband signal receiving terminal.Wherein, the radiofrequency signal of input can be the radiofrequency signal of existing standard different frequency ranges such as WCDMA, CDMA/CDMA 2000, TD-SCDMA, WiMax, GSM, LTE.
In a preferred embodiment, as Figure 10, the utility model also comprises the 3rd filter, is connected between the input of the output of described second down-converter unit and described second AD conversion unit.Interference signal during with the described second down-converter unit mixing of filtering is exported purer analog signal to second AD conversion unit.The utility model can also comprise the peak clipping unit in addition, is connected between described Digital Down Convert unit and the described baseband signal receiving terminal, is used for the peak-to-average force ratio of described zero intermediate frequency digital signal is carried out the peak clipping processing.
The described first grid voltage value processing unit, in one embodiment, can comprise second D/A conversion unit, first envelope filtering and the linear amplification unit, the input of described second D/A conversion unit is connected with the output of the described first look-up table unit, and the output of described second D/A conversion unit is connected with the gate terminal of described peak amplifier by described first envelope filtering and linear amplification unit;
Each digital grid voltage value that described second D/A conversion unit will be imported successively is converted to simulation grid voltage value, outputs to the gate terminal of described peak amplifier after handling through Filtering Processing, the linear amplification of described first envelope filtering and linear amplification unit again.This first envelope filtering and linear amplification unit are adjusted multiplication factor according to the grid voltage value parameter scope of peak amplifier, so that the output effect of described peak amplifier reaches the highest in real time according to the variation of importing the baseband signal envelope, can improve the output effect of peak amplifier like this.
The described second grid voltage value processing unit, in one embodiment, can comprise the 3rd D/A conversion unit, second envelope filtering and the linear amplification unit, the input of described the 3rd D/A conversion unit is connected with the output of described second look-up table unit, and the output of described the 3rd D/A conversion unit is connected with the gate terminal of described carrier amplifier by described second envelope filtering and linear amplification unit;
Each digital grid voltage value that described the 3rd D/A conversion unit will be imported successively is converted to simulation grid voltage value, outputs to the gate terminal of described carrier amplifier after handling through Filtering Processing, the linear amplification of described second envelope filtering and linear amplification unit again.The multiplication factor of described second envelope filtering and linear amplification unit is that the grid voltage value parameter according to carrier amplifier is provided with, guarantee to keep under the constant situation of gain at carrier amplifier, its linearisation of amplifying the signal of exporting is along with the variation of importing the baseband signal envelope reaches optimum in real time.Can improve the output signal linearityization of carrier amplifier like this.
Below in conjunction with Figure 11 the utility model digital pre-distorting power amplifier is done a detailed elaboration to the step that the radiofrequency signal of input is handled in one embodiment.
After radiofrequency signal receives through antenna, enter the radiofrequency signal receiving terminal of digital pre-distorting power amplifier, these radiofrequency signals can be the radiofrequency signals of existing standard different frequency ranges such as WCDMA, CDMA/CDMA 2000, TD-SCDMA, WiMax, GSM, LTE;
The radiofrequency signal that the radiofrequency signal receiving terminal receives through the frequency mixer in second down-converter unit and local oscillator 1 and acting in conjunction after, export an intermediate-freuqncy signal, the frequency of this intermediate-freuqncy signal can be decided according to the real work situation, and this frequency of design is 92.16MHz among this embodiment;
The frequency of second down-converter unit output is the intermediate-freuqncy signal of 92.16MHz, adopts the 3rd filter to filter out its mirror image and disturbs, thus the purer intermediate-freuqncy signal of output.During specific implementation, the 3rd filter can adopt L, the design of C discrete devices or adopt the dedicated devices design;
To the purer intermediate-freuqncy signal of the 3rd filter output,, select second AD conversion unit for use based on the theory of software radio, determine its sample rate, sample rate is decided to be 122.88MSPS among this embodiment, the intermediate-freuqncy signal of 92.16MHz, becomes digital signal through after the analog-to-digital conversion;
The digital signal of second AD conversion unit output enters the Digital Down Convert unit, the Digital Down Convert unit determines that the numerical control local oscillator value of Digital Down Convert unit is 30.72MHz, and adopt 2 times to extract the drop data rate processing, output data rate is the zero intermediate frequency digital signal of 61.44MSPS.This part specific implementation can adopt special-purpose Digital Down Convert chip design or adopt field programmable logic device (FPGA) to realize;
The zero intermediate frequency data rate of Digital Down Convert unit output is the digital signal of 61.44MSPS, enters the peak clipping unit, becomes the lower zero intermediate frequency digital baseband signal of peak-to-average force ratio, is beneficial to the realization of back level Doherty power amplifier.During this part specific implementation, can adopt special-purpose crest to reduce chip, realize this function as GC1115, the PM7819 of PMC company of TI company, the OP5000 or the employing FPGA of OPTICHRON company;
The zero intermediate frequency digital signal of peak clipping unit output enters the digital pre-distortion unit, it is finished importing the predistortion of zero intermediate frequency digital signal by the control of digital predistortion adaptation controller, need carry out simultaneously the operation of 2X interpolation, make the signal after the predistortion output to next stage with the 122.88MSPS data rate in this unit.Digital pre-distortion unit specific implementation can adopt special chip, as the OP4400 of PM7810, the PM7815 of PMC company, PM7820 etc., the GC5322 of TI company, OPTICHRON company, also can adopt FPGA to realize;
Zero intermediate frequency digital signal after the pre-distortion enters first D/A conversion unit, and this unit is selected clock rate, thereby finished the conversion of digital signal to analog signal according to the speed of input data, the Simulation with I/Q signal of output zero intermediate frequency.In the specific implementation, adopt the 122.88MSPS clock rate, AD9788, the AD9779 of ADI company or DAC5687, the DAC5688 etc. of TI company can be selected in this unit;
Zero intermediate frequency Simulation with I, the Q signal of the output of first D/A conversion unit enter the up-conversion unit, behind frequency mixer and local oscillator 2 actings in conjunction in the up-conversion unit, are converted to radiofrequency signal.During specific implementation, the up-conversion unit can adopt special-purpose I/Q quadrature modulator to realize, as the ADL537X series of ADI company, the TRF3703 of TI company, the RF2483 of RFMD company etc.;
The radiofrequency signal of up-conversion unit output through first filter after, filter the second harmonic of radiofrequency signal, become purer radiofrequency signal.During specific implementation, first filter can adopt L, the design of C discrete devices or adopt the dedicated devices design;
The purer radiofrequency signal of first filter output through power splitter, is divided into the radiofrequency signal that two-way power equates, phase place is consistent.During specific implementation, power splitter can adopt the microstrip line design;
Wherein one road signal in the radiofrequency signal that two-way power equates after postponing through 1/4 wavelength of the first wavelength delay cell, becomes the radiofrequency signal after the delay.During specific implementation, the first wavelength retardance can design with microstrip line;
The radiofrequency signal of first wavelength delay cell output enters peak amplifier amplifies, and becomes the radiofrequency signal after the power amplification.During specific implementation, this peak amplifier can adopt power tube devices such as LDMOS, GaN;
Another road signal in the radiofrequency signal that two-way power equates, directly the incoming carrier amplifier amplifies, and becomes the radiofrequency signal after the power amplification;
Radiofrequency signal after amplifying through carrier amplifier is after handling through 1/4 wavelength of the second wavelength delay cell and the radiofrequency signal of peak amplifier after amplifying, in radio-frequency (RF) output end coupling back output together.During specific implementation, the second wavelength delay cell adopts the microstrip line design;
The zero intermediate frequency digital baseband signal of peak clipping unit output enters envelope extraction unit, calculates the envelope signal of digital signal.During specific implementation, can adopt FPGA in base band domain, based on formula
Wherein ENV represents the envelope signal that extracts, and I, Q represent the homophase and the orthogonal signalling of baseband signal respectively;
The envelope signal of envelope extraction unit output through the time delay adjustment unit, makes this envelope signal become the envelope signal that the time relatively lags behind, and in the specific implementation, the time delay adjustment unit can be in the inner realization of FPGA;
The envelope signal of the described first look-up table unit receive time delay adjustment unit output, export each digital grid voltage value successively according to its correspondence table of storing in advance, the correspondence table that the described first look-up table unit is stored in advance comprises the grid voltage value of the control described peak amplifier efficiency operation corresponding with the envelope signal value;
The envelope signal of second look-up table unit receive time delay adjustment unit output, export each digital grid voltage value successively according to its correspondence table of storing in advance, the correspondence table that described second look-up table unit is stored in advance comprises the grid voltage value of the control described carrier amplifier efficiency operation corresponding with the envelope signal value;
The digital grid voltage value of first look-up table unit output is finished the conversion of digital signal to analog signal through second D/A conversion unit in the first grid voltage value processing unit; This second D/A conversion unit adopts the 122.88MSPS clock rate, selects the AD9767 of ADI company for use;
The digital grid voltage value of second look-up table unit output is finished the conversion of digital signal to analog signal through the 3rd D/A conversion unit in the second grid voltage value processing unit; The 3rd D/A conversion unit also adopts the 122.88MSPS clock rate, selects the AD9767 of ADI company for use;
The simulation grid voltage value of second D/A conversion unit output, through first envelope filtering and the linear amplification unit in the first grid voltage value processing unit, the filtering high-frequency interferencing signal, and become the grid voltage value that is fit to the peak amplifier operate as normal after the processing and amplifying.During specific implementation, this first envelope filtering and linear amplification unit are to be core devices by the long-pending amplifier device of big Time Bandwidth at a high speed, mix peripheral L, the C device is realized, the long-pending amplifier device of at a high speed big here Time Bandwidth is selected the AD829 of ADI company for use;
The simulation grid voltage value of the 3rd D/A conversion unit output, through second envelope filtering and the linear amplification unit in the second grid voltage value processing unit, the filtering high-frequency interferencing signal, and become the grid voltage value that is fit to the carrier amplifier operate as normal after amplifying.During specific implementation, this second envelope filtering and linear amplification unit are to be core devices by the long-pending amplifier device of big Time Bandwidth at a high speed, mix peripheral L, the C device is realized, the long-pending amplifier device of at a high speed big here Time Bandwidth is selected the AD829 of ADI company for use;
The radiofrequency signal that coupler amplifies output with carrier amplifier and the peak amplifier output that is coupled, and extract a part of signal as feeding back radiofrequency signal.During specific implementation, this coupler adopts general 3dB electric bridge or microstrip coupled getting final product, and the size of concrete coupling value is decided according to the power of power amplifier output;
The feedback radiofrequency signal of coupler output through frequency mixer in first down-converter unit and local oscillator 3, after the acting in conjunction, makes the feedback radiofrequency signal be converted to the signal that IF-FRE is 92.16MHz.
The frequency of first down-converter unit output is the intermediate-freuqncy signal of 92.16MHz, and through second filter, the filtering mirror image disturbs, and becomes purer intermediate-freuqncy signal.During specific implementation, second filter can adopt L, C designs or adopt special-purpose filter device to realize;
Intermediate-freuqncy signal to the output of second filter, based on Software Radio Theory, first AD conversion unit is sampled to it, become digital signal, during specific implementation, the first AD conversion unit sampling rate is decided to be 122.88MSPS, can adopt the AD80142 of ADI company or the ADS5517 of TI company etc.;
The speed of first AD conversion unit output is the digital signal of 122.88MSPS, after entering the digital predistortion adaptation controller, by the digital predistortion adaptation controller, based on difference between digital signal of feeding back and the digital signal in the step 6, adjust pre-distortion parameters, upgrade the pre-distortion parameters of digital pre-distortion unit, realize the self-adapted pre-distortion processing capacity of power amplifier;
Because the envelope of peak amplifier grid voltage value, carrier amplifier grid voltage value and input signal is relevant, and during the digital pre-distorting power amplifier real work in the utility model, the envelope real time altering of radio-frequency input signals, cause also real time altering of peak amplifier grid voltage value and carrier amplifier grid voltage value, thereby make digital pre-distorting power amplifier in the utility model when raising the efficiency, also increased substantially the linear index of digital pre-distorting power amplifier.
In order further to improve the power amplifier and the linearisation of the digital pre-distorting power amplifier in this specific embodiment, in concrete the enforcement, 1. guarantee local oscillator 1, first AD conversion unit, second AD conversion unit, local oscillator 2, first D/A conversion unit, the work clock of 6 parts such as local oscillator 3 grades is from same clock source; 2. need preestablish input signal envelope in the first look-up table unit and the second look-up table unit and the relation between the digital grid voltage value, the first look-up table unit determines that principle is at each specific input signal envelope value place, by adjusting peak amplifier grid voltage value, digital pre-distorting power amplifier can kept under the constant substantially situation of gain, and it is the highest that efficient reaches.The second look-up table unit determine principle be at each specific input signal envelope value place by adjusting carrier amplifier grid voltage value, digital pre-distorting power amplifier can kept under the most effective situation, it is optimum that linearity reaches; 3. the two-way radiofrequency signal of power splitter output need be adjusted the first wavelength delay cell and the second wavelength delay cell according to actual conditions, makes this two-way radiofrequency signal when radio-frequency (RF) output end is coupled, and phase place equates; 4. need debugging time delay adjustment unit, make the zero intermediate frequency digital signal arrive the time of peak amplifier and the time basically identical that process envelope extraction unit, time delay adjustment unit, the first look-up table unit, second D/A conversion unit, the first envelope filtering and linear amplification unit arrive the gate terminal of peak amplifier, so that this two paths of signals is synchronous through digital pre-distortion unit, first D/A conversion unit, up-conversion unit, first filter, power splitter, the first wavelength delay cell.Simultaneously, to guarantee that also the zero intermediate frequency digital signal arrives the time of carrier amplifier and the time basically identical of process envelope extraction unit, time delay adjustment unit, second look-up table unit, the 3rd D/A conversion unit, the second envelope filtering and linear amplification unit through digital pre-distortion unit, first D/A conversion unit, up-conversion unit, first filter, power splitter, so that this two paths of signals is synchronous.
In addition, by the Digital Down Convert unit, the peak clipping unit, envelope extraction unit, the first look-up table unit, the second look-up table unit, the time delay adjustment unit, the common Digital Signal Processing part of forming of digital pre-distortion unit and digital predistortion adaptation controller, during concrete enforcement, can adopt a fpga chip to realize, perhaps Digital Down Convert unit, the peak clipping unit, envelope extraction unit, the first look-up table unit, the second look-up table unit, the time delay adjustment unit, the digital pre-distortion unit adopts a FPGA to realize, the digital predistortion adaptation controller adopts a DSP to realize.
Above-described the utility model execution mode does not constitute the qualification to the utility model protection range.Any modification of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the claim protection range of the present utility model.
Claims (10)
1. a digital pre-distorting power amplifier comprises digital pre-distortion unit, digital predistortion adaptation controller, first D/A conversion unit, up-conversion unit, power splitter, the first wavelength delay cell, peak amplifier, the second wavelength delay cell, coupler, carrier amplifier, first down-converter unit and first AD conversion unit;
The input of described digital pre-distortion unit is connected with the baseband signal receiving terminal, output is successively by described first D/A conversion unit, the up-conversion unit is connected with the input of described power splitter, one of them output of described power splitter is successively by the described first wavelength delay cell, peak amplifier is connected with the input of described coupler, another output of described power splitter is successively by described carrier amplifier, the second wavelength delay cell is connected between the input of described peak amplifier and coupler, an output of described coupler is successively by described first down-converter unit, an input of first AD conversion unit and described digital predistortion adaptation controller is connected, another input of described digital predistortion adaptation controller is connected with described baseband signal receiving terminal, and the output of described digital predistortion adaptation controller is connected with the control end of described digital pre-distortion unit;
It is characterized in that: also comprise the envelope extraction unit and first signal processing unit, an end of described envelope extraction unit is connected with described baseband signal receiving terminal, and the other end is connected with the gate terminal of described peak amplifier by described first signal processing unit;
Described envelope extraction unit is used to extract the envelope signal of the baseband signal of input, and described envelope signal outputed to described first signal processing unit, described first signal processing unit is treated to described envelope signal the grid voltage value of described peak amplifier work.
2. digital pre-distorting power amplifier according to claim 1, it is characterized in that: described first signal processing unit comprises the first look-up table unit, the first grid voltage value processing unit, the input of the described first look-up table unit is connected with the output of described envelope extraction unit, and the output of the described first look-up table unit is connected with the gate terminal of described peak amplifier by the described first grid voltage value processing unit;
The described first look-up table unit receives described envelope signal, export each digital grid voltage value successively according to its correspondence table of storing in advance, this each digital grid voltage value is converted to the grid voltage value of described peak amplifier work after through the digital-to-analogue conversion of the described first grid voltage value processing unit, processing and amplifying; The correspondence table that the described first look-up table unit is stored in advance comprises the digital grid voltage value of the control described peak amplifier efficiency operation corresponding with the envelope signal value.
3. digital pre-distorting power amplifier according to claim 1, it is characterized in that: described first signal processing unit comprises the first envelope filter unit and first linear amplification unit, the input of the described first envelope filter unit is connected with the output of described envelope extraction unit, and the output of the described first envelope filter unit is connected with the gate terminal of described peak amplifier by described first linear amplification unit;
The described first envelope filter unit receives described envelope signal, it is carried out outputing to described first linear amplification unit after the Filtering Processing, and described first linear amplification unit is the grid voltage value of described peak amplifier work according to the grid voltage value parameter of the described peak amplifier envelope signal processing and amplifying after with described Filtering Processing.
4. according to claim 1 or 2 or 3 described digital pre-distorting power amplifiers, it is characterized in that: also comprise the secondary signal processing unit, the one end is connected with the output of described envelope extraction unit, the other end is connected with the gate terminal of described carrier amplifier, is used for described envelope signal is treated to the grid voltage value of described carrier amplifier work.
5. digital pre-distorting power amplifier according to claim 4, it is characterized in that: described secondary signal processing unit comprises second look-up table unit, the second grid voltage value processing unit, the input of described second look-up table unit is connected with the output of described envelope extraction unit, and the output of described second look-up table unit is connected with the gate terminal of described carrier amplifier by the described second grid voltage value processing unit;
Described second look-up table unit receives described envelope signal, export each digital grid voltage value successively according to its correspondence table of storing in advance, this each digital grid voltage value is converted to the grid voltage value of described peak amplifier work after through the digital-to-analogue conversion of the described second grid voltage value processing unit, processing and amplifying; The correspondence table that described second look-up table unit is stored in advance comprises the digital grid voltage value of the control described carrier amplifier efficiency operation corresponding with the envelope signal value.
6. digital pre-distorting power amplifier according to claim 4, it is characterized in that: described secondary signal processing unit comprises the second envelope filter unit and second linear amplification unit, the input of the described second envelope filter unit is connected with the output of described envelope extraction unit, and the output of the described second envelope filter unit is connected with the gate terminal of described carrier amplifier by described second linear amplification unit;
The described second envelope filter unit receives described envelope signal, it is carried out outputing to described second linear amplification unit after the Filtering Processing, and described second linear amplification unit is the grid voltage value of described carrier amplifier work according to the grid voltage value parameter of the described carrier amplifier envelope signal processing and amplifying after with described Filtering Processing.
7. digital pre-distorting power amplifier according to claim 4, it is characterized in that: also comprise the time delay adjustment unit, be connected between the input of the output of described envelope extraction unit and described first signal processing unit, and/or be connected between the input of the output of described envelope extraction unit and described secondary signal processing unit, be used for described envelope signal is carried out delay process.
8. digital pre-distorting power amplifier according to claim 1, it is characterized in that: also comprise first filter and second filter, described first filter is connected between the input of the output of described up-conversion unit and described power splitter, and described second filter is connected between the input of the output of described first down-converter unit and described first AD conversion unit.
9. according to claim 1 or 2 or 3 or 8 described digital pre-distorting power amplifiers, it is characterized in that: also comprise second down-converter unit, second AD conversion unit, Digital Down Convert unit; One end of described second down-converter unit is connected with the radiofrequency signal receiving terminal, and the other end is connected with described baseband signal receiving terminal by second AD conversion unit, Digital Down Convert unit successively;
Described second down-converter unit is down-converted to intermediate-freuqncy signal with the radiofrequency signal of input, again through the analog-to-digital conversion of described AD conversion unit, and the Digital Down Convert of Digital Down Convert unit be converted to the zero intermediate frequency digital signal after handling and output to described baseband signal receiving terminal.
10. digital pre-distorting power amplifier according to claim 9, it is characterized in that: also comprise peak clipping unit and the 3rd filter, described peak clipping unit is connected between described Digital Down Convert unit and the described baseband signal receiving terminal, is used for the peak-to-average force ratio of described zero intermediate frequency digital signal is carried out the peak clipping processing; Described the 3rd filter is connected between the input of the output of described second down-converter unit and described second AD conversion unit.
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| CN2009200627667U CN201499134U (en) | 2009-08-21 | 2009-08-21 | Digital predistortion power amplifier |
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| CN2009200627667U CN201499134U (en) | 2009-08-21 | 2009-08-21 | Digital predistortion power amplifier |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102088427A (en) * | 2011-01-21 | 2011-06-08 | 上海交通大学 | Digital predistortion device and method |
| CN102594431A (en) * | 2011-12-08 | 2012-07-18 | 深圳市华为安捷信电气有限公司 | Tower mounted amplifier and antenna |
| CN101640516B (en) * | 2009-08-21 | 2012-09-26 | 京信通信系统（中国）有限公司 | Digital predistortion power amplifier and signal processing method thereof |
| CN103376403A (en) * | 2012-04-26 | 2013-10-30 | 京信通信系统（中国）有限公司 | Reliability testing system of digital pre-distortion power amplifier |
| CN109586677A (en) * | 2017-09-29 | 2019-04-05 | 华为技术有限公司 | Signal processing apparatus, multi input power amplifying system and correlation technique |
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2009
- 2009-08-21 CN CN2009200627667U patent/CN201499134U/en not_active Expired - Lifetime
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101640516B (en) * | 2009-08-21 | 2012-09-26 | 京信通信系统（中国）有限公司 | Digital predistortion power amplifier and signal processing method thereof |
| CN102088427A (en) * | 2011-01-21 | 2011-06-08 | 上海交通大学 | Digital predistortion device and method |
| CN102088427B (en) * | 2011-01-21 | 2013-07-03 | 上海交通大学 | Digital predistortion device and method |
| CN102594431A (en) * | 2011-12-08 | 2012-07-18 | 深圳市华为安捷信电气有限公司 | Tower mounted amplifier and antenna |
| CN102594431B (en) * | 2011-12-08 | 2014-07-09 | 深圳市华为安捷信电气有限公司 | Tower mounted amplifier and antenna |
| CN103376403A (en) * | 2012-04-26 | 2013-10-30 | 京信通信系统（中国）有限公司 | Reliability testing system of digital pre-distortion power amplifier |
| CN103376403B (en) * | 2012-04-26 | 2016-01-27 | 京信通信系统（中国）有限公司 | The reliability test system of digital pre-distorting power amplifier |
| CN109586677A (en) * | 2017-09-29 | 2019-04-05 | 华为技术有限公司 | Signal processing apparatus, multi input power amplifying system and correlation technique |
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