CN201497978U

CN201497978U - high-precision four-quadrant multiplier

Info

Publication number: CN201497978U
Application number: CN2009203050740U
Authority: CN
Inventors: 王振铎; 郑立登
Original assignee: FUJIAN STELCOM Co Ltd
Current assignee: Hao Tai Jieneng electrical equipment (Fujian) Co., Ltd.
Priority date: 2009-06-25
Filing date: 2009-06-25
Publication date: 2010-06-02
Anticipated expiration: 2019-06-25

Abstract

The utility model relates to a high-precision four-quadrant multiplier, which comprises a first path A/D converter, a second path A/D converter and a programmable logical gate FPGA. The multiplier is characterized in that the programmable logical gate FPGA includes a high pass filter (1), a high pass filter (2), a low pass filter, phase adjustment and a multiplier, the output end of the first path A/D converter is connected with the multiplier via the high pass filter (1), the output end of the second path A/D converter is connected with the multiplier sequentially through the high pass filter (2) and the phase adjustment, and the output end of the multiplier is connected with the low pass filter. By adopting devices of the programmable logical gate FPGA, the multiplier has the advantages of fully digitally realizing the functions of the high pass filters, the low pass filter, the phase adjustment and the high-precision multiplier, improving instantaneity and stability, simultaneously reducing used elements, achieving simple circuit and the like.

Description

The high precision four-quadrant multiplier

Technical field

The utility model relates to programmable logic device (PLD) digitizer process field, particularly relates to a kind of high precision four-quadrant multiplier in the electric energy measurement technology.

Background technology

In the electric energy measurement technical field, often need carry out multiplying and obtain power the voltage and current two paths of signals.In early days, adopt mimic channel to realize the product of two voltage and current signals, circuit complexity, poor reliability; Mid-term, development along with electronic technology and microprocessor, in order to overcome this shortcoming of mimic channel, use analog-to-digital conversion device (ADC) that simulating signal is quantified as digital signal, in microprocessor, realize high-pass filtering, low-pass filtering, phase place adjustment, multiplier, though this method can obtain higher precision in some occasion, because microprocessor exists time delay and hysteresis quality inevitably when handling the complex calculation method, in fast-changing application scenario, real-time reaches and does not require; Along with the development of scale programmable logic device FPGA, quantize the back signal through ADC and realize the high precision four-quadrant multiplier by the FPGA digital signal processing now, this method can obtain higher precision, timeliness and stability.

The accurate multiplier hardware theory diagram of a kind of high precision four-quadrant as shown in Figure 1 in the known technology, its input end first via simulating signal and the second tunnel simulating signal obtain the digital signal of higher-frequency through analog to digital converter, but in analog-digital conversion process, can introduce offset voltage, output spectrum as shown in Figure 2, output at analog to digital converter not only has line frequency signal like this, also has offset voltage, so this offset voltage that in the output result of multiplier, will superpose, brought the error that can not eliminate for the result of product of multiplier.

In order to eliminate this error, traditional technical scheme is added a Hi-pass filter HPF (as shown in Figure 3) between first passage analog to digital converter and multiplier, the output spectrum of first passage Hi-pass filter HPF as shown in Figure 4, frequency spectrum before the second channel multiplier still is shown in Figure 2, and the output of multiplier as shown in Figure 5, comprise the direct current product in the frequency spectrum, the line frequency component that the line frequency signal of second harmonic and first passage and the offset voltage of second channel multiply each other and obtain, but do not comprise extra offset voltage, line frequency component and 2 subharmonic can pass through low-pass filter LPH filtering.Because Hi-pass filter HPF generally uses IIR (infinite-duration impulse response) to realize, has introduced extra phase differential, can bring error to result of product so again.

Summary of the invention

In order to overcome the deficiency of above-mentioned technology, the purpose of this utility model provides a kind of high precision four-quadrant multiplier, and its circuit is simple, has higher real-time, stability.

The utility model is to realize like this, a kind of high precision four-quadrant multiplier, comprise first via A/D converter, the second road A/D converter and programmable gate array FPGA, it is characterized in that: described programmable gate array FPGA comprises Hi-pass filter [1] [2], low-pass filter, phase place adjustment and multiplier; The output terminal of described first via A/D converter links to each other with multiplier through Hi-pass filter [1], the output terminal of described the second road A/D converter passes through Hi-pass filter [2] successively, the phase place adjustment is connected with multiplier, and the output terminal of described multiplier links to each other with low-pass filter.

The utility model adopts programmable gate array FBGA device, total digitalization realizes Hi-pass filter, low-pass filter, phase place adjustment, high precision multiplier function, has improved real-time and stability, has had characteristics such as the components and parts of use are few, circuit is simple simultaneously.

Description of drawings

Fig. 1 is the hardware principle block diagram of the accurate multiplier of a kind of existing high precision four-quadrant.

Fig. 2 is Fig. 1 output spectrum synoptic diagram.

Fig. 3 is the hardware principle block diagram that Fig. 1 adds Hi-pass filter.

Fig. 4 is the output spectrum synoptic diagram of Fig. 3 first passage Hi-pass filter HPF.

Fig. 5 is the spectrum diagram of Fig. 3 multiplier output.

Fig. 6 is the hardware principle block diagram of the utility model embodiment one.

Fig. 7 is that detection signal is through embodiment one filtered spectrum diagram.

Embodiment

The present invention will be further described below in conjunction with drawings and Examples.

As shown in Figure 1, the utility model provides a kind of high precision four-quadrant multiplier, comprise first via A/D converter, the second road A/D converter and programmable gate array FPGA, it is characterized in that: described programmable gate array FPGA comprises Hi-pass filter [1] [2], low-pass filter, phase place adjustment and multiplier; The output terminal of described first via A/D converter links to each other with multiplier through Hi-pass filter [1], the output terminal of described the second road A/D converter passes through Hi-pass filter [2] successively, the phase place adjustment is connected with multiplier, and the output terminal of described multiplier links to each other with low-pass filter.

The described first via A/D converter and the second road A/D converter can be 16 bit pads.

As seen the utility model signal that will detect by sensor acquisition, be converted to digital signal later on through the A/D conversion chip, digital signal is imported in the fpga chip, fpga chip adopts the IIR digital filtering algorithm that input signal is handled, the back signal is handled in high-pass filtering delays time through FPGA program high precision and realizes the phase matching of two passages, with the coupling two paths of signals carry out multiplying, obtain the product of high-precision two paths of signals after low-pass filter, by the contrast of Fig. 5 and Fig. 7, we are analysis filtered effect intuitively just.

The utility model total digitalization realizes Hi-pass filter, low-pass filter, phase place adjustment, high precision multiplier function, has improved real-time and stability, has had characteristics such as the components and parts of use are few, circuit is simple simultaneously.

The above only is preferred embodiment of the present utility model, and all equalizations of being done according to the utility model claim change and modify, and all should belong to covering scope of the present utility model.

Claims

1. high precision four-quadrant multiplier, comprise first via A/D converter, the second road A/D converter and programmable gate array FPGA, it is characterized in that: described programmable gate array FPGA comprises Hi-pass filter [1] [2], low-pass filter, phase place adjustment and multiplier; The output terminal of described first via A/D converter links to each other with multiplier through Hi-pass filter [1], the output terminal of described the second road A/D converter passes through Hi-pass filter [2] successively, the phase place adjustment is connected with multiplier, and the output terminal of described multiplier links to each other with low-pass filter.

2. high precision four-quadrant multiplier according to claim 1 is characterized in that: described first via A/D converter is 16 bit A/D converters.

3. high precision four-quadrant multiplier according to claim 1 and 2 is characterized in that: described the second road A/D converter is 16 bit A/D converters.