CN201417297Y - Power management chip test device - Google Patents
Power management chip test device Download PDFInfo
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- CN201417297Y CN201417297Y CN2009201311394U CN200920131139U CN201417297Y CN 201417297 Y CN201417297 Y CN 201417297Y CN 2009201311394 U CN2009201311394 U CN 2009201311394U CN 200920131139 U CN200920131139 U CN 200920131139U CN 201417297 Y CN201417297 Y CN 201417297Y
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Abstract
The utility model belongs to the technical field of chip test, and provides a power management chip test device. The device comprises a probe stage for loading a chip to be tested; a probe card for acquiring electrical parameters of the chip to be tested; a test unit connected with the probe card, processing the chip according to the electrical parameters acquired by the probe card and outputtinga test result signal; a main control module respectively connected with the test unit and the probe stage for outputting a control signal according to the test result signal and controlling the movement of the probe stage; and a DC voltage stabilizing power module for providing power for the test unit and the main control module respectively. The power management chip test device is used for testing the power management chip, and has the advantages of simple and convenient operation and low cost for manufacturers only producing the power management chips.
Description
Technical field
The utility model belongs to the technical field of chip testing, relates in particular to a kind of power management chip proving installation.
Background technology
Along with the prosperity of IC design industry, make that society is also increasing to the demand of chip testing, be a ring in the IC industrial chain to chip testing, also be the key that the integrated circuit (IC) products checking is dispatched from the factory.
At present, also do not develop the proving installation of testing at power management chip specially, thus all adopt universal test device that power management chip is tested now, like this for the manufacturer who only produces power management chip, not only complicated operation, inconvenience, and cost is higher.
The utility model content
The purpose of this utility model is to provide a kind of power management chip proving installation, is intended to solve the problem of not developing specially the proving installation of testing at power management chip now.
The utility model is achieved in that a kind of power management chip proving installation, and described device comprises:
Be used to load the probe station of chip under test;
The pin card that the electric parameter of chip under test is gathered;
With described pin card connection, handle the test cell of the signal that outputs test result according to the electric parameter of pin card collection;
The main control module that is connected with probe station with described test cell respectively according to described test result signal and export control signal, is controlled the displacement of described probe station;
Be respectively described test cell and main control module the D.C. regulated power supply module of power supply is provided;
Be connected with described main control module, be the load module of its input control signal; And
Be connected the display module that shows test results with described main control module;
In the said structure, described test cell comprises:
According to the electric parameter that described pin card is gathered, the engaged test module of output engaged test consequential signal;
According to the electric parameter that described pin card is gathered, the voltage/current test module of output voltage test result signal or testing current consequential signal;
According to the electric parameter that described pin card is gathered, the frequency test module of output frequency test result signal;
According to the electric parameter that described pin card is gathered, the reference voltage test module of output reference voltage test result signal;
According to the electric parameter that described pin card is gathered, the switching function test module of output switching function test result signal; And
According to the electric parameter that described pin card is gathered, the pulse width modulation frequency test module of output pulse width modulating frequency test result signal;
In the said structure, described device also comprises:
Repair the mode transfer piece with described D.C. regulated power supply module, pin card are connected with test cell respectively, the described test result signal of repairing the mode transfer piece according to described test cell generation, generate to proofread and correct described chip under test electric parameter repair tonal signal, and export to described chip under test by the pin card;
In the said structure, described main control module comprises:
Respectively with described D.C. regulated power supply module, test cell, display module and load module microprocessor linked; And
The TTL communicating circuit that is connected with probe station with described microprocessor respectively;
In the said structure, described microprocessor is the MSP430 single-chip microcomputer;
In the said structure, described load module is keyboard load module or touch-screen load module;
In the said structure, described display module is the LCD display module.
In the utility model, the power management chip proving installation is the proving installation of testing at power management chip specially, and this proving installation is for the manufacturer who only produces power management chip, and is not only simple, convenient, and reduced cost.
Description of drawings
Fig. 1 is the structural drawing of the power management chip proving installation that provides of the utility model embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Fig. 1 shows the structure of the power management chip proving installation that the utility model embodiment provides, and for convenience of explanation, only shows the part relevant with the utility model.
The power management chip proving installation comprises the probe station 100 that is used to load chip under test; The pin card 200 that the electric parameter of chip under test is gathered; Be connected with pin card 200, handle according to the electric parameter that pin card 200 is gathered, the test cell 300 of signal outputs test result, as the utility model one embodiment, test cell 300 comprises: according to the electric parameter that pin card 200 is gathered, and the engaged test module 301 of output engaged test consequential signal; According to the electric parameter that pin card 200 is gathered, the voltage/current test module 302 of output voltage test result signal or testing current consequential signal; According to the electric parameter that pin card 200 is gathered, the frequency test module 303 of output frequency test result signal; According to the electric parameter that pin card 200 is gathered, the reference voltage test module 304 of output reference voltage test result signal; According to the electric parameter that pin card 200 is gathered, the switching function test module 305 of output switching function test result signal; And the electric parameter of gathering according to pin card 200, the pulse width modulation frequency test module 306 of output pulse width modulating frequency test result signal.
The power management chip proving installation also comprises: the main control module 400 that is connected with probe station 100 with test cell 300 respectively, according to the test result signal and export control signal, the displacement of control probe station 100; Be respectively test cell 300 and main control module 400 the D.C. regulated power supply module 500 of power supply is provided; Be connected with main control module 400, be the load module 600 of its input control signal; Be connected the display module 700 that shows test results with main control module 400.
Wherein, main control module 400 comprises respectively and D.C. regulated power supply module 500, test cell 300, display module 700 and load module 600 microprocessor linked 401, and the TTL communicating circuit 402 that is connected with probe station 100 with microprocessor 401 respectively.As the utility model one embodiment, microprocessor 401 is the MSP430 single-chip microcomputer, and load module 600 is keyboard load module or touch-screen load module, and display module 700 is LCD display modules.
As the utility model one embodiment, the power management chip proving installation also comprise be connected with D.C. regulated power supply module 500, pin card 200 and test cell 300 respectively repair mode transfer piece 800, repair the test result signal that mode transfer piece 800 generates according to test cell 300, generate to proofread and correct chip under test electric parameter repair tonal signal, and export to chip under test by pin card 200.
The course of work of this power management chip proving installation is: pin card 200 is by the pin of contact chip under test, electric parameter to chip under test is gathered, the electric parameter that test cell 300 is gathered according to pin card 200 is handled, signal outputs test result, main control module 400 carries out computing according to the test result signal of test cell 300 outputs, the output control signal, control display module 700 shows test results, repair the test result signal that mode transfer piece 800 generates according to test cell 300, generate to proofread and correct chip under test electric parameter repair tonal signal, and export to chip under test by pin card 200.
By load module 600 is main control module 400 input control signals, can select test pattern, and moving of main control module 400 control probe stations 100 makes the power management chip proving installation to test different chip under test continuously.
In the utility model embodiment, the power management chip proving installation is the proving installation of testing at power management chip specially, this proving installation is for the manufacturer who only produces power management chip, and is not only simple, convenient, and reduced cost.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection domain of the present utility model.
Claims (7)
1, a kind of power management chip proving installation is characterized in that, described device comprises:
Be used to load the probe station of chip under test;
The pin card that the electric parameter of chip under test is gathered;
With described pin card connection, handle the test cell of the signal that outputs test result according to the electric parameter of pin card collection;
The main control module that is connected with probe station with described test cell respectively according to described test result signal and export control signal, is controlled the displacement of described probe station;
Be respectively described test cell and main control module the D.C. regulated power supply module of power supply is provided;
Be connected with described main control module, be the load module of its input control signal; And
Be connected the display module that shows test results with described main control module.
2, proving installation as claimed in claim 1 is characterized in that, described test cell comprises:
According to the electric parameter that described pin card is gathered, the engaged test module of output engaged test consequential signal;
According to the electric parameter that described pin card is gathered, the voltage/current test module of output voltage test result signal or testing current consequential signal;
According to the electric parameter that described pin card is gathered, the frequency test module of output frequency test result signal;
According to the electric parameter that described pin card is gathered, the reference voltage test module of output reference voltage test result signal;
According to the electric parameter that described pin card is gathered, the switching function test module of output switching function test result signal; And
According to the electric parameter that described pin card is gathered, the pulse width modulation frequency test module of output pulse width modulating frequency test result signal.
3, proving installation as claimed in claim 1 or 2 is characterized in that, described device also comprises:
Repair the mode transfer piece with described D.C. regulated power supply module, pin card are connected with test cell respectively, the described test result signal of repairing the mode transfer piece according to described test cell generation, generate to proofread and correct described chip under test electric parameter repair tonal signal, and export to described chip under test by the pin card.
4, proving installation as claimed in claim 3 is characterized in that, described main control module comprises:
Respectively with described D.C. regulated power supply module, test cell, display module and load module microprocessor linked; And
The TTL communicating circuit that is connected with probe station with described microprocessor respectively.
5, proving installation as claimed in claim 4 is characterized in that, described microprocessor is the MSP430 single-chip microcomputer.
6, proving installation as claimed in claim 1 is characterized in that, described load module is keyboard load module or touch-screen load module.
7, proving installation as claimed in claim 1 is characterized in that, described display module is the LCD display module.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN2009201311394U CN201417297Y (en) | 2009-04-29 | 2009-04-29 | Power management chip test device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN2009201311394U CN201417297Y (en) | 2009-04-29 | 2009-04-29 | Power management chip test device |
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CN201417297Y true CN201417297Y (en) | 2010-03-03 |
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CN2009201311394U Expired - Fee Related CN201417297Y (en) | 2009-04-29 | 2009-04-29 | Power management chip test device |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102567157A (en) * | 2011-12-30 | 2012-07-11 | 曙光信息产业股份有限公司 | Testing device of power sequence signal on computer |
CN103064012A (en) * | 2012-12-31 | 2013-04-24 | 深圳安博电子有限公司 | Chip detector for digital electronic watches |
CN104614662A (en) * | 2015-01-21 | 2015-05-13 | 矽力杰半导体技术(杭州)有限公司 | Test mode setting circuit and test mode setting method |
CN106526362A (en) * | 2016-10-25 | 2017-03-22 | 上海移远通信技术股份有限公司 | Test system of wireless communication module |
CN108205102A (en) * | 2016-12-20 | 2018-06-26 | 成都锐成芯微科技股份有限公司 | DC-DC power source conversion chip Auto-Test System and method |
-
2009
- 2009-04-29 CN CN2009201311394U patent/CN201417297Y/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102567157A (en) * | 2011-12-30 | 2012-07-11 | 曙光信息产业股份有限公司 | Testing device of power sequence signal on computer |
CN103064012A (en) * | 2012-12-31 | 2013-04-24 | 深圳安博电子有限公司 | Chip detector for digital electronic watches |
CN104614662A (en) * | 2015-01-21 | 2015-05-13 | 矽力杰半导体技术(杭州)有限公司 | Test mode setting circuit and test mode setting method |
CN104614662B (en) * | 2015-01-21 | 2017-05-24 | 矽力杰半导体技术(杭州)有限公司 | Test mode setting circuit and test mode setting method |
CN106526362A (en) * | 2016-10-25 | 2017-03-22 | 上海移远通信技术股份有限公司 | Test system of wireless communication module |
CN108205102A (en) * | 2016-12-20 | 2018-06-26 | 成都锐成芯微科技股份有限公司 | DC-DC power source conversion chip Auto-Test System and method |
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Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100303 Termination date: 20100429 |