CN201402983Y - Digitalized dynamic intelligent reactive-load compensating gear - Google Patents
Digitalized dynamic intelligent reactive-load compensating gear Download PDFInfo
- Publication number
- CN201402983Y CN201402983Y CN2009201376238U CN200920137623U CN201402983Y CN 201402983 Y CN201402983 Y CN 201402983Y CN 2009201376238 U CN2009201376238 U CN 2009201376238U CN 200920137623 U CN200920137623 U CN 200920137623U CN 201402983 Y CN201402983 Y CN 201402983Y
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- module
- intelligent reactive
- reactive power
- asvg
- governor circuit
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/10—Flexible AC transmission systems [FACTS]
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- Supply And Distribution Of Alternating Current (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The utility model relates to a digitalized dynamic intelligent reactive-load compensating gear which comprises an ASVG module and a master control circuit, and is characterized in that the master control circuit collects voltage and current signals of an electrified wire netting, the on-off of an inverter switching tube of the ASVG module is controlled by corresponding control signals generated through the analyzing and the processing of a central processing unit, direct current capacitance voltage is inversed to three-phase industrial frequency alternating current voltage, and after high-frequency fins are filtered by a low-pass filter, the three-phase industrial frequency alternating current voltage is overlapped on an electrified wire netting by a three-phase insulating transformer, thereby realizing dynamic intelligent reactive-load compensation.
Description
Technical field
The utility model relates to the dynamic passive compensation technical field, particularly a kind of digitlization dynamic and intelligent reactive power compensator.
Background technology
The ASVG control system be a kind of dynamically, reactive power compensation means flexibly, and this good performance realizes by real-time control just.Can the ASVG control system reach expection systems stabilisation voltage according to its operation principle, improve the effect of power factor (PF), except circuit system is reasonable in design, depends on the performance of controller to a great extent.Therefore, how the ASVG control system being controlled effectively, is very important problem during the ASVG control system is used.
Summary of the invention
The purpose of this utility model provides a kind of digitlization dynamic and intelligent reactive power compensator, and it controls the ASVG module accurately by governor circuit, realizes the dynamic and intelligent reactive power compensation to electrical network.
The utility model is to realize like this, a kind of digitlization dynamic and intelligent reactive power compensator, comprise ASVG module and governor circuit, it is characterized in that: described governor circuit is gathered voltage, the current signal of electrical network, produce the break-make of the inverter switching device pipe of control signal corresponding control ASVG module by central processing unit analysis, processing, with the dc capacitor voltage inversion is the three-phase main-frequency alternating voltage, again by behind the low pass filter filters out high frequency burr, be added on the electrical network by a three-phase isolation transformer.
Remarkable advantage of the present utility model is voltage, the current signal that can monitor electrical network at any time, and according to setting the dynamic and intelligent reactive power compensation of needs realization to electrical network, system stability reliably, has been saved the lot of manpower and material resources resource simultaneously.
Description of drawings
Fig. 1 is a schematic block circuit diagram of the present utility model.
Fig. 2 is the ASVG main circuit structure figure schematic diagram of the utility model embodiment.
Fig. 3 is the governor circuit schematic diagram of the utility model embodiment.
Embodiment
Below in conjunction with Figure of description and embodiment the utility model is described further.
As shown in Figure 1, the utility model provides a kind of digitlization dynamic and intelligent reactive power compensator, comprise ASVG module and governor circuit, it is characterized in that: described governor circuit is gathered voltage, the current signal of electrical network, produce the break-make of the inverter switching device pipe of control signal corresponding control ASVG module by central processing unit analysis, processing, with the dc capacitor voltage inversion is the three-phase main-frequency alternating voltage, again by behind the low pass filter filters out high frequency burr, be added on the electrical network by a three-phase isolation transformer.
The ASVG main circuit structure as shown in Figure 2 in the utility model preferred embodiment, the inverter of ASVG module is three-phase two level structures, break-make by PWM modulation technique control inverter switching tube, with the dc capacitor voltage inversion is the three-phase main-frequency alternating voltage, the high frequency burr that produces by low pass filter filters out modulation again is added on the electrical network by a three-phase isolation transformer at last.
As shown in Figure 3, governor circuit described in the utility model comprises: DSP central processing unit, A/D sampling module, data storage expansion module, LCD MODULE, keyboard input module and PWM hardware dead band time delay module.What deserves to be mentioned is, be connected to high-speed photoelectric coupler between the pwm signal output of governor circuit of the present utility model and the signal input end of ASVG, play a part to isolate and disturb, drive and amplify.Make high-tension circuit---inverter circuit and low-voltage circuit---governor circuit separates.
The design that output is isolated in the high speed optoelectronic coupling has following advantage:
1, in transmitting information by light, the good insulation preformance between importing and exporting, mutual non-inductive phenomenon, the noise of output is not passed to input signal source, the also unlikely output that influences of the noise of input, thereby can suppress noise effectively;
2, number transmission is unidirectional, and no-output is to the feedback phenomenon of input;
3, the driving force of enhancing signal.
In a word, system adopts digitlization DSP control circuit to control the ASVG module accurately in this preferred embodiment, realizes the digital dynamic intelligent powerless compensation to electrical network, and system stability is reliable, has saved the lot of manpower and material resources resource simultaneously.
The above only is preferred embodiment of the present utility model, and all equalizations of being done according to the utility model claim change and modify, and all should belong to covering scope of the present utility model.
Claims (6)
1. digitlization dynamic and intelligent reactive power compensator, comprise ASVG module and governor circuit, it is characterized in that: described governor circuit is gathered voltage, the current signal of electrical network, produce the break-make of the inverter switching device pipe of control signal corresponding control ASVG module by central processing unit analysis, processing, with the dc capacitor voltage inversion is the three-phase main-frequency alternating voltage, again by behind the low pass filter filters out high frequency burr, be added on the electrical network by a three-phase isolation transformer.
2. digitlization dynamic and intelligent reactive power compensator according to claim 1 is characterized in that: described governor circuit comprises central processing unit, A/D sampling module and data storage expansion module.
3. digitlization dynamic and intelligent reactive power compensator according to claim 2, it is characterized in that: described central processing unit is a dsp controller.
4. according to claim 1,2 or 3 described digitlization dynamic and intelligent reactive power compensators, it is characterized in that: described control signal is a pwm signal.
5. digitlization dynamic and intelligent reactive power compensator according to claim 4 is characterized in that: described governor circuit further comprises LCD MODULE, keyboard input module and PWM hardware dead band time delay module.
6. digitlization dynamic and intelligent reactive power compensator according to claim 5, it is characterized in that: be connected to high-speed photoelectric coupler between the pwm signal output of described governor circuit and the signal input end of ASVG, play a part to isolate and disturb, drive and amplify.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201376238U CN201402983Y (en) | 2009-04-14 | 2009-04-14 | Digitalized dynamic intelligent reactive-load compensating gear |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201376238U CN201402983Y (en) | 2009-04-14 | 2009-04-14 | Digitalized dynamic intelligent reactive-load compensating gear |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201402983Y true CN201402983Y (en) | 2010-02-10 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009201376238U Expired - Fee Related CN201402983Y (en) | 2009-04-14 | 2009-04-14 | Digitalized dynamic intelligent reactive-load compensating gear |
Country Status (1)
| Country | Link |
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| CN (1) | CN201402983Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101944841A (en) * | 2010-09-21 | 2011-01-12 | 电子科技大学 | Inversion control digital filter |
-
2009
- 2009-04-14 CN CN2009201376238U patent/CN201402983Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101944841A (en) * | 2010-09-21 | 2011-01-12 | 电子科技大学 | Inversion control digital filter |
| CN101944841B (en) * | 2010-09-21 | 2012-10-03 | 电子科技大学 | Inversion control digital filter |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100210 Termination date: 20170414 |
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| CF01 | Termination of patent right due to non-payment of annual fee |