CN203014387U - Cascade type static var generator control circuit board based on DSP and FPGA - Google Patents

Cascade type static var generator control circuit board based on DSP and FPGA Download PDF

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Publication number
CN203014387U
CN203014387U CN2012207436573U CN201220743657U CN203014387U CN 203014387 U CN203014387 U CN 203014387U CN 2012207436573 U CN2012207436573 U CN 2012207436573U CN 201220743657 U CN201220743657 U CN 201220743657U CN 203014387 U CN203014387 U CN 203014387U
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circuit
optical
dsp
fpga
electrical
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罗安
刘雷
熊桥坡
黎小聪
刘芸
寇磊
刘爱文
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Hunan University
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Hunan University
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/10Flexible AC transmission systems [FACTS]

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  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

The utility model discloses a cascade type static var generator control circuit board based on DSP (Digital Signal Processor) and FPGA (Field Programmable Gate Array), comprising a comprehensive control board arranged at a low potential side and a plurality of driving expansion boards arranged at a high potential side and near a cascade unit; wherein the comprehensive control board is connected with the driving expansion boards through optical fibers, the each driving expansion board is connected with two drive boards through flat cables. The cascade type static var generator control circuit board of the utility model realizes complete electrical isolation of high and low potentials, effectively avoids electromagnetic interference to a control circuit caused by a complicated electromagnetic environment of a main circuit portion of a cascade inversion unit, and raises safety and stability of a system.

Description

A kind of cascade connection type static reacance generator control circuit board based on DSP and FPGA
Technical field
The utility model relates to the static reacance generator in electric power system, particularly a kind of control circuit of cascade connection type static reacance generator.
Background technology
In recent years, in the high-power application, many level power converter technique has obtained paying close attention to widely.The conventional full bridge inverter applications is when the high pressure occasion, come the large electric current of output HIGH voltage different from the connection in series-parallel of adopting power device, novel H bridge cascaded inverter does not need a large amount of clamping diodes and striding capacitance, each modular structure is identical, be easy to modularization and assembling, bear under lower voltage condition at each power device and can access higher Voltage-output, adopt advanced and mature pulse width modulation (PWM) technology can effectively suppress and eliminate low-order harmonic, need not to adopt output filter just can obtain the good output of waveform.
The control circuit of existing cascade connection type static reacance generator is not realized the complete electrical isolation of high electronegative potential, therefore can not effectively avoid the electromagnetic environment of cascade inverter main circuit some of complex to the electromagnetic interference of control circuit.
Summary of the invention
Technical problem to be solved in the utility model is, not enough for prior art, a kind of cascade connection type static reacance generator control circuit board based on DSP and FPGA is provided, realize the complete electrical isolation of high electronegative potential, effectively avoid the electromagnetic environment of cascade inverter main circuit some of complex to the electromagnetic interference of control circuit.
for solving the problems of the technologies described above, the technical scheme that the utility model adopts is: a kind of cascade connection type static reacance generator control circuit board based on DSP and FPGA, comprise integrated control panel and some driving expansion board, described integrated control panel is connected with described driving expansion board by optical fiber, described every driving expansion board is connected with two drive plates by flat cable, is integrated with dsp processor on described integrated control panel, FPGA, the voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit, hardware protection circuit is integrated with four optical-electrical converters on described driving expansion board, electrical to optical converter, power amplification unit and logical block, described voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit is connected with described dsp processor, described fault locking pulse circuit for generating, hardware protection circuit all with described voltage sampling circuit, current sampling circuit connects, and described hardware protection circuit is connected with described fault locking pulse circuit for generating, described dsp processor is connected with described FPGA, described FPGA is connected with the first optical-electrical converter, the second optical-electrical converter by optical fiber, described dsp processor is connected with the 3rd optical-electrical converter, the 4th optical-electrical converter, electrical to optical converter by optical fiber, described the first optical-electrical converter, the 3rd optical-electrical converter access the first drive plate, described the second optical-electrical converter, the 4th optical-electrical converter access the second drive plate, described electrical to optical converter is connected with two drive plates by power amplification unit, logical block successively.
As preferred version, described voltage zero-cross capture circuit comprises voltage transmitter, filter circuit, amplitude limiter circuit, the voltage comparator that connects successively.
Described voltage sampling circuit comprises Hall element, sampling resistor, in-phase proportion amplifying circuit, the modulus conversion chip that connects successively.
Described current sampling circuit comprises Hall element, sampling resistor, in-phase proportion amplifying circuit, the modulus conversion chip that connects successively.
Described hardware protection circuit comprises comparator, photoelectric isolated chip, CD4071 chip, the photoelectrical coupler that connects successively.
Described fault locking pulse circuit for generating comprises successively the latch that connects, two CD4071 chips, power amplification circuit.
compared with prior art, the beneficial effect that the utility model has is: the utility model adopts the integrated control circuit plate that is positioned at low-pressure side and is positioned on high-tension side driving expansion board two-part structure, integrated control panel is completed the transmission of data sampling calculating and trigger impulse, the driving expansion board is completed the opto-electronic conversion to trigger impulse and locking pulse signal, comprehensive and the electric light conversion of IGBT module SO signal (fault-signal), realized the complete electrical isolation of high electronegative potential, effectively avoided the electromagnetic environment of cascade inverter main circuit some of complex to the electromagnetic interference of control circuit, the DSP locking signal passes to hot side by optical fiber from the integrated control panel of low potential side through optical branching device and drives expansion board, not only reduced the quantity of electrical to optical converter on the integrated control panel, reduced the volume of control board, saved cost, more make consistency and the simultaneity of locking signal significantly strengthen, improved Security of the system and stability.
Description of drawings
Fig. 1 is the utility model one embodiment cascade connection type static reacance generator control circuit board structure chart;
Fig. 2 is the utility model one embodiment integrated control circuit plate structure schematic diagram;
Fig. 3 is that the utility model one embodiment electrical network phase voltage zero passage capture circuit is realized block diagram;
Fig. 4 is that the utility model one embodiment voltage sampling circuit is realized block diagram;
Fig. 5 is that the utility model one embodiment current sampling circuit is realized block diagram;
Fig. 6 is that the utility model one embodiment hardware protection circuit is realized block diagram;
Fig. 7 is that the utility model one embodiment fault locking pulse transtation mission circuit is realized block diagram;
Fig. 8 is that the utility model one embodiment drives the expansion board structural representation;
Fig. 9 is DSP modular program flow chart;
Figure 10 is FPGA modular program block diagram.
Embodiment
as Fig. 1, Fig. 2 and shown in Figure 8, the utility model one embodiment comprises integrated control panel and some driving expansion board, described integrated control panel is connected with described driving expansion board by optical fiber, described every driving expansion board is connected with two drive plates by flat cable, be integrated with dsp processor on described integrated control panel, FPGA, the voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit, hardware protection circuit, be integrated with four optical-electrical converters on described driving expansion board, electrical to optical converter, power amplification unit and logical block, described voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit is connected with described dsp processor, described fault locking pulse circuit for generating, hardware protection circuit all with described voltage sampling circuit, current sampling circuit connects, described hardware protection circuit is connected with described fault locking pulse circuit for generating, described dsp processor is connected with described FPGA, described FPGA is connected with the first optical-electrical converter, the second optical-electrical converter by optical fiber, described dsp processor is connected with the 3rd optical-electrical converter, the 4th optical-electrical converter, electrical to optical converter by optical fiber, described the first optical-electrical converter, the 3rd optical-electrical converter access the first drive plate, described the second optical-electrical converter, the 4th optical-electrical converter access the second drive plate, described electrical to optical converter is connected with two drive plates by power amplification unit, logical block successively.
As shown in Figure 3, described voltage zero-cross capture circuit comprises voltage transmitter, RC filter circuit, anti-paralleled diode amplitude limiter circuit, the LM393 voltage comparator that connects successively.The voltage zero-cross capture circuit is realized catching of electrical network phase voltage synchronizing signal zero crossing in this module.The electrical network phase voltage is that 220/5 AC/AC voltage transformer is by RC filter filtering high-frequency harmonic through no-load voltage ratio, again through the anti-paralleled diode amplitude limit, be connected to the negative input end (positive input terminal ground connection) of comparator LM393, LM393 output is realized drawing on level through the 4.7K pull-up resistor by 3.3V voltage, skip signal (signal rising edge) on DSP external interrupt pin detection LM393 input pin namely captures the zero crossing of line voltage, and the phase place hysteresis that is caused by the RC filter compensates in primary control program.
As shown in Figure 4, it is the Hall voltage transducer of CHV-50P/400A that model is adopted in the dc voltage sampling, amount of exports definite value 25mA, corresponding former limit rated voltage 400V sends into the AD7656 modulus conversion chip through the sampling resistor of 200 Ω and the in-phase proportion amplifier of 8/3 times.
As shown in Figure 5, it is the Hall current sensor of LT108-S7 that inverter output AC current sample adopts model, the specified effective value electric current of secondary 50mA, corresponding former limit specified effective value electric current 100A sends into the AD7656 modulus conversion chip through the sampling resistor of 51 Ω and the in-phase proportion amplifier of 7.2 times.
As shown in Figure 6; set dc voltage protection value by potentiometer; itself and DC side sample voltage value are connected to respectively the positive-negative input end of comparator LM393; comparator is exported by 4504 light every sending into rear level logic circuit; realize the isolation of analog circuit and digital circuit; six road dc voltages carry out logic synthesis respectively through after relatively through CD4071 or door, drive the relay trip protection finally by optocoupler TIL113.
As shown in Figure 7, receive respectively six by six RX HFBR-2412TZ optical-electrical converters on integrated control panel and drive six road SO signals that expansion board sends.Because SO output fault-signal is an electric pulse; in order accurately to capture this pulse; use CD4013 to export one when the SO down pulse arrives and stablize high level; carry out logic synthesis through CD4071 or door; form total SO signal; this signal with form total locking pulse signal from locking signal and the DC side overvoltage protection signal synthesis of DSP; carry out being connected to optical branching device after power amplification through triode 2N5551; one the tunnel divides six the tunnel, is sent to respectively six cascade unit with lockout switch device IGBT via multimode fiber.
Referring to Fig. 7, drive expansion board and receive PWM drive pulse signal and the fault locking signal that integrated control panel is brought by optical fiber transmission, convert light signal to the signal of telecommunication by optical-electrical converter RX HFBR-2412TZ, then deliver to respectively INA and the INB port of IGBT drive plate through flat cable; The two-way SO fault-signal of every drive plate drives expansion board through the flat cable access, carry out comprehensively through CD4071 or gate logic, sending into TX HFBR-1414TZ electrical to optical converter after triode 2N5551 carries out power amplification converts light signal to and passes to integrated control panel again, after doing this processing, as long as any module produces the SO fault-signal, whole device all can produce and block operation, and security performance is promoted.
The modular structure of systems soft ware as shown in Figure 9 and Figure 10.Mainly comprise DSP part and FPGA part software.Systems soft ware adopts dsp program software Code Composer Studio v3.3 and FPGA programming software Quartus II 9.0 to unite and writes, moves realization.The basic function of two large modules is as follows:
(1) DSP part software module
DSP part software is mainly completed is sampling to six road dc voltages and the cascade connection type static reacance generator output current of six cascade unit modules, in controlling subprogram, control and the control of current inner loop dead beat through outer voltage PI, calculate that the balance that realizes overall dc voltage is controlled, the equilibrium control of individual module dc voltage and the output current accurate required instruction modulation wave signal of trace command electric current in real time, and this signal is sent to the FPGA module with the frequency of 8000Hz.
(2) FPGA part software module
What FPGA part software was mainly completed is that the clock signal that produces 8000Hz sends the interrupt request singal of instruction modulation wave signal as the DSP module, receive the instruction modulation wave signal that the DSP module sends over, compare rear generation multi-channel PWM start pulse signal with six tunnel phase shift triangular carriers that self produce.
Dsp chip adopts fixed point type TMS320F2812 DSP, not only computational speed is fast, low in energy consumption, low price, and can carry out the floating-point operation add the IQmath library file in controlling software systems after, greatly simplify calculation procedure, thereby made primary control program more be absorbed in signal real-time sampling and computing, greatly improved system effectiveness.
fpga chip adopts Cyclone II family chip EP2C5Q208, carry out plus-minus counting by a plurality of counter modules in inside with different initial values and certain clock rate, thereby obtaining the multichannel amplitude equates and the different phase shift triangular carrier of phase place, after the instruction modulation wave signal that sends over the DSP module compares, obtain the multi-channel PWM start pulse signal, not only solve DSP and can not produce the problem of enough PWM ripple ways because independent timer is not enough, but and the parallel processing of fpga chip and the advantage of I/O mouth flexible configuration have been given full play to, make the structure of whole system more reasonable, efficient significantly improves.

Claims (6)

1. cascade connection type static reacance generator control circuit board based on DSP and FPGA, it is characterized in that, comprise integrated control panel and some driving expansion board, described integrated control panel is connected with described driving expansion board by optical fiber, described every driving expansion board is connected with two drive plates by flat cable, is integrated with dsp processor on described integrated control panel, FPGA, the voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit, hardware protection circuit is integrated with four optical-electrical converters on described driving expansion board, electrical to optical converter, power amplification unit and logical block, described voltage zero-cross capture circuit, fault locking pulse circuit for generating, voltage sampling circuit, current sampling circuit is connected with described dsp processor, described fault locking pulse circuit for generating, hardware protection circuit all with described voltage sampling circuit, current sampling circuit connects, and described hardware protection circuit is connected with described fault locking pulse circuit for generating, described dsp processor is connected with described FPGA, described FPGA is connected with the first optical-electrical converter, the second optical-electrical converter by optical fiber, described dsp processor is connected with the 3rd optical-electrical converter, the 4th optical-electrical converter, electrical to optical converter by optical fiber, described the first optical-electrical converter, the 3rd optical-electrical converter access the first drive plate, described the second optical-electrical converter, the 4th optical-electrical converter access the second drive plate, described electrical to optical converter is connected with two drive plates by power amplification unit, logical block successively.
2. the cascade connection type static reacance generator control circuit board based on DSP and FPGA according to claim 1, is characterized in that, described voltage zero-cross capture circuit comprises voltage transmitter, filter circuit, amplitude limiter circuit, the voltage comparator that connects successively.
3. the cascade connection type static reacance generator control circuit board based on DSP and FPGA according to claim 1, it is characterized in that, described voltage sampling circuit comprises Hall element, sampling resistor, in-phase proportion amplifying circuit, the modulus conversion chip that connects successively.
4. the cascade connection type static reacance generator control circuit board based on DSP and FPGA according to claim 1, it is characterized in that, described current sampling circuit comprises Hall element, sampling resistor, in-phase proportion amplifying circuit, the modulus conversion chip that connects successively.
5. the cascade connection type static reacance generator control circuit board based on DSP and FPGA according to claim 1, is characterized in that, described hardware protection circuit comprises comparator, photoelectric isolated chip, CD4071 chip, the photoelectrical coupler that connects successively.
6. the cascade connection type static reacance generator control circuit board based on DSP and FPGA according to claim 1, is characterized in that, described fault locking pulse circuit for generating comprises successively the latch that connects, two CD4071 chips, power amplification circuit.
CN2012207436573U 2012-12-31 2012-12-31 Cascade type static var generator control circuit board based on DSP and FPGA Expired - Lifetime CN203014387U (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103926477A (en) * 2014-04-21 2014-07-16 国家电网公司 Network voltage synchronous signal processing method
CN104269863A (en) * 2014-10-17 2015-01-07 佛山市顺德区胜业电气有限公司 Multiple medium-capacity static var generator
CN104467363A (en) * 2014-12-10 2015-03-25 天水电气传动研究所有限责任公司 High-power supply power converter
CN104967288A (en) * 2015-06-17 2015-10-07 中国科学院等离子体物理研究所 High-voltage pulse power supply IGBT drive cabinet
CN111600387A (en) * 2020-05-26 2020-08-28 新风光电子科技股份有限公司 Communication system and method for oil-immersed cascade SVG
CN112947282A (en) * 2021-03-08 2021-06-11 电子科技大学 Design of novel isolation unit applied to power gating FPGA structure
CN115047786A (en) * 2022-07-06 2022-09-13 常州中海电力科技有限公司 Multi-module cascade type power grid simulator control system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103926477A (en) * 2014-04-21 2014-07-16 国家电网公司 Network voltage synchronous signal processing method
CN104269863A (en) * 2014-10-17 2015-01-07 佛山市顺德区胜业电气有限公司 Multiple medium-capacity static var generator
CN104467363A (en) * 2014-12-10 2015-03-25 天水电气传动研究所有限责任公司 High-power supply power converter
CN104967288A (en) * 2015-06-17 2015-10-07 中国科学院等离子体物理研究所 High-voltage pulse power supply IGBT drive cabinet
CN111600387A (en) * 2020-05-26 2020-08-28 新风光电子科技股份有限公司 Communication system and method for oil-immersed cascade SVG
CN111600387B (en) * 2020-05-26 2021-09-24 新风光电子科技股份有限公司 Communication system and method for oil-immersed cascade SVG
WO2021237861A1 (en) * 2020-05-26 2021-12-02 新风光电子科技股份有限公司 Communication system for oil-immersed cascaded svg, and method
CN112947282A (en) * 2021-03-08 2021-06-11 电子科技大学 Design of novel isolation unit applied to power gating FPGA structure
CN115047786A (en) * 2022-07-06 2022-09-13 常州中海电力科技有限公司 Multi-module cascade type power grid simulator control system

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Granted publication date: 20130619

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