CN201332386Y - Signal amplifier circuit - Google Patents
Signal amplifier circuit Download PDFInfo
- Publication number
- CN201332386Y CN201332386Y CNU2008202240160U CN200820224016U CN201332386Y CN 201332386 Y CN201332386 Y CN 201332386Y CN U2008202240160 U CNU2008202240160 U CN U2008202240160U CN 200820224016 U CN200820224016 U CN 200820224016U CN 201332386 Y CN201332386 Y CN 201332386Y
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- pin
- resistance
- capacitor
- operational amplifier
- electric capacity
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Abstract
The utility model relates to a signal amplifier circuit, comprising a first-stage amplifier circuit and a second-stage amplifier circuit, which are electronically connected, wherein the first-stage amplifier circuit comprises a first operational amplifier, a second operational amplifier, a first resistance, a second resistance, a third resistance, a fourth resistance, a fifth resistance, a sixth resistance, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a eighth capacitor and a ninth capacitor, and the third pin of the first operational amplifier is connected with an input end through the first resistance; the third capacitor is connected between a eighth pin and a fifth pin, and the fourth capacitor is connected between a first pin and the fifth pin; the second resistance is connected between a second pin and a sixth pin in parallel, and the third pin of the second operational amplifier is connected with the input end through the fourth resistance; the eighth capacitor is connected between the eighth pin and the fifth pin, and the ninth capacitor is connected between the first pin and the fifth pin; the fifth resistance is connected between the second pin and the sixth pin in parallel; and the sixth pin is grounded through the sixth resistance and the fifth capacitor. The first-stage amplifier circuit can effectively suppress noise and other interference signals, and a third operational amplifier serving as both a differential operational amplifier and a low pass filter has better effect for the chopping noise and other interference signal mechanisms; two stages of amplifier circuits are matched to improve the common mode rejection ratio of the overall circuit.
Description
Technical field
The utility model relates to a kind of signal amplification circuit, belongs to electronic technology field.
Background technology
In the gas analysis industry, the gas analyzer signal of sensor is very faint, be further processed again after needing the process amplifying circuit that it is amplified, common amplifying circuit is provided with the one stage signal amplifying circuit, what also have is provided with the second signal amplifying circuit, but the antijamming capability of these circuit is poor, can not suppress interference signals such as noise effectively, and the common-mode rejection ratio of entire circuit is lower.
The utility model content
Problem to be solved in the utility model is at above problem, and the signal amplification circuit that a kind of antijamming capability is strong, common-mode rejection ratio is high is provided.
For achieving the above object, the technical scheme that the utility model adopted is: signal amplification circuit, it is characterized in that: described amplifying circuit comprises the one-level amplifying circuit and the second amplifying circuit of electrical connection, and the one-level amplifying circuit comprises first operational amplifier and second operational amplifier and the 1st resistance to the 6 resistance, the 1st electric capacity to the 9 electric capacity;
3 pin of first operational amplifier connect input through the 1st resistance, connect the 3rd electric capacity between 8 pin and 5 pin, connect the 4th electric capacity between 1 pin and 5 pin, connect the 2nd resistance in parallel between 2 pin and 6 pin;
3 pin of second operational amplifier connect input through the 4th resistance, connect the 8th electric capacity between 8 pin and 5 pin, connect the 9th electric capacity between 1 pin and 5 pin, connect the 5th resistance in parallel between 2 pin and 6 pin, and 6 pin are through the 6th resistance and the 5th capacity earth;
Connect the 3rd resistance between 2 pin of second operational amplifier and 2 pin of first operational amplifier.
A kind of concrete prioritization scheme of one-level amplifying circuit, the 2nd resistance is parallel with the 10th electric capacity, and the 5th resistance is parallel with the 11st electric capacity.
The prioritization scheme of technique scheme, second amplifying circuit comprises the 3rd operational amplifier, the 7th resistance to the 9 resistance and the 12nd electric capacity to the 15 electric capacity, 2 pin of the 3rd operational amplifier connect the 7th resistance, the 8th resistance and the 12nd electric capacity, the other end of the 7th resistance connects 6 pin and the 13rd electric capacity of first operational amplifier, the other end of the 8th resistance connects 6 pin of the 3rd operational amplifier and the other end of the 13rd electric capacity, another termination the 5th electric capacity and ground connection of the 12nd electric capacity, 3 pin of the 3rd operational amplifier are through the 9th grounding through resistance, connect the 14th electric capacity between 8 pin and 5 pin, connect the 15th electric capacity between 1 pin and 5 pin.
The utility model adopts technique scheme, and the one-level amplifying circuit selects for use two operational amplifiers to form differential amplifier circuit, can effectively suppress interference signals such as noise; Be parallel with an electric capacity respectively on 2 pin of first operational amplifier and second operational amplifier and the resistance between 6 pin, can effectively suppress self-oscillation; Again as low pass filter, it is better that copped wave noise and other interference signals are suppressed effect in as the difference amplifier for the 3rd operational amplifier; The two-stage amplifying circuit cooperates, and has improved the common-mode rejection ratio of entire circuit.
The utility model is described in further detail below in conjunction with drawings and Examples.
Description of drawings
Accompanying drawing 1 is the structural representation of the utility model embodiment.
Embodiment
Embodiment, as shown in Figure 1, signal amplification circuit, comprise one-level amplifying circuit and second amplifying circuit, the one-level amplifying circuit comprises that model is the first operational amplifier U1 and the second operational amplifier U2 and the 1st resistance R 1 to the 6th resistance R 6 of ICL7650, the 1st capacitor C 1 to the 11st capacitor C 11,3 pin of the first operational amplifier U1 meet input V2 through the 1st resistance R 1, the two ends of the 1st resistance R 1 are respectively through the 1st capacitor C 1 and the 2nd capacitor C 2 ground connection, connect the 3rd capacitor C 3 between 8 pin of the first operational amplifier U1 and 5 pin, connect the 4th capacitor C 4 between 1 pin and 5 pin, 7 pin connect+the 5V power supply, 4 pin connect-the 5V power supply, connect the 2nd resistance R 2 and the 10th capacitor C 10 in parallel between 2 pin and 6 pin, 3 pin of the second operational amplifier U2 meet input V1 through the 4th resistance R 4, the 4th resistance R 4 two ends are respectively through the 6th capacitor C 6 and the 7th capacitor C 7 ground connection, connect the 8th capacitor C 8 between 8 pin of the second operational amplifier U2 and 5 pin, connect the 9th capacitor C 9 between 1 pin and 5 pin, 7 pin connect+the 5V power supply, 4 pin connect-the 5V power supply, connect the 5th resistance R 5 and the 11st capacitor C 11 in parallel between 2 pin and 6 pin, connect 6 pin of the 3rd resistance R 3, the second operational amplifier U2 between 2 pin of 2 pin of the first operational amplifier U1 and the second operational amplifier U2 through the 6th resistance R 6 and the 5th capacitor C 5 ground connection.
Second amplifying circuit comprises that model is the 3rd operational amplifier U3 of ICL7650, the 7th resistance R 7 to the 9th resistance R 9 and the 12nd capacitor C 12 to the 15th capacitor C 15,2 pin of the 3rd operational amplifier U3 connect the 7th resistance R 7, the 8th resistance R 8 and the 12nd capacitor C 12, the other end of the 7th resistance R 7 connects 6 pin and the 13rd capacitor C 13 of the first operational amplifier U1, the other end of the 8th resistance R 8 connects output pin 6 pin of the 3rd operational amplifier U3 and the other end of the 13rd capacitor C 13, another termination the 5th capacitor C 5 and ground connection of the 12nd capacitor C 12,3 pin of the 3rd operational amplifier U3 are through the 9th resistance R 9 ground connection, connect the 14th capacitor C 14 between 8 pin and 5 pin, connect the 15th capacitor C 15 between 1 pin and 5 pin, 7 pin connect+the 5V power supply, and 4 pin connect-the 5V power supply.
Claims (3)
1, signal amplification circuit, it is characterized in that: described amplifying circuit comprises the one-level amplifying circuit and the second amplifying circuit of electrical connection, the one-level amplifying circuit comprise first operational amplifier (U1) and second operational amplifier (U2) and the 1st resistance (R1) to the 6th resistance (R6), the 1st electric capacity (C1) to the 9th electric capacity (C9);
3 pin of first operational amplifier (U1) connect input (V2) through the 1st resistance (R1), connect the 3rd electric capacity (C3) between 8 pin and 5 pin, connect the 4th electric capacity (C4) between 1 pin and 5 pin, connect the 2nd resistance (R2) in parallel between 2 pin and 6 pin;
3 pin of second operational amplifier (U2) connect input (V1) through the 4th resistance (R4), connect the 8th electric capacity (C8) between 8 pin and 5 pin, connect the 9th electric capacity (C9) between 1 pin and 5 pin, connect the 5th resistance (R5) in parallel between 2 pin and 6 pin, 6 pin are through the 6th resistance (R6) and the 5th electric capacity (C5) ground connection;
Connect the 3rd resistance (R3) between 2 pin of 2 pin of second operational amplifier (U2) and first operational amplifier (U1).
2, signal amplification circuit as claimed in claim 1 is characterized in that: the 2nd resistance (R2) is parallel with the 10th electric capacity (C10), and the 5th resistance (R5) is parallel with the 11st electric capacity (C11).
3, signal amplification circuit as claimed in claim 1 or 2, it is characterized in that: second amplifying circuit comprises the 3rd operational amplifier (U3), the 7th resistance (R7) to the 9th resistance (R9) and the 12nd electric capacity (C12) to the 15th electric capacity (C15), 2 pin of the 3rd operational amplifier (U3) connect the 7th resistance (R7), the 8th resistance (R8) and the 12nd electric capacity (C12), the other end of the 7th resistance (R7) connects 6 pin and the 13rd electric capacity (C13) of first operational amplifier (U1), the other end of the 8th resistance (R8) connects 6 pin of the 3rd operational amplifier (U3) and the other end of the 13rd electric capacity (C13), another termination the 5th electric capacity (C5) and ground connection of the 12nd electric capacity (C12), 3 pin of the 3rd operational amplifier (U3) are through the 9th resistance (R9) ground connection, connect the 14th electric capacity (C14) between 8 pin and 5 pin, connect the 15th electric capacity (C15) between 1 pin and 5 pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202240160U CN201332386Y (en) | 2008-11-24 | 2008-11-24 | Signal amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202240160U CN201332386Y (en) | 2008-11-24 | 2008-11-24 | Signal amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201332386Y true CN201332386Y (en) | 2009-10-21 |
Family
ID=41225771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008202240160U Expired - Lifetime CN201332386Y (en) | 2008-11-24 | 2008-11-24 | Signal amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201332386Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101414807B (en) * | 2008-11-24 | 2011-02-09 | 薛文伟 | Signal amplification circuit |
| WO2012106942A1 (en) * | 2011-02-12 | 2012-08-16 | 中兴通讯股份有限公司 | Signal amplifier |
| CN109589134A (en) * | 2019-01-29 | 2019-04-09 | 河南省中医院（河南中医药大学第二附属医院） | Ultrasonic radiography auxiliary monitoring device |
-
2008
- 2008-11-24 CN CNU2008202240160U patent/CN201332386Y/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101414807B (en) * | 2008-11-24 | 2011-02-09 | 薛文伟 | Signal amplification circuit |
| WO2012106942A1 (en) * | 2011-02-12 | 2012-08-16 | 中兴通讯股份有限公司 | Signal amplifier |
| CN109589134A (en) * | 2019-01-29 | 2019-04-09 | 河南省中医院（河南中医药大学第二附属医院） | Ultrasonic radiography auxiliary monitoring device |
| CN109589134B (en) * | 2019-01-29 | 2021-07-13 | 河南省中医院（河南中医药大学第二附属医院） | Ultrasonic radiography auxiliary monitoring device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20091021 Effective date of abandoning: 20081124 |