CN201327634Y - Baseplate capable of uniformly distributing arithmetic voltages on surface and high visible range resistance-type touch screen - Google Patents
Baseplate capable of uniformly distributing arithmetic voltages on surface and high visible range resistance-type touch screen Download PDFInfo
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- CN201327634Y CN201327634Y CNU2008202296433U CN200820229643U CN201327634Y CN 201327634 Y CN201327634 Y CN 201327634Y CN U2008202296433 U CNU2008202296433 U CN U2008202296433U CN 200820229643 U CN200820229643 U CN 200820229643U CN 201327634 Y CN201327634 Y CN 201327634Y
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Abstract
The utility model discloses a baseplate capable of uniformly distributing arithmetic voltages on the surface, wherein at least one layer of discontinuous leads are arranged at the edge of the baseplate in a discontinuous form; and the baseplate can improve the distributing uniformity of arithmetic voltages. The utility model also discloses a high visible range resistance-type touch screen applying the baseplate, which comprises the baseplate and a top plate and is provided with four power input terminals connected with the baseplate and one signal output terminal connected with the top plate; the leads of a pin point 1 and a pin point 5 of the input terminal are arranged at the edges of the two sides of the baseplate; the leads of a pin point 2 and a pin point 4 are arranged at the upper edge of the baseplate; at least one layer of discontinuous leads are arranged at the lower edge of the baseplate between the leads of the pin point 1 and the pin point 5; at least one layer of discontinuous leads are respectively arranged at the edges of the two sides of the baseplate between the leads of the pin point 2 and the pin point 4 and the leads at the lower edge of the baseplate; and at least one layer of discontinuous leads are arranged at the upper edge of the baseplate between the discontinuous leads at the edges of the two sides of the baseplate. The structure can enlarge the visible range area and improve the clicking accuracy.
Description
Technical field
The utility model belongs to the technical field of touch screen, and is relevant with the substrate circuit improvement design of resistance type touch control screen.
Background technology
In the prior art, resistance type touch control screen comprises that substrate 10[comprises ITO (tin indium oxide) glass] and top board 20[ITO conduction organic plates material PET etc.], as depicted in figs. 1 and 2, circuit design on the general substrate 10 has four power input (pin marks 1, pin mark 2, pin mark 4, pin mark 5) and a signal output part (pin mark 3), this signal output part (pin mark 3) is connected with top board 20, two power inputs (pin mark 1 and pin mark 5) lead 30 of drawing is laid in the both sides of the edge of substrate 10, two power inputs (pin mark 2 and pin mark 4) lead 30 of drawing is laid in the coboundary of substrate 10, four power input (pin marks 1, pin mark 2, pin mark 4, pin mark 5) and be provided with between the top board 20 insulation dot interlace 50.In the use, when pin mark 1 and pin mark 2 apply+5V voltage, after pin mark 4 and pin mark 5 ground connection, the Y-axis surface field distributes as shown in Figure 3, and when pin mark 2 and pin mark 4 apply+5V voltage, after pin mark 1 and pin mark 5 ground connection, the X-axis surface field distributes as shown in Figure 4.Point is pressed screen, presses top board 20, and substrate 10 is contacted with top board 20, forms the loop, and the voltage of feedback click location calculates the position of being clicked, and provides control command, realizes the function of touch screen control cursor.
This shows that the circuit design of general resistance type touch control screen is to make individual layer conducting wire structure to obtain the equal difference spread voltage at substrate 10 edges, so there is following major defect in it:
One, substrate 10 edge resistance homogeneitys are relatively poor, and voltage distributes can't reach certain level, the edge circuit reciprocal of duty cycle L of touch screen must be controlled at about 20 millimeters (mm), as shown in Figure 5, causes visible area 60 areas little;
Two, single-layer wire line structure, the homogeneity decision that voltage distributes and mainly leans on substrate 10 resistance, this structure is influenced greatly by substrate 10 resistance homogeneitys, causes the degree of accuracy of click location poor, be that actual institute's click location and signal feedback position have bigger gap, generally+/-5mm about.
In view of this, the inventor improves the substrate circuit of existing resistance type touch control screen, all enlarging the visible area area, improves the degree of accuracy of clicking, and this case produces thus.
The utility model content
The substrate that fundamental purpose of the present utility model is to provide a kind of surface potential difference such as can evenly distribute is to improve the voltage level distribution.
Secondary objective of the present utility model is to provide a kind of high visible area resistance type touch control screen, to enlarge the visible area area, improves the degree of accuracy of clicking.
To achieve these goals, solution of the present utility model is:
A kind of surface substrate of potential difference such as can evenly distribute is laid the disconnected lead of at least one interlayer at substrate edges with the form that disconnects.
A kind of high visible area resistance type touch control screen, comprise substrate and top board, have four power inputs that are connected with substrate and a signal output part that is connected with top board, the lead that two power input pin marks 1 and pin mark 5 are drawn is laid in the both sides of the edge of substrate, the lead that two power input pin marks 2 and pin mark 4 are drawn is laid in the coboundary of substrate, it is characterized in that: the lower limb at substrate between the lead that two power input pin marks 1 and pin mark 5 are drawn also is laid with the disconnected lead of at least one interlayer with the form that disconnects, the lead that two power input pin marks 2 and pin mark 4 are drawn also is laid with the disconnected lead of at least one interlayer with the form that disconnects in the both sides of the edge at substrate respectively and between the interruption lead of substrate lower limb separately, and the coboundary at substrate between the interruption lead of substrate both sides of the edge also is laid with the disconnected lead of at least one interlayer with the form that disconnects.
Lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively and respectively be laid with one deck in the both sides of the edge of substrate between the interruption lead of substrate lower limb and be interrupted lead is laid with one deck at the coboundary of substrate between the interruption lead of substrate both sides of the edge and is interrupted lead.
Lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of two to four interlayers respectively and between the interruption lead of substrate lower limb in the both sides of the edge of substrate, be laid with one deck at the coboundary of substrate between the interruption lead of substrate both sides of the edge and be interrupted lead.
Lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of two to four interlayers in the both sides of the edge of substrate respectively and between the interruption lead of substrate lower limb, and the coboundary at substrate between the interruption lead of substrate both sides of the edge is laid with two-layer interruption lead.
Lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with the disconnected lead of three interlayers, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of three interlayers in the both sides of the edge of substrate respectively and between the interruption lead of substrate lower limb, and the coboundary at substrate between the interruption lead of substrate both sides of the edge is laid with the disconnected lead of three interlayers.
The two ends that the outermost layer of aforesaid substrate lower limb is interrupted lead are connected with the lead that two power input pin marks 1 and pin mark 5 are drawn.
The lead that the two ends that the outermost layer of aforesaid substrate both sides of the edge is interrupted lead and power input pin mark 2 or pin mark 4 are drawn and the interruption lead of substrate lower limb are connected.
The two ends that the outermost layer of aforesaid substrate coboundary is interrupted lead are connected with the outermost layer interruption lead of substrate both sides of the edge.
The utility model adopts the structural design conducting wire distribution plan of the even distributed resistance of multibreak lead, or further adopt the lead that disconnects by layer 2-4 to form multi-layered conductive structure to form the resistance bridge shelf structure, reach the purpose of equalizing voltage, voltage distributes and mainly is subjected to the influence of conducting wire design, significantly reduces the influence that edge ITO resistance homogeneity distributes to voltage.
The utility model compared with prior art has the following advantages:
One, structurally, adopt symmetrical distribution refinement circuit, the distance of line width and circuit and substrate edges is obviously dwindled, and edge circuit reciprocal of duty cycle reduces, and can improve the visible area area greatly, makes dead space, edge reciprocal of duty cycle drop to 7-12mm from 20mm.
Two, on function, electric potential difference is more evenly distributed, and can more accurately feed back the click location of touch screen.
Description of drawings
Fig. 1 is the electrical block diagram (having thrown off top board) of prior art resistance type touch control screen;
Fig. 2 is the vertical view (top board is arranged) of Fig. 1;
Fig. 3 is the electric potential difference distribution plan of prior art resistance type touch control screen user mode one;
Fig. 4 is the electric potential difference distribution plan of prior art resistance type touch control screen user mode two;
Fig. 5 is the position view of visible area in the prior art resistance type touch control screen;
Fig. 6 is the electrical block diagram (throwing off top board) of the utility model embodiment one;
Fig. 7 is a schematic equivalent circuit of the present utility model;
Fig. 8 is the electric potential difference distribution plan of the utility model embodiment one user mode one;
Fig. 9 is the electric potential difference distribution plan of the utility model embodiment one user mode two;
Figure 10 is the electrical block diagram (throwing off top board) of the utility model embodiment two;
Figure 11 is the electric potential difference distribution plan of the utility model embodiment two user modes one;
Figure 12 is the electric potential difference distribution plan of the utility model embodiment two user modes one;
Figure 13 is the electrical block diagram (throwing off top board) of the utility model embodiment three;
Figure 14 is the schematic equivalent circuit of the utility model embodiment three;
Figure 15 is the electric potential difference distribution plan of the utility model embodiment three user modes;
Figure 16 is the electrical block diagram (throwing off top board) of the utility model embodiment four.
Embodiment
Shown in Fig. 6,7, the surface that the utility model discloses can evenly distribute and wait the substrate 10 of potential difference, is to lay at least one interlayer lead 40 that breaks at substrate 10 edges with the form that disconnects.This is interrupted lead 40 symmetrical distribution refinement circuits, and electric potential difference is more evenly distributed, and reaches the purpose of equalizing voltage, and voltage distributes and mainly is subjected to the influence of conducting wire design, significantly reduces the influence that edge ITO resistance homogeneity distributes to voltage.
This structure applications on high visible area resistance type touch control screen, can more accurately be fed back the click location of touch screen, and can enlarge the area of visible area.
With several embodiment, the application in high visible area resistance type touch control screen is elaborated with regard to substrate 10 of the present utility model below.
Shown in Fig. 6,7, be the preferred embodiment one that the utility model discloses.This high visible area resistance type touch control screen, comprise substrate 10 and top board 20, have four power inputs that are connected with substrate 10 (pin mark 1, pin mark 2, pin mark 4, pin mark 5) and a signal output part that is connected with top board 20 (pin mark 3), the lead 30 that two power input pin marks 1 and pin mark 5 are drawn is laid in the both sides of the edge of substrate 10, the lead 30 that two power input pin marks 2 and pin mark 4 are drawn is laid in the coboundary of substrate 10, above structure is same as the prior art, and improvement of the present utility model is:
One, between the lead 30 that two power input pin marks 1 and pin mark 5 are drawn, also being laid with at least with the form that disconnects at the lower limb of substrate 10, one deck (generally being designed to four layer) is interrupted lead 40, the position of each disconnection all can be regarded a resistance as, this embodiment one substrate 10 lower limb lay one deck and be interrupted lead 40; This is interrupted lead 40 two ends and is connected with the lead 30 that two power input pin marks 1 and pin mark 5 are drawn, to form the resistance in series loop;
Two, left side edge at substrate 10 between the interruption lead 40 of lead 30 that power input pin mark 2 is drawn and substrate 10 lower limbs also is laid with one deck (generally being designed to four layer) interruption lead 40 at least with the form that disconnects, the position of each disconnection all can be regarded a resistance as, right side edge at substrate 10 between the interruption lead 40 of lead 30 that power input pin mark 4 is drawn and substrate 10 lower limbs also is laid with one deck (generally being designed to four layer) interruption lead 40 at least with the form that disconnects, this embodiment one respectively is laid with two-layer interruption lead 40 (when the interruption lead that adopts more than two-layer in the both sides of the edge of substrate 10, the interruption lead of adjacent layer should be the shape that staggers, to guarantee to form resistance bridge, as shown in Figure 7); And the outermost layer of both sides of the edge is interrupted lead 30 that lead 40 two ends and power input pin mark 2 or pin mark 4 draw and the interruption lead 40 of substrate 10 lower limbs is connected, with formation resistance in series loop;
Three, the coboundary at substrate 10 also is laid with one deck (generally being designed to four layer) interruption lead 40 at least with the form that disconnects between the interruption lead 40 of substrate 10 both sides of the edge, the position of each disconnection all can be regarded a resistance as, and this embodiment one is laid with one deck interruption lead 40 at the coboundary of substrate 10; And this is interrupted lead 40 two ends and is connected with the outermost layer interruption lead 40 of substrate 10 both sides of the edge, to form the resistance in series loop.
When the utility model circuit is specifically made, adopt multi-layered conductive structure design conducting wire distribution plan earlier, form multi-layered conductive structure by the lead that disconnects and form the resistance bridge shelf structure, reach the purpose of equalizing voltage; Amplify by the unidirectional ratio of XY again or dwindle, adjust to required product size; Then, to circuit according to actual needs, do arrangement and prune, guarantee that as far as possible the resistance value of lead gap equates; At last, with the circuit that designs,, on substrate 10, form circuit by technologies such as etching, printings.
The utility model principle of work:
When pin mark 1 and pin mark 2 apply+5V voltage, after pin mark 4 and pin mark 5 ground connection, owing to be interrupted the resistance at lead 40 even distribution substrates 10 upper and lower edges, make the Y-axis surface field distribute as shown in Figure 8, form even equal difference Potential Distributing, when pin mark 2 and pin mark 4 apply+5V voltage, after pin mark 1 and pin mark 5 ground connection, owing to be interrupted the resistance at lead 40 even distribution substrates 10 left and right edges, make the X-axis surface field distribute as shown in Figure 9, also form even equal difference Potential Distributing.Like this,, on the X-axis of substrate 10 (ITO film) and Y-axis, all form even equal difference Potential Distributing, make the voltage of feedback click location more accurate, the position precision height of being clicked by the circuit of the utility model design.
In addition, the utility model also is interrupted the voltage distribution that lead 40 has improved substrate 10 edges by increasing, make substrate 10 edge voltages more even, thereby on designing and producing, can and be interrupted lead 40 and move lead 30 to the edge of substrate 10, make the edge circuit reciprocal of duty cycle L of touch screen be controlled at 7-12mm, the area of visible area obtains enlarging thus.
As shown in figure 10, be the preferred embodiment two that the utility model discloses.The difference of this embodiment two and embodiment one is that the lower limb at substrate 10 is laid with two-layer interruption lead 40 between the lead 30 that two power input pin marks 1 and pin mark 5 draw.All the other structures are identical with embodiment one, referring to aforementioned.
Principle of work: when pin mark 1 and pin mark 2 apply+5V voltage, after pin mark 4 and pin mark 5 ground connection, the Y-axis surface field distributes as shown in figure 11, when pin mark 2 and pin mark 4 apply+5V voltage, after pin mark 1 and pin mark 5 ground connection, the X-axis surface field distributes as shown in figure 12, and the circuit design of this embodiment makes and form more even equal difference Potential Distributing on substrate 10.
Shown in Figure 13,14, be the preferred embodiment three that the utility model discloses.This embodiment three is that with the difference of embodiment one coboundary, lower limb and the both sides of the edge of substrate 10 respectively are laid with one deck and are interrupted lead 40.All the other structures are identical with embodiment one, referring to aforementioned.
Principle of work: when pin mark 1 and pin mark 5 apply+5V voltage, after pin mark 2 and pin mark 4 ground connection, the Y-axis surface field distributes as shown in figure 15, and the circuit design of this embodiment makes and form more even equal difference Potential Distributing on substrate 10.
As shown in figure 16, be the preferred embodiment four that the utility model discloses.This embodiment four is that with the difference of embodiment one coboundary, lower limb and the both sides of the edge of substrate 10 respectively are laid with the disconnected lead 40 of three interlayers.All the other structures are identical with embodiment one, referring to aforementioned.Principle of work is similar to previous embodiment, so do not give unnecessary details.
Claims (9)
1, a kind of surface substrate of potential difference such as can evenly distribute is characterized in that: lay the disconnected lead of at least one interlayer at substrate edges with the form that disconnects.
2, a kind of high visible area resistance type touch control screen, comprise substrate and top board, have four power inputs that are connected with substrate and a signal output part that is connected with top board, the lead that two power input pin marks 1 and pin mark 5 are drawn is laid in the both sides of the edge of substrate, the lead that two power input pin marks 2 and pin mark 4 are drawn is laid in the coboundary of substrate, it is characterized in that: the lower limb at substrate between the lead that two power input pin marks 1 and pin mark 5 are drawn also is laid with the disconnected lead of at least one interlayer with the form that disconnects, the lead that two power input pin marks 2 and pin mark 4 are drawn also is laid with the disconnected lead of at least one interlayer with the form that disconnects in the both sides of the edge at substrate respectively and between the interruption lead of substrate lower limb separately, and the coboundary at substrate between the interruption lead of substrate both sides of the edge also is laid with the disconnected lead of at least one interlayer with the form that disconnects.
3, a kind of high visible area resistance type touch control screen as claimed in claim 2, it is characterized in that: the lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively and respectively be laid with one deck in the both sides of the edge of substrate between the interruption lead of substrate lower limb and be interrupted lead is laid with one deck at the coboundary of substrate between the interruption lead of substrate both sides of the edge and is interrupted lead.
4, a kind of high visible area resistance type touch control screen as claimed in claim 2, it is characterized in that: the lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of two to four interlayers respectively and between the interruption lead of substrate lower limb in the both sides of the edge of substrate, be laid with one deck at the coboundary of substrate between the interruption lead of substrate both sides of the edge and be interrupted lead.
5, a kind of high visible area resistance type touch control screen as claimed in claim 2, it is characterized in that: the lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with one deck interruption lead, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of two to four interlayers in the both sides of the edge of substrate respectively and between the interruption lead of substrate lower limb, and the coboundary at substrate between the interruption lead of substrate both sides of the edge is laid with two-layer interruption lead.
6, a kind of high visible area resistance type touch control screen as claimed in claim 2, it is characterized in that: the lower limb at substrate between the lead that above-mentioned two power input pin marks 1 and pin mark 5 are drawn is laid with the disconnected lead of three interlayers, the lead that two power input pin marks 2 and pin mark 4 are drawn respectively is laid with the disconnected lead of three interlayers in the both sides of the edge of substrate respectively and between the interruption lead of substrate lower limb, and the coboundary at substrate between the interruption lead of substrate both sides of the edge is laid with the disconnected lead of three interlayers.
7, a kind of high visible area resistance type touch control screen as claimed in claim 2 is characterized in that: the two ends that the outermost layer of aforesaid substrate lower limb is interrupted lead are connected with the lead that two power input pin marks 1 and pin mark 5 are drawn.
8, a kind of high visible area resistance type touch control screen as claimed in claim 2 is characterized in that: the lead that the two ends that the outermost layer of aforesaid substrate both sides of the edge is interrupted lead and power input pin mark 2 or pin mark 4 are drawn and the interruption lead of substrate lower limb are connected.
9, a kind of high visible area resistance type touch control screen as claimed in claim 2 is characterized in that: the two ends that the outermost layer of aforesaid substrate coboundary is interrupted lead are connected with the outermost layer interruption lead of substrate both sides of the edge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202296433U CN201327634Y (en) | 2008-12-26 | 2008-12-26 | Baseplate capable of uniformly distributing arithmetic voltages on surface and high visible range resistance-type touch screen |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008202296433U CN201327634Y (en) | 2008-12-26 | 2008-12-26 | Baseplate capable of uniformly distributing arithmetic voltages on surface and high visible range resistance-type touch screen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201327634Y true CN201327634Y (en) | 2009-10-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008202296433U Expired - Fee Related CN201327634Y (en) | 2008-12-26 | 2008-12-26 | Baseplate capable of uniformly distributing arithmetic voltages on surface and high visible range resistance-type touch screen |
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|---|---|
| CN (1) | CN201327634Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103902082A (en) * | 2012-12-27 | 2014-07-02 | 宸鸿光电科技股份有限公司 | Touch panel and manufacture method thereof |
-
2008
- 2008-12-26 CN CNU2008202296433U patent/CN201327634Y/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103902082A (en) * | 2012-12-27 | 2014-07-02 | 宸鸿光电科技股份有限公司 | Touch panel and manufacture method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20160512 Address after: 361009, No. 199, Sakamoto Road, information photoelectric Park, torch hi tech Zone, Fujian, Xiamen Patentee after: TPK Touch Solutions (Xiamen) Inc. Address before: 361000 information photoelectric garden, torch hi tech Zone, Fujian, Xiamen Patentee before: Optera Technology Xiamen Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091014 Termination date: 20171226 |