CN201323551Y

CN201323551Y - Fully-differential voltage-controlled oscillator circuit

Info

Publication number: CN201323551Y
Application number: CNU2008201451446U
Authority: CN
Inventors: 戴宇杰; 吕英杰; 张小兴; 邹玉峰
Original assignee: TIANJIN QIANGXIN IC DESIGN CO Ltd
Current assignee: TIANJIN QIANGXIN IC DESIGN CO Ltd
Priority date: 2008-12-30
Filing date: 2008-12-30
Publication date: 2009-10-07
Anticipated expiration: 2018-12-30

Abstract

The utility model relates to a fully-differential voltage-controlled oscillator circuit consisting of at least three levels of fully-differential element circuits which are in cascade connection with one another and have completely the same specification. The fully-differential voltage-controlled oscillator has the advantages as follows: 1, the oscillator circuit is classified as a complementary metal oxide semiconductor (CMOS) circuit which has simple structure, high reliability and wide frequency-tuning range and can works normally under an extremely-low voltage; 2, the oscillator circuit adopts the cascade connection mode of three or more than three levels of the fully-differential elements of completely the same specification; 3, the source electrodes of positive feedback active loads are directly grounded so as to increase the single-level gain of the fully-differential elements and ensure that the oscillator circuit starts the oscillation normally under any condition; 4, a voltage clamping circuit takes the function of stabilizing the output signal amplitude of the oscillator; and 5, when the control voltage controls the currents in tail current sources of the differential elements to change by using a certain V-I switching circuit, the oscillator circuit generates output waveforms of different frequencies along with the change of the tail current, and the frequency of the output waveform of the oscillator circuit is constant as long as the current of the tail current source is constant.

Description

The fully differential voltage-controlled oscillator circuit

(1) technical field:

The utility model relates to a kind of pierce circuit, especially a kind of fully differential voltage-controlled oscillator circuit.

(2) background technology:

Existing C MOS differential vibrating circuit, great majority all can only be regulated in very little frequency-tuning range.The circuit structure of the wide tuning range of Chu Xianing once in a while, it can not well be worked under low-voltage, makes that again the amplitude of wave form of output is stable inadequately, has increased the oscillating circuit phase noise, and the noise resisting ability of entire circuit system is descended.Such oscillating circuit more and more can not satisfy the needs of low pressure, low noise and broadband adjustable range.

(3) utility model content:

The purpose of this utility model is to provide a kind of fully differential voltage-controlled oscillator circuit, it be a kind of simple in structure, reliability is high, frequency-tuning range is wide, can be under the utmost point low supply voltage CMOS Voltage-Controlled oscillation circuit of regular event.

The technical solution of the utility model: a kind of fully differential voltage-controlled oscillator circuit is characterized in that it is made up of the identical total difference units circuit of three grades of mutual cascades at least.

Above-mentioned said total difference units circuit divides for current source total difference units circuit of being made up of transistor PMOS1 and transistor PMOS2 or the current source total difference units circuit of being made up of transistor PMOS1.

The difference input that the above-mentioned said current source total difference units circuit of being made up of transistor PMOS1 and transistor PMOS2 comprises the current source be made up of transistor PMOS1 and transistor PMOS2, be made up of transistor PMOS3 and transistor PMOS4 is carried out the voltage clamp circuit that amplitude limit is controlled to, the positive feedback active load is made up of transistor NMOS1 and transistor NMOS2 and by what transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6 formed to output amplitude; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage 1, and drain electrode connects the source electrode of transistor PMOS2; The grid of said transistor PMOS2 connects bias voltage 2, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.

The difference input that the above-mentioned said current source total difference units circuit of being made up of transistor PMOS1 comprises the current source be made up of transistor PMOS1, be made up of transistor PMOS3 and transistor PMOS4 is carried out the voltage clamp circuit that amplitude limit is controlled to, the positive feedback active load is made up of transistor NMOS1 and transistor NMOS2 and by what transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6 formed to output amplitude; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.

Above-mentioned said fully differential voltage-controlled oscillator circuit is applied in the various Circuits System.

Superiority of the present utility model is: 1, the utility model proposes a kind of simple in structure, reliability is high, frequency-tuning range is wide, can be under the utmost point low supply voltage CMOS Voltage-Controlled oscillation circuit of regular event; 2, circuit of the present utility model can be selected the cascade system of the identical total difference units more than 3 grades and 3 grades flexibly according to the requirement of different power consumptions, speed and antijamming capability for use; 3, the positive feedback active load formed of transistor NMOS1 and transistor NMOS2, the direct ground connection of their source electrode is used to improve the one pass gain of total difference units, guarantees oscillating circuit normally starting of oscillation under any condition; 4, the voltage clamp circuit of forming by transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6, the effect of stabilized oscillator output amplitude is arranged, make in whole frequency-tuning range the proportional relation of the amplitude variations of the output signal of this voltage controlled oscillator and technique change and variations in temperature; 5, when control voltage changes by the electric current in the tail current source of certain V-I change-over circuit control difference unit, this oscillating circuit just can produce the output waveform of height different frequency along with the size of tail current, as long as the electric current in the tail current source is constant, then the frequency of the output waveform of oscillating circuit is constant.

(4) description of drawings:

Fig. 1 is the structured flowchart of the related a kind of fully differential voltage-controlled oscillator circuit of the utility model.

Fig. 2 is that (wherein, Fig. 2-a is the structure chart of the total difference units circuit of high-precision current mirror image for the structure chart of the total difference units circuit in the related a kind of fully differential voltage-controlled oscillator circuit of the utility model; Fig. 2-b is the structure chart of the total difference units circuit of general precision current mirror).

Fig. 3 is the output waveform schematic diagram of the related a kind of fully differential voltage-controlled oscillator circuit of the utility model.

Wherein, Vdd is the supply voltage of circuit, and Diff is the total difference units circuit, and CMOS is a CMOS, and PMOS is a P type channel metal-oxide transistor, and NMOS is a N type channel metal-oxide transistor.

(5) embodiment:

Embodiment 1: a kind of fully differential voltage-controlled oscillator circuit (see figure 1) is characterized in that it is made up of the identical total difference units circuit of the mutual cascade of level Four.

Above-mentioned said total difference units circuit (is seen Fig. 2-a) for the current source total difference units circuit be made up of transistor PMOS1 and transistor PMOS2.

The above-mentioned said current source total difference units circuit of being made up of transistor PMOS1 and transistor PMOS2 (sees that Fig. 2-a) comprises the current source of being made up of transistor PMOS1 and transistor PMOS2, right by the difference input that transistor PMOS3 and transistor PMOS4 form, the positive feedback active load of being made up of transistor NMOS1 and transistor NMOS2 reaches by transistor NMOS3, transistor NMOS4, what transistor NMOS5 and transistor NMOS6 formed carries out the voltage clamp circuit that amplitude limit is controlled to output amplitude; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage 1, and drain electrode connects the source electrode of transistor PMOS2; The grid of said transistor PMOS2 connects bias voltage 2, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.

Embodiment 2: a kind of fully differential voltage-controlled oscillator circuit (see figure 1) is characterized in that it is made up of the identical total difference units circuit of the mutual cascade of level Four.

Above-mentioned said total difference units circuit (is seen Fig. 2-b) for the current source total difference units circuit be made up of transistor PMOS1.

The above-mentioned said current source total difference units circuit of forming by transistor PMOS1 (see that Fig. 2-b) comprises the current source be made up of transistor PMOS1, the difference input be made up of transistor PMOS3 and transistor PMOS4 carries out the voltage clamp circuit that amplitude limit is controlled to, the positive feedback active load is made up of transistor NMOS1 and transistor NMOS2 and by what transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6 formed to output amplitude; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.

Figure 3 shows that the positive and negative two-phase output waveform of this structure oscillation circuit, their amplitude can produce faint variation along with the difference of output frequency.

Claims

1, a kind of fully differential voltage-controlled oscillator circuit is characterized in that it is made up of the identical total difference units circuit of three grades of mutual cascades at least.

2,, it is characterized in that said total difference units circuit divides for current source total difference units circuit of being made up of transistor PMOS1 and transistor PMOS2 or the current source total difference units circuit of being made up of transistor PMOS1 according to the said a kind of fully differential voltage-controlled oscillator circuit of claim 1.

3, according to the said a kind of fully differential voltage-controlled oscillator circuit of claim 2, it is characterized in that the said current source total difference units circuit of being made up of transistor PMOS1 and transistor PMOS2 comprises the current source of being made up of transistor PMOS1 and transistor PMOS2, right by the difference input that transistor PMOS3 and transistor PMOS4 form, the positive feedback active load of being made up of transistor NMOS1 and transistor NMOS2 reaches by transistor NMOS3, transistor NMOS4, what transistor NMOS5 and transistor NMOS6 formed carries out the voltage clamp circuit that amplitude limit is controlled to output amplitude; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage 1, and drain electrode connects the source electrode of transistor PMOS2; The grid of said transistor PMOS2 connects bias voltage 2, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.

4,, it is characterized in that the said current source total difference units circuit of being made up of transistor PMOS1 comprises the current source be made up of transistor PMOS1, the difference input be made up of transistor PMOS3 and transistor PMOS4 carries out the voltage clamp circuit that amplitude limit is controlled to, the positive feedback active load is made up of transistor NMOS1 and transistor NMOS2 and by what transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6 formed to output amplitude according to the said a kind of fully differential voltage-controlled oscillator circuit of claim 2; Wherein, the source electrode of transistor PMOS1 connects power supply, and grid connects bias voltage, and drain electrode connects the source electrode of transistor PMOS3 and the source electrode of transistor PMOS4 respectively; The grid of said transistor PMOS3 connects grid and normal phase input end of transistor NMOS5 respectively, and the drain electrode of transistor PMOS3 connects the grid of reversed-phase output, transistor NMOS2, the drain electrode of transistor NMOS1, the drain electrode of transistor NMOS3 and the drain electrode of transistor NMOS5 respectively; The grid of said transistor PMOS4 connects grid and the reversed input terminal of transistor NMOS6 respectively, and the drain electrode of transistor PMOS4 links to each other with the grid of positive output end, transistor NMOS1, the drain electrode of transistor NMOS2, the drain electrode of transistor NMOS4 and the drain electrode of transistor NMOS6; The direct ground connection of the source electrode of the source electrode of said transistor NMOS1 and transistor NMOS2; The grid of said transistor NMOS3 connects the drain electrode of himself; The grid of said transistor NMOS4 connects the drain electrode of himself; The direct ground connection of the source electrode of the source electrode of the source electrode of the source electrode of said transistor NMOS3, transistor NMOS4, transistor NMOS5 and transistor NMOS6.