CN201266945Y

CN201266945Y - Universal remote automatic data collector

Info

Publication number: CN201266945Y
Application number: CNU2008202181425U
Authority: CN
Inventors: 张德育; 刘治国
Original assignee: Shenyang Ligong University
Current assignee: Shenyang Ligong University
Priority date: 2008-09-23
Filing date: 2008-09-23
Publication date: 2009-07-01
Anticipated expiration: 2018-09-23

Abstract

A general remote automatic data acquisition device comprises a case and a circuit control plate arranged in the case, wherein, the circuit control plate comprises a CPU chip U4, a Flash chip U2, a memory chip U1, an adjustable transforming power supply chip U3, a reset chip U5, a serial port chip U6 and a network port chip U7; an address wire and a data wire of the CPU chip U4 are respectively and correspondingly connected with the address wires and the data wires of other chips; and the device is accessed into a computer network by a network cable, a remote monitoring terminal can communicate with the device by the computer network, and the device is connected with equipment to be acquired by a serial port interface and a serial port line. The general remote automatic data acquisition device has scientific and reasonable design with creativity, beautiful appearance, compact and tight structure, stability and reliability, simple and convenient operation, comparatively strong practicability, economy and applicability, and is applicable to remote automatic data acquisition by the network.

Description

The universal remote automatic data acquisition device

Technical field

The utility model relates to the computer monitoring acquisition system, concrete is can be to not possessing or the computer or all kinds of intelligent electronic information equipment of network loss communication capacity carry out remote automatic data acquisition, for the remote monitoring end provides corresponding data, improve supervisory control system failure diagnosis precision, enlarge a kind of universal remote automatic data acquisition device of data acquisition scope.

Background technology

Any electronic equipment each link or each parts under its normal operating conditions should have the corresponding work parameter, computer or all kinds of intelligent electronic information equipment in particular for communication, hardware and software all keeps the corresponding work state in normal work and communication process, and promptly the relevant job information of the hardware and software in the system is carried out data acquisition, transmits and corresponding the processing, be the basic function that present various monitoring, network system for managing should possess.Influence whole system and judge and carry out and in system, be provided with the remote monitoring end for individual device in the anti-locking system goes wrong, gather their operation conditions of data analysis of various kinds of equipment by acquisition system, thereby the fault that exists in the discovery system timely and accurately, maybe can find possible hidden danger, and then remind the timely handling failure problem of related personnel.

Yet the acquisition system of using but exists some shortcomings and deficiency at present.The common feature of any network system is that equipment is numerous, Regional Distribution is extensive, if this is equipped with the attendant of complete monitored maintenance equipment and specialty, difficulty certainly the more, in addition, exist in the network system that has and do not possess in a large number or computer or other electronic equipment of network loss communication capacity, this data acquisition to whole system, monitoring and diagnosis have all brought suitable difficulty.Also have, the equipment of general networking system is numerous and jumbled, various informative, this causes the numerous and diverse property to the data acquisition of common network system again, therefore monitoring, processing and the diagnosis to different classes of data caused difficulty again on carrying out, always can not be numerous at kind, the equipment that structure, performance vary, be the special data acquisition system of each type equipment development, the time that such data acquisition system is handled, the workload of programming, the difficulty of regular maintenance and cost etc. all are the big problems that can not be ignored.

Summary of the invention

The purpose of this utility model be at present variety of network systems to not possessing or the method for dealing with of network loss communication capacity equipment exists shortcoming and not enough, and provide a kind of universal remote automatic data acquisition device of flexible, convenient, suitable various types of networks.

The technical scheme that adopts is:

The universal remote automatic data acquisition device, comprise casing and be contained in circuit control panel in the casing, the front panel of casing is provided with mains switch and reset switch, is provided with power supply indicator, network indicator light and serial ports indicator light simultaneously, and the back side of casing is provided with serial interface and network interface.

Described circuit control panel comprises cpu chip U4, fast Flash chip U2, memory chip U1, the adjustable converting power source chip U3 of communication, chip U5, serial port chip U6 and network interface chip U7 reset;

Cpu chip U4 address wire AD[9:0] with the address wire AD[9:0 of flash chip U2] corresponding connection, the data wire D[7:0 of cpu chip U4] with the data wire SD[7:0 of flash chip U2] corresponding connection, the chip selection signal CS of cpu chip U4 is connected with the chip selection signal CS of flash chip U2;

Cpu chip U4 address wire AD[9:0] with the address wire AD[9:0 of memory chip U1] corresponding connection, the data wire D[7:0 of cpu chip U4] with the data wire SD[7:0 of memory chip U1] corresponding connection, read-write end pin IOWR, the IOWD of cpu chip U4 links to each other with memory chip U1 read-write end pin IOWR, IOWD respectively;

The out end of adjustable converting power source chip U3 is connected with the VCC end of cpu chip U4, the end of mains switch K1 on the in of adjustable converting power source chip U3 end and the casing is connected, the other end of mains switch K1 on the casing is connected with the anode of battery E, and the ADJ end of adjustable converting power source chip U3 is connected through the negative terminal of resistance R 2 with battery E;

The VCC end of chip U5 of resetting is held with the VCC of cpu chip U4 and is connected, the GND end of chip U5 of resetting is held with the GND of cpu chip U4 and is connected, the NRESET end of chip U5 of resetting is held with the RESET of cpu chip U4 and is connected, VCC and the NRESET two ends parallel resistance R1 of chip U5 reset, the end of the reset switch K2 on MR end and the casing of chip U5 of resetting is connected, and the GND of the chip U5 that resets holds with the other end of reset switch K2 on the casing and is connected.

The XTIP1 end of cpu chip U4 is connected with crystal oscillator Y1 one end, the crystal oscillator Y1 other end is connected with the XTIP2 end of cpu chip U4, the XTIP1 end of cpu chip U4 is connected with an end of capacitor C 1, capacitor C 1 other end is connected with the GND end of cpu chip U4, the XTIP2 end of cpu chip U4 is connected with an end of capacitor C 2, and capacitor C 2 other ends are connected with the GND end of cpu chip U4.

The T1in end of serial port chip U6 is connected with the PC4 end of cpu chip U4, this connection is used for the data that serial port chip U6 receives cpu chip U4, the R2out end of serial port chip U6 is connected with the PC5 end of cpu chip U4, this connection is used for serial port chip U6 and sends data to cpu chip U4, the V+ end of serial port chip U6 is connected with capacitor C 3 one ends, capacitor C 3 other ends are connected with the VCC end of cpu chip U4, the V-end of serial port chip U6 is connected with capacitor C 4 one ends, capacitor C 4 other ends are connected with the GND end of cpu chip U4, and V+ end and V-end are used for serial port chip U6 is powered.7 ends of the serial interface on the T1out of serial port chip U6 end and the casing are connected, this connection is used for the universal remote automatic data acquisition device and sends data to monitored collecting device, the R1in end of serial port chip U6 is connected with 8 ends of the serial interface of casing, this connection is used for the universal remote automatic data acquisition device and receives the data that monitored collecting device sends, and the GND end of serial port chip U6 is connected with 9 ends of the serial interface of casing.

The SD[7:0 of network interface chip U7] end and the D[7:0 of cpu chip U4] hold corresponding connection, this connection is used for transfer of data between network interface chip U7 and the cpu chip U4, the RX+ end of network interface chip U7 is connected with 10 ends of the network interface of casing, the RX-end of network interface chip U7 is connected with 11 ends of the network interface of casing, these two connections are used for universal remote automatic data acquisition device receiving remote monitoring client data, the TX+ end of network interface chip U7 is connected with 12 ends of the network interface of casing, the TX-end of network interface chip U7 is connected with 13 ends of the network interface of casing, and these two connections are used for the universal remote automatic data acquisition device and send data to the remote monitoring end.

The utility model operation principle:

Universal remote automatic data acquisition device circuit control board mainly is made up of cpu chip U4, internal memory, flash, power circuit, reset circuit, crystal oscillating circuit, serial ports and network interface.

What cpu chip U4 chip was selected for use is the Rabbit3000 chip, and the Rabbit semiconductor device is special in being applied to a kind of high-performance microprocessor that middle-size and small-size controller designs.Rabbit is easy to use, and its hardware and software interface have all farthest been realized safe simple and direct, and supporting language is a kind of improved C language development system (dynamically C-Dynamic C).

The utility model is connected as shown in Figure 4 with remote monitoring end and monitored device, when the remote monitoring end is given an order image data, arrive network interface of the present utility model through netting twine by computer network, be delivered to monitored collecting device by serial interface of the present utility model by Serial Port Line again.The utility model is two-way to the collection of data with communicating by letter, and the data that collect when monitored collecting device can reversely be sent to the remote monitoring end.

Flash is used to store the remote automatic data acquisition program, and after device power-up, the Automatic Program among the flash is loaded in the internal memory and starts.Internal memory is used for the data of universal remote automatic data acquisition process, collection and the storage of ephemeral data.Read-write IOWR, the IOWD of cpu chip U4 links to each other with memory read-write signal IOWR, IOWD, and read-write is used to judge that cpu chip U4 is rdma read or writes internal memory.

Power circuit is each chip power supply for the universal remote automatic data acquisition device; battery is all kinds of chip power supplies through adjustable converting power source chip U3 output 3.3V voltage in the power circuit; adjustable converting power source chip U3 also provides perfect overload protection function; comprise upper current limit control, thermal overload protection and place of safety protection etc., even and also can provide perfect defencive function under these overload protection functions situation that externally adjustable end member spare does not have to connect.Reset circuit is used for the universal remote automatic data acquisition device and restarts, adopt the integrated chip U5 that resets to finish this in the reset circuit design and installed reliable electrification reset and hand-reset, this chip not only has extremely low power consumption and has the function of Power Supply Monitoring, when supply voltage drops to default thresholding when following, it will produce reset signal and be used for the universal remote automatic data acquisition device and reset.And the monitoring to power supply also has the function of shaking, and makes supply voltage produce falling of short time for certain interference, can not cause the generation of reset signal, has improved reliability.Crystal oscillating circuit is used to produce system clock, considers control Electro Magnetic Compatibility and the needs that reduce board area, adopts external crystal oscillator in the design, through producing the mode of the master clock of system behind the inner frequency multiplication of phase locked loop.Serial ports is used for the transmission of universal remote automatic data acquisition device and monitored collecting device data.Network interface is used for the transfer of data of universal remote automatic data acquisition device and remote monitoring end.

The utility model design science, reasonable, original, aesthetic in appearance, compact conformation, tight, reliable and stable, easy and simple to handle, have stronger practicality, economic and practical, the suitable network remote automatic data acquisition of the utility model is used.

Description of drawings

Fig. 1 is that the utility model outward appearance is faced structural representation.

Fig. 2 is the backsight structural representation of Fig. 1.

Fig. 3 is the utility model circuit theory diagrams.

Fig. 4 is the utility model and remote monitoring end connection diagram.

Embodiment

The universal remote automatic data acquisition device, comprise casing 1 and be contained in circuit control panel in the casing 1, the front panel of casing 1 is provided with mains switch K1 and reset switch K2, be provided with power supply indicator 2, network indicator light 3 and serial ports indicator light 4 simultaneously, the back side of casing 1 is provided with serial interface 6 and network interface 5.

Described circuit control panel comprises cpu chip U4, fast Flash chip U2, memory chip U1, the adjustable converting power source chip U3 of communication, chip U5, serial port chip U6 and network interface 5 chip U7 reset;

The T1in end of serial port chip U6 is connected with the PC4 end of cpu chip U4, this connection is used for the data that serial port chip U6 receives cpu chip U4, the R2out end of serial port chip U6 is connected with the PC5 end of cpu chip U4, this connection is used for serial port chip U6 and sends data to cpu chip U4, the V+ end of serial port chip U6 is connected with capacitor C 3 one ends, capacitor C 3 other ends are connected with the VCC end of cpu chip U4, the V-end of serial port chip U6 is connected with capacitor C 4 one ends, capacitor C 4 other ends are connected with the GND end of cpu chip U4, and V+ end and V-end are used for serial port chip U6 is powered.7 ends of the serial interface 6 on the T1out of serial port chip U6 end and the casing 1 are connected, this connection is used for the universal remote automatic data acquisition device and sends data to monitored collecting device, the R1in end of serial port chip U6 is connected with 8 ends of the serial interface 6 of casing 1, this connection is used for the universal remote automatic data acquisition device and receives the data that monitored collecting device sends, and the GND end of serial port chip U6 is connected with 9 ends of the serial interface 6 of casing.

The SD[7:0 of network interface chip U7] end and the D[7:0 of cpu chip U4] hold corresponding connection, this connection is used for transfer of data between network interface chip U7 and the cpu chip U4, the RX+ end of network interface chip U7 is connected with 10 ends of the network interface 5 of Fig. 2 casing 1, the RX-end of network interface chip U7 is connected with 11 ends of the network interface 5 of Fig. 2 casing 1, these two connections are used for universal remote automatic data acquisition device receiving remote monitoring client data, the TX+ end of network interface chip U7 is connected with 12 ends of the network interface 5 of Fig. 2 casing 1, the TX-end of network interface chip U7 is connected with 13 ends of the network interface 5 of Fig. 2 casing 1, and these two connections are used for the universal remote automatic data acquisition device and send data to the remote monitoring end.

The network interface 5 of the casing 1 of this universal remote automatic data acquisition device inserts computer network by netting twine, remote monitoring end 14 also inserts same computer network by netting twine, at this moment remote monitoring end 14 just can communicate by computer network and this universal remote automatic data acquisition device, the serial interface 6 of casing 1 is connected with monitored collecting device 15 by Serial Port Line, thereby carry out both-way communication, and the computing of the cpu chip U4 in this device, handle and to carry out teledata in real time and gather automatically and transmission.

Claims

1, universal remote automatic data acquisition device, comprise casing (1) and be contained in circuit control panel in the casing (1), the front panel of casing 1 is provided with mains switch (K1) and reset switch (K2), be provided with power supply indicator (2), network indicator light (3) and serial ports indicator light (4) simultaneously, the back side of casing (1) is provided with serial interface (6) and network interface (5); It is characterized in that:

1), described circuit control panel comprises cpu chip (U4), Flash chip (U2), memory chip (U1), adjustable converting power source chip (U3), the chip that resets (U5), serial port chip (U6) and network interface 5 chips (U7) of quick communication;

Cpu chip (U4) address wire AD[9:0] with the address wire AD[9:0 of flash chip (U2)] corresponding connection, the data wire D[7:0 of cpu chip (U4)] with the data wire SD[7:0 of flash chip (U2)] corresponding connection, the chip selection signal CS of cpu chip (U4) is connected with the chip selection signal CS of flash chip (U2);

2), cpu chip (U4) address wire AD[9:0] with the address wire AD[9:0 of memory chip (U1)] corresponding connection, the data wire D[7:0 of cpu chip (U4)] with the data wire SD[7:0 of memory chip (U1)] corresponding connection, read-write end pin IOWR, the IOWD of cpu chip (U4) links to each other with memory chip (U1) read-write end pin IOWR, IOWD respectively;

3), the out of adjustable converting power source chip (U3) end is connected with the VCC end of cpu chip (U4), one end of the mains switch (K1) on the in of adjustable converting power source chip (U3) end and the casing is connected, the other end of the mains switch on the casing (K1) is connected with the anode of battery E, and the ADJ end of adjustable converting power source chip (U3) is connected with the negative terminal of battery E through resistance (R2);

4), the reset VCC end of chip (U5) is held with the VCC of cpu chip (U4) and is connected, the GND end of chip (U5) of resetting is held with the GND of cpu chip (U4) and is connected, the NRESET end of chip (U5) of resetting is held with the RESET of cpu chip (U4) and is connected, the VCC and the NRESET two ends parallel resistances (R1) of chip (U5) reset, the end of the reset switch (K2) on MR end and the casing of chip (U5) of resetting is connected, and the GND of the chip that resets (U5) holds with the other end of reset switch (K2) on the casing and is connected;

5), the XTIP1 of cpu chip (U4) end is connected with crystal oscillator Y1 one end, the crystal oscillator Y1 other end is connected with the XTIP2 end of cpu chip (U4), the XTIP1 end of cpu chip (U4) is connected with an end of electric capacity (C1), electric capacity (C1) other end is connected with the GND end of cpu chip (U4), the XTIP2 end of cpu chip (U4) is connected with an end of electric capacity (C2), and electric capacity (C2) other end is connected with the GND end of cpu chip (U4);

6), the Tlin of serial port chip (U6) end is connected with the PC4 end of cpu chip (U4), (R2) out end of serial port chip (U6) is connected with the PC5 end of cpu chip (U4), the V+ end of serial port chip (U6) is connected with capacitor C 3 one ends, capacitor C 3 other ends are connected with the VCC end of cpu chip (U4), the V-end of serial port chip (U6) is connected with capacitor C 4 one ends, capacitor C 4 other ends are connected with the GND end of cpu chip (U4), and V+ end and V-end are used for serial port chip (U6) is powered; (7) of the serial interface (6) on the Tlout of serial port chip (U6) end and the casing (1) are held and are connected, (R1) in end of serial port chip (U6) is connected with (8) end of the serial interface (6) of casing, and the GND end of serial port chip (U6) is connected with (9) end of the serial interface (6) of casing;

7), the SD[7:0 of network interface chip (U7)] end and the D[7:0 of cpu chip (U4)] hold corresponding connection, the RX+ end of network interface chip (U7) is connected with (10) end of the network interface (5) of casing (1), the RX-end of network interface chip (U7) is connected with (11) end of the network interface (5) of casing (1), the TX+ end of network interface chip (U7) is connected with (12) end of the network interface (5) of casing (1), and the TX-end of network interface chip (U7) is connected with (13) end of the network interface (5) of casing (1).