CN201266243Y - Device for generating metal detector sine wave - Google Patents
Device for generating metal detector sine wave Download PDFInfo
- Publication number
- CN201266243Y CN201266243Y CNU2008201520446U CN200820152044U CN201266243Y CN 201266243 Y CN201266243 Y CN 201266243Y CN U2008201520446 U CNU2008201520446 U CN U2008201520446U CN 200820152044 U CN200820152044 U CN 200820152044U CN 201266243 Y CN201266243 Y CN 201266243Y
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- metal detector
- generating means
- sinusoidal wave
- wave generating
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Abstract
The utility model provides a sine wave generator of a metal detector, comprising a direct digital frequency synthesizer, a digital signal processor, a crystal oscillating circuit, a filter circuit and an amplifying circuit arrangement, wherein the digital signal processor, the direct digital frequency synthesizer, the filter circuit and the amplifying circuit arrangement are serially connected in sequence, and the crystal oscillating circuit is connected to the direct digital frequency synthesizer. The utility model adopts a digital chip AD9832 as a sine wave of a signal source of the metal detector, thereby improving the stability of waveform generation and conveniently and effectively amending waveform parameters.
Description
Technical field
The utility model relates to the Detection Techniques field, the sinusoidal wave generating means of particularly a kind of metal detector.
Background technology
The generation of the sinusoidal signal ripple of more existing metal detectors, a kind of is to utilize RLC serial or parallel connection resonant circuit to realize that this has the deficiency of two aspects: the one, the stability of waveform is not enough.The 2nd, be inconvenient to revise sinusoidal wave correlation parameter, such as phase angle and frequency.And another kind is to utilize the quartz crystal oscillator, and its frequency accuracy and stability of waveform are all than higher, but its weak point is: be inconvenient to change frequency, generally only be used for fixing the generation of frequency.
The utility model content
The purpose of this utility model is to overcome the shortcoming of prior art, provides a kind of metal detector sinusoidal wave generating means.
Technic relization scheme of the present utility model:
The utility model adopts the signal source sine wave of digitized chip AD9832 as metal detection equipment.
This device mainly comprises Direct Digital Frequency Synthesizers (AD9832), DSP (digital signal processor), external crystal-controlled oscillation, power supply, filtering circuit and amplifier circuit device.Referring to Fig. 1.Wherein, DSP1, Direct Digital Frequency Synthesizers 2 (AD9832), filtering circuit 3, amplifying circuit 4 are connected in series successively, and crystal oscillating circuit is connected to Direct Digital Frequency Synthesizers 2 (AD9832).
Its principle of work is:
The programmability of the AD9832 that utilizes is controlled its frequency and the change of range value by DSP (digital signal processor), thereby is obtained the generation of frequency source sine wave.To digiverter (DAC), the sinusoidal wave analog passband signal wave filter that will obtain is again finally exported very pure sine wave signal with signal conveys.
AD9832 is a complete DDS chip (Direct Digital Frequency Synthesizers) that AD company produces.The Direct Digital frequency synthesis is a kind of new frequency synthesis technique and signal generating method.Direct Digital Frequency Synthesizers (DDS) has the superfast frequency inverted time, high frequency resolution and lower phase noise, when frequency shift and frequency modulation, the DDS device can keep the continuous of phase place, therefore is easy to realize frequency, phase place and amplitude modulation(PAM).In addition, this device also has the outstanding advantage of control able to programme.Therefore, Direct Digital Frequency Synthesizers has obtained application more and more widely, becomes the first-selected device in current electronic system and equipment medium frequency source.
The sinusoidal wave generating means of a kind of metal detector, comprise Direct Digital Frequency Synthesizers, digital signal processor, external crystal oscillation circuit, filtering circuit and amplifier circuit device, digital signal processor, Direct Digital Frequency Synthesizers, filtering circuit, amplifier circuit device are connected in series successively, and external crystal oscillation circuit is connected to Direct Digital Frequency Synthesizers.
The pin 4 of the annexation of described digital signal processor and Direct Digital Frequency Synthesizers: AD9832 connects 2 pin of capacitor C 1, the 1 pin ground connection of C1, the pin 7 of AD9832 meets the 35 pin SPICLK of DSP, the pin 8 of AD9832 meets the 30 pin SPISIMO of DSP, the pin 9 of AD9832 meets the 65 pin FSYNC1 of DSP, the pin 6 of AD9832 meets the output pin OUT of external crystal-controlled oscillation, the pin one 0 of AD9832,11,12,5 ground connection, the pin one 5 of AD9832 connects 1 pin of capacitor C 2,2 pin of C2 connect the pin one 6 of AD9832, the pin 1 of the pin one 4 connecting resistance R2 of AD9832, and as the output terminal of signal SINA, pin 2 ground connection of resistance R 2, the pin two of AD9832 connects 1 pin of capacitor C 3,2 pin ground connection of capacitor C 3, the pin 3 of AD9832 connects its pin two, the pin 1 of the pin one connecting resistance R1 of AD9832,2 pin ground connection of resistance R 1, the output pin OUT of crystal oscillator connects the pin 6 of AD9832, the pin GND ground connection of crystal oscillator, and the pin VCC of crystal oscillator connects 1 pin of capacitor C 4, the 2 pin ground connection of C4, in addition, respectively to the power supply position of AD9832 pin 4 and 15, and the power pin VCC of crystal oscillator provides 3.3 volts of positive phase voltages.
Described amplifier circuit device is to be connected in series by first order amplifier OP282A and second level amplifier OP282B two-stage calculation amplifier.
Described first order amplifier circuit is by OP282 A, resistance R 3, R4, R5, and a capacitor C 3 is formed.
Described second level amplifier circuit is made up of OP282 B, resistance R 6, R7, R8.
Described operational amplifier adopts model OP282.
Comprise that also power supply connects entire circuit, powers to entire circuit.
Described Direct Digital Frequency Synthesizers adopts digitized chip AD9832.
Described digital signal processor adopts the TMS320F2407 chip.
The beneficial effects of the utility model are:
The utility model adopts the signal source sine wave of digitized chip AD9832 as metal detection equipment, has improved the stability of waveform generation like this, and can revise waveform parameter easily and effectively.
Description of drawings
Fig. 1 is the calcspar of the sinusoidal wave generating means of the utility model metal detector.
Fig. 2 is the digitized chip AD9832 cut-away view that the sinusoidal wave generating means of metal detector uses.
Fig. 3 is the connection layout of digitized chip AD9832.
Fig. 4 is the filter amplification circuit installation drawing.
Fig. 5 is a process flow diagram of the present utility model.
Embodiment
Fig. 1 is the calcspar of the sinusoidal wave generating means of the utility model metal detector.
Comprise Direct Digital Frequency Synthesizers 2 (AD9832), DSP1 (digital signal processor), external crystal-controlled oscillation 6, power supply 5, filtering circuit 3 and amplifier circuit device 4.
Wherein, DSP1, Direct Digital Frequency Synthesizers 2 (AD9832), filtering circuit 3, amplifying circuit 4 are connected in series successively, and external crystal oscillation circuit 6 is connected to Direct Digital Frequency Synthesizers 2 (AD9832).
5 pairs of entire circuit power supplies of power supply.
Fig. 2 is the digitized chip AD9832 cut-away view that the sinusoidal wave generating means of metal detector uses.
The maximum clock frequency of AD9832 can reach 25MHz, and AD9832 mainly is made up of digital controlled oscillator (NCO) and phase-modulator, sine look up table and one 10 figure place weighted-voltage D/A converter (DAC).Wherein digital controlled oscillator and phase-modulator partly comprise two 32 frequency register, one 32 phase accumulator and four 12 phase register.Phase accumulator can add up once at the phase increment Δ phase that each clock period is determined the frequency control sign indicating number temporarily among the figure, if numeration is then overflowed automatically greater than 2N, and the N bit digital that only keeps the back is in totalizer.Sine look up table ROM is used to realize the conversion from the phase value of phase accumulator output to the sine amplitude value, and according to the digital quantity corresponding among the phase value taking-up ROM that is input to sine look up table ROM with it, deliver among the DAC then and change it into analog quantity, at last by very pure sine wave signal of wave filter output.
Its output frequency f
OutRelevant with the phase increment Δ phase of clock fclk and the decision of frequency control sign indicating number.Available following formula is calculated:
f
out＝(Δphase/2N)fclk
In the formula, N is the bit value of phase accumulator.
According to adopting theorem, the highest output frequency of DDS should be less than fclk/2, and actually can only reach 40%fclk.
The minimum frequency resolution of DDS can be provided by following formula: Δ f
Min=fclk/2N
Therefore, as long as N is enough big, promptly the figure place of totalizer has enough length, just frequency resolution that can be required.
Because the programmability of AD9832 can be controlled its frequency and the change of range value by DSP, thereby obtain the generation of frequency source sine wave.When product passes through the probe segment of metal detector, having changed the inner magnetic density of probe distributes, on the amplitude of the output end voltage of sensor, reflect, by multistage amplifier circuit and filtering circuit, A/D converter sampling by TMS320LF2407 inside is handled data then, and the result is sent to the single-chip microcomputer end.
Fig. 3 is the connection layout of digitized chip AD9832.
It comprises that a model is the dsp chip of TMS320F2407, the external crystal-controlled oscillation of a 25MHz, a DDS digit chip AD9832, and capacitor C 1, C2, C3, C4 and resistance R 1, R2.
It below is the pin definitions of chip AD9832.Power lead, AVDD, DVDD.SCLK is the serial clock interface, and MCLK is the external clock interface.SDATA is a serial data interface, and FSYNC is a control signal port of synchronous transmission, and when its output low level, AD9832 is defined as and can accepts the data input.Pin FSELECT is that frequency is selected the position, and inner which frequency register of AD9832, FREQ0 or FREQ1 are selected in decision for use.Pin PSEL1, PSEL0 are that phase place is selected, and 4 phase registers are arranged in AD9832 inside, can determine to select for use which stockpile device by the value of PSEL1, PSEL0.Pin REFIN, the REFOUT of AD9832 is with reference to input, output voltage position.Pin FSADJUST is output limit electric current debugging position.IOUT is a signal output interface.Ground wire, AGND is simulation ground, DGND is for digitally.
Their annexation is described below: the pin 4 of AD9832 (Direct Digital Frequency Synthesizers) connects 2 pin of capacitor C 1, the 1 pin ground connection of C1, the pin 7 of AD9832 meets the 35 pin SPICLK of DSP (digital signal processor), the pin 8 of AD9832 meets the 30 pin SPISIMO of DSP, the pin 9 of AD9832 meets the 65 pin FSYNC1 of DSP, the pin 6 of AD9832 meets the output pin OUT of external crystal-controlled oscillation, the pin one 0 of AD9832,11,12,5 ground connection, the pin one 5 of AD9832 connects 1 pin of capacitor C 2,2 pin of C2 connect the pin one 6 of AD9832, the pin 1 of the pin one 4 connecting resistance R2 of AD9832, and as the output terminal of signal SINA, pin 2 ground connection of resistance R 2.The pin two of AD9832 connects 1 pin of capacitor C 3,2 pin ground connection of capacitor C 3, and the pin 3 of AD9832 connects its pin two, the pin 1 of the pin one connecting resistance R1 of AD9832,2 pin ground connection of resistance R 1.The output pin OUT of crystal oscillator connects the pin 6 of AD9832, the pin GND ground connection of crystal oscillator, and the pin VCC of crystal oscillator connects 1 pin of capacitor C 4, the 2 pin ground connection of C4.In addition, respectively to the power supply position of AD9832 pin 4 and 15, and the power pin VCC of crystal oscillator provides 3.3 volts of positive phase voltages.
Fig. 4 is the filter amplification circuit installation drawing.
Referring to figure, after the signal SINA output,, remove DC quantity through capacitor C 3 filtering, do through two stage amplifer again and amplify A, B processing, obtain pure sinusoidal signal.It is by two amplifier OP282 (low power high speed JEET input budget amplifier), 6 resistance R 3, R4, R5, R6, R7, R8, and a capacitor C 3 is formed.Their annexation is described below: sinusoidal source signal SINA connects the pin 1 of capacitor C 3, the pin 1 of the pin 2 connecting resistance R4 of capacitor C 3, the pin 2 of resistance R 4 connects the pin 2 of amplifier OP282 A, the pin 2 of OP282 A is the pin 1 of connecting resistance R5 again, the pin 2 of R5 connects the pin 1 of amplifier OP282 A, the pin 2 of the pin 3 connecting resistance R3 of amplifier OP282A, pin 1 ground connection of resistance R 3, the pin 8 of amplifier OP282 A connects positive 12 volts of power supplys, and the pin 4 of amplifier OP282 A connects negative 12 volts power supply.The pin 1 of OP282 A is the pin 1 of connecting resistance R7 again, and the pin 2 of resistance R 7 connects the pin 6 of amplifier OP282 B, and the pin 6 of OP282 B is the pin 1 of connecting resistance R8 again, and the pin 2 of resistance R 8 connects the pin 7 of OP282 B, the pin 7 of OP282 B and as final signal output SIN_OUT.The pin 2 of the pin 5 connecting resistance R6 of amplifier OP282 B, pin 1 ground connection of resistance R 6.
Fig. 5 is a process flow diagram of the present utility model.
Below concise and to the point set forth software flow implementation procedure 5 of the present utility model.Determine the phase place and the frequency of the sine wave that AD9832 produces by TMS320LF2407,2407 and AD9832 between use SPI Serial Peripheral Interface (SPI) module.Adopt active mode, the Serial Peripheral Interface (SPI) clock is then produced by the DSP Serial Peripheral Interface (SPI) and is exported by SPICLK pin (Pin 35).For DSP selects the CCS development environment for use, partly realize initialization at programming to the AD9832 chip, be commissioning test at last, and observe sinusoidal signal.
Essential characteristic of the present utility model and principle of work have more than been described, and associated advantages of the present utility model.The technician of the industry can understand; the utility model is not restricted to the described embodiments; the foregoing description and instructions just illustrate principle of the present utility model; under the prerequisite that does not break away from spirit and scope of the present utility model; the utility model also has various changes and modifications, and changes and improvements of the present utility model all fall in claimed the utility model scope.
The claimed scope of the utility model is defined by appending claims and equivalent.
Claims (9)
1, the sinusoidal wave generating means of a kind of metal detector, comprise Direct Digital Frequency Synthesizers (2), digital signal processor (1), external crystal oscillation circuit (6), filtering circuit (3) and amplifier circuit device (4), it is characterized in that, digital signal processor (1), Direct Digital Frequency Synthesizers (2), filtering circuit (3), amplifier circuit device (4) are connected in series successively, and external crystal oscillation circuit (6) is connected to Direct Digital Frequency Synthesizers (2).
2, the sinusoidal wave generating means of metal detector according to claim 1, it is characterized in that, the annexation of described digital signal processor (1) and Direct Digital Frequency Synthesizers (2): the pin 4 of AD9832 connects 2 pin of capacitor C 1, the 1 pin ground connection of C1, the pin 7 of AD9832 meets the 35 pin SPICLK of DSP, the pin 8 of AD9832 meets the 30 pin SPISIMO of DSP, the pin 9 of AD9832 meets the 65 pin FSYNC1 of DSP, the pin 6 of AD9832 meets the output pin OUT of external crystal-controlled oscillation, the pin one 0 of AD9832,11,12,5 ground connection, the pin one 5 of AD9832 connects 1 pin of capacitor C 2,2 pin of C2 connect the pin one 6 of AD9832, the pin 1 of the pin one 4 connecting resistance R2 of AD9832, and as the output terminal of signal SINA, pin 2 ground connection of resistance R 2, the pin two of AD9832 connects 1 pin of capacitor C 3,2 pin ground connection of capacitor C 3, the pin 3 of AD9832 connects its pin two, the pin 1 of the pin one connecting resistance R1 of AD9832,2 pin ground connection of resistance R 1, the output pin OUT of crystal oscillator connects the pin 6 of AD9832, the pin GND ground connection of crystal oscillator, the pin VCC of crystal oscillator connects 1 pin of capacitor C 4, the 2 pin ground connection of C4, in addition, respectively to the power supply position of AD9832 pin 4 and 15, and the power pin VCC of crystal oscillator provides 3.3 volts of positive phase voltages.
3, the sinusoidal wave generating means of metal detector according to claim 1 is characterized in that described amplifier circuit device (4) is to be connected in series by first order amplifier A and second level amplifier B two stage amplifer amplifier.
4, the sinusoidal wave generating means of metal detector according to claim 3 is characterized in that, described first order amplifier circuit is by OP282A, resistance R 3, R4, R5, and a capacitor C 3 is formed.
5, the sinusoidal wave generating means of metal detector according to claim 3 is characterized in that described second level amplifier circuit is made up of OP282B, resistance R 6, R7, R8.
6, the sinusoidal wave generating means of metal detector according to claim 3 is characterized in that described first order amplifier A and second level amplifier B adopt model OP282.
7, the sinusoidal wave generating means of metal detector according to claim 1 is characterized in that, comprises that also power supply (5) connects entire circuit, powers to entire circuit.
8, the sinusoidal wave generating means of metal detector according to claim 1 is characterized in that described Direct Digital Frequency Synthesizers (2) adopts digitized chip AD9832.
9, the sinusoidal wave generating means of metal detector according to claim 1 is characterized in that described digital signal processor (1) adopts the TMS320F2407 chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201520446U CN201266243Y (en) | 2008-08-15 | 2008-08-15 | Device for generating metal detector sine wave |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201520446U CN201266243Y (en) | 2008-08-15 | 2008-08-15 | Device for generating metal detector sine wave |
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| Publication Number | Publication Date |
|---|---|
| CN201266243Y true CN201266243Y (en) | 2009-07-01 |
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ID=40832617
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008201520446U Expired - Lifetime CN201266243Y (en) | 2008-08-15 | 2008-08-15 | Device for generating metal detector sine wave |
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| Country | Link |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102565185A (en) * | 2010-12-27 | 2012-07-11 | 上海太易检测技术有限公司 | Automatic phase tracking information processing method and device for use in metal foreign matter detector |
| CN104483716A (en) * | 2014-11-19 | 2015-04-01 | 东莞市南星电子有限公司 | Metal detector adjusting device |
| CN113109877A (en) * | 2021-03-30 | 2021-07-13 | 多科智能装备（常熟）有限公司 | Digital metal detector frequency generator |
-
2008
- 2008-08-15 CN CNU2008201520446U patent/CN201266243Y/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102565185A (en) * | 2010-12-27 | 2012-07-11 | 上海太易检测技术有限公司 | Automatic phase tracking information processing method and device for use in metal foreign matter detector |
| CN102565185B (en) * | 2010-12-27 | 2015-03-04 | 上海太易检测技术有限公司 | Automatic phase tracking information processing method for using in metal foreign matter detector |
| CN104483716A (en) * | 2014-11-19 | 2015-04-01 | 东莞市南星电子有限公司 | Metal detector adjusting device |
| CN104483716B (en) * | 2014-11-19 | 2017-06-06 | 东莞市南星电子有限公司 | Metal detector calibration apparatus |
| CN113109877A (en) * | 2021-03-30 | 2021-07-13 | 多科智能装备（常熟）有限公司 | Digital metal detector frequency generator |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI TAIYI TESTING TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: SHANGHAI TAIQI INFORMATION TECHNOLOGY CO., LTD. Effective date: 20090814 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20090814 Address after: Shanghai City, Xuhui District Jia Chuan Road No. 245 Building No. 3 room 506, zip code: 200237 Patentee after: Techik Instrument (Shanghai) Co., Ltd. Address before: Shanghai City, Xuhui District Jia Chuan Road No. 245 Building No. 3 room 506, zip code: 200237 Patentee before: Shanghai Techik Information Technology Co., Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20090701 |