CN201194331Y - Novel electric power filter - Google Patents
Novel electric power filter Download PDFInfo
- Publication number
- CN201194331Y CN201194331Y CNU2008200216383U CN200820021638U CN201194331Y CN 201194331 Y CN201194331 Y CN 201194331Y CN U2008200216383 U CNU2008200216383 U CN U2008200216383U CN 200820021638 U CN200820021638 U CN 200820021638U CN 201194331 Y CN201194331 Y CN 201194331Y
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- signal processor
- processor dsp
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/40—Arrangements for reducing harmonics
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- Power Conversion In General (AREA)
Abstract
The utility model discloses a novel power filter, which comprises a digital signal processor DSP I. The digital signal processor DSP I and an A/D converter are electrically connected with an IGBT full-bridge PWM converter circuit, the digital signal processor DSP I is also electrically connected with a programmable logic device CPLD, the programmable logic device CPLD is electrically connected with a digital signal processor DSP II, and the digital signal processor DSP II is electrically connected with a man-machine interface and an external circuit. The utility model is capable of realizing precise and rapid harmonic analysis and inhibition for nondeformed or deformed electric network, and compensating reactive power.
Description
Technical field
The utility model relates to the power electronics harmonic treating apparatus that harmonic content, compensating power were analyzed, also realized dynamically suppressing to a kind of real-time online harmonic content that is used for power supply system.
Background technology
At present, the Active Power Filter-APF that industry spot is used by singlechip chip or low speed digital signal process chip as data processing and control core, by collection and processing to the electrical network three-phase signal, the control convertor circuit produces the corresponding signal of telecommunication and feeds back to electrical network, thereby reaches the purpose that suppresses harmonic wave, compensating power.But this electric-power filter in the three-phase voltage of electrical network certain mutually or after the heterogeneous generation distortion, can cause the asymmetric of three-phase voltage, use to finish behind this traditional active filter harmonic content and reactive power are analyzed accurately and rapidly, calculated, thereby cause convertor circuit to produce the compensating signal of harmonic wave and reactive power mistakenly, make the pollution aggravation of electrical network.
Summary of the invention
For overcome existing Active Power Filter-APF can not finish to the distortion three phase mains carry out accurately and apace analyzing and the inhibition problem, the utility model provides a kind of novel electric power filter, and it can realize carrying out harmonic analysis accurately and rapidly and inhibition and reactive power compensation function to not producing distortion or producing the electrical network that distorts.
Its technical scheme is:
A kind of novel electric power filter, comprise digital signal processor DSP I, digital signal processor DSP I is electrically connected with A/D converter and IGBT full bridge PWM convertor circuit, digital signal processor DSP I also is electrically connected with programmable logic device (CPLD), programmable logic device (CPLD) is electrically connected with digital signal processor DSP II, and digital signal processor DSP II is electrically connected with man-machine interface circuit and external circuit.
Be provided with the Controlled CPU chip of harmonic wave control and reactive power compensation in the above-mentioned digital signal processor DSP I, be provided with the control circuit that harmonic content analysis and LCD show in the digital signal processor DSP II.
Above-mentioned digital signal processor DSP I is electrically connected with A/D converter I and A/D converter II, A/D converter I is electrically connected with the current sensor of temperature sensor and grid side, respectively is provided with a signal conditioning circuit between A/D converter I and temperature sensor and the current sensor; A/D converter II is electrically connected with the current sensor and the voltage sensor of load-side, respectively is provided with a signal conditioning circuit between A/D converter II and current sensor and the voltage sensor.
Be disposed with photoelectric isolating circuit and Drive Protecting Circuit between above-mentioned digital signal processor DSP I and the IGBT full bridge PWM convertor circuit.
Above-mentioned IGBT full bridge PWM convertor circuit is electrically connected with bus circuit by isolating reactor.
Above-mentioned man-machine interface circuit comprises LCD display circuit and touch screen control circuit, and touch-screen adopts four-wire resistance type touch screen.
The said external circuit comprises RS485 communication interface, ethernet interface and USB interface.
Above-mentioned signal conditioning circuit comprises amplifying unit, filter unit and phase locked-loop unit.
Above-mentioned current sensor and voltage sensor adopt Hall element.
The beneficial effects of the utility model are: when this filter is used for power supply system, but real-time online is analyzed harmonic content, and realize dynamically suppressing harmonic content, compensating power, the electric network pollution that can harmonic carcellation causes improves the electric power system quality.
Description of drawings
Accompanying drawing 1 is a schematic block circuit diagram of the present utility model;
Accompanying drawing 2 is the theory diagram of signal conditioning circuit described in the utility model.
Embodiment
Be described in further detail below in conjunction with 1,2 pairs of the utility model of accompanying drawing: as shown in Figure 1, a kind of novel electric power filter, comprise digital signal processor DSP I, digital signal processor DSP I is electrically connected with A/D converter I, A/D converter II and IGBT full bridge PWM convertor circuit, digital signal processor DSP I also is electrically connected with programmable logic device (CPLD), programmable logic device (CPLD) is electrically connected with digital signal processor DSP II, and digital signal processor DSP II is electrically connected with man-machine interface circuit and external circuit.A/D converter I is electrically connected with temperature sensor by signal conditioning circuit, is electrically connected with the current sensor of grid side by signal conditioning circuit; A/D converter II is electrically connected with the current sensor of load-side by signal conditioning circuit, is electrically connected with the voltage sensor of load-side by signal conditioning circuit; Be disposed with Drive Protecting Circuit and photoelectric isolating circuit between IGBT full bridge PWM convertor circuit and digital signal processor DSP I, IGBT full bridge PWM convertor circuit is connected with bus circuit by isolating reactor.
Digital signal processor DSP I and DSP II are high speed digital signal processor MPU, as data processing, logic control core, finish collection, the harmonic data analysis of electrical network loop parameter, and output control electrical network loop harmonic content.Wherein digital signal processor DSP I gathers three-phase voltage, the current data in electrical network loop, adopt modified model instantaneous reactive power theory algorithm process data, and the harmonic content and the reactive power in analysis electrical network loop, generation is to the compensating control signal of electrical network, as the control signal of convertor circuit, realize accuracy and rapidity to power network harmonic wave management and reactive power compensation.Digital signal processor DSP II adopts fast fourier algorithm to carry out the analysis of harmonic content, calculates the each harmonic content value, and shows the each harmonic value in real time, controls the transmission of image data simultaneously.
Programmable logic device (CPLD) adopts low-power consumption, high speed logic control chip, as the auxiliary logic control device, synchronous detecting control to three-phase voltage, current signal, realize high speed logic and sequencing control, simultaneously be provided with the FLASH memory in the programmable logic device (CPLD), be used to store and transmit the swap data between digital signal processor DSP I and the DSP II.
Voltage sensor and current sensor employing high accuracy, Hall voltage transducer, current sensor that the linearity is good are realized the conversion to the voltage and current signal.
Signal conditioning circuit is made of amplifying circuit, low-pass filter circuit, phase-locked loop circuit and sampling hold circuit, finish amplification, Filtering Processing to the voltage or the current signal of sensor acquisition, and synchronized sampling, to the phase-locked and automatic following function of mains frequency.Filter circuit adopts active second order Butterworth LPF.Sampling hold circuit is finished the synchronous maintenance to three-phase voltage and current signal, to realize the synchronized sampling of voltage and current signal.
The A/D change-over circuit adopts high-speed a/d converter, and its picking rate is 8000 times/second.
IGBT full bridge PWM convertor circuit is realized the real-Time Compensation effect to mains by harmonics under digital signal processor DSP I control, reach the purpose of eliminating high order harmonic component.Adopt the high performance circuit structure with each combination of devices together, utilization is ripe, algorithm is realized analysis, the processing of data efficiently, thereby realizes accurate, compensation fast to distorted signal, improves power grid quality.
The man-machine interface circuit is made up of LCD liquid crystal display circuit and touch screen control circuit, and touch-screen adopts four-wire resistance type touch screen, and is easy and simple to handle.Show to adopt 320x240 figure form crystal display, can show each phase electrical quantity of control loop in real time, have the demonstrations such as curve, harmonic wave rod figure of parameter simultaneously.
Photoelectric isolating circuit adopts photoelectrical coupler, realizes the isolation of unsteady flow drive circuit and dsp control signal, the antijamming capability of raising system and job stability, reliability.
Isolate the effect that reactor plays protection IGBT.
External circuit comprises RS485 communication interface, ethernet interface and USB interface.
Certainly, protection range of the present utility model is not limited to the foregoing description, so long as those of ordinary skill in the art is through creatively improving, and just should be within protection range of the present utility model.
Claims (9)
1. novel electric power filter, it is characterized in that: comprise digital signal processor DSP I, digital signal processor DSP I is electrically connected with A/D converter and IGBT full bridge PWM convertor circuit, digital signal processor DSP I also is electrically connected with programmable logic device (CPLD), programmable logic device (CPLD) is electrically connected with digital signal processor DSP II, and digital signal processor DSP II is electrically connected with man-machine interface circuit and external circuit.
2. novel electric power filter according to claim 1, it is characterized in that being provided with in the described digital signal processor DSP I Controlled CPU chip of harmonic wave control and reactive power compensation, be provided with the control circuit that harmonic content analysis and LCD show in the digital signal processor DSP II.
3. novel electric power filter according to claim 1 and 2, it is characterized in that described digital signal processor DSP I is electrically connected with A/D converter I and A/D converter II, A/D converter I is electrically connected with the current sensor of temperature sensor and grid side, respectively is provided with a signal conditioning circuit between A/D converter I and temperature sensor and the current sensor; A/D converter II is electrically connected with the current sensor and the voltage sensor of load-side, respectively is provided with a signal conditioning circuit between A/D converter II and current sensor and the voltage sensor.
4. novel electric power filter according to claim 1 is characterized in that being disposed with photoelectric isolating circuit and Drive Protecting Circuit between described digital signal processor DSP I and the IGBT full bridge PWM convertor circuit.
5. according to claim 1 or 4 described novel electric power filters, it is characterized in that described IGBT full bridge PWM convertor circuit is electrically connected with bus circuit by isolating reactor.
6. novel electric power filter according to claim 1 is characterized in that described man-machine interface circuit comprises LCD display circuit and touch screen control circuit, and touch-screen adopts four-wire resistance type touch screen.
7. novel electric power filter according to claim 1 is characterized in that described external circuit comprises RS485 communication interface, ethernet interface and USB interface.
8. novel electric power filter according to claim 3 is characterized in that described signal conditioning circuit comprises amplifying unit, filter unit and phase locked-loop unit.
9. novel electric power filter according to claim 3 is characterized in that described current sensor and voltage sensor adopt Hall element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200216383U CN201194331Y (en) | 2008-04-30 | 2008-04-30 | Novel electric power filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200216383U CN201194331Y (en) | 2008-04-30 | 2008-04-30 | Novel electric power filter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201194331Y true CN201194331Y (en) | 2009-02-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008200216383U Expired - Fee Related CN201194331Y (en) | 2008-04-30 | 2008-04-30 | Novel electric power filter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201194331Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102315647A (en) * | 2011-09-08 | 2012-01-11 | 天津理工大学 | Active power filter based on auxiliary resonant soft switching technology and soft start method |
| CN104793079A (en) * | 2015-04-16 | 2015-07-22 | 上海理工大学 | Active power filter monitoring system |
-
2008
- 2008-04-30 CN CNU2008200216383U patent/CN201194331Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102315647A (en) * | 2011-09-08 | 2012-01-11 | 天津理工大学 | Active power filter based on auxiliary resonant soft switching technology and soft start method |
| CN104793079A (en) * | 2015-04-16 | 2015-07-22 | 上海理工大学 | Active power filter monitoring system |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090211 |