CN201188583Y - Control circuit with zero-voltage and zero-current as well as soft switch for arc-welding inverter - Google Patents
Control circuit with zero-voltage and zero-current as well as soft switch for arc-welding inverter Download PDFInfo
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- CN201188583Y CN201188583Y CNU2008200802604U CN200820080260U CN201188583Y CN 201188583 Y CN201188583 Y CN 201188583Y CN U2008200802604 U CNU2008200802604 U CN U2008200802604U CN 200820080260 U CN200820080260 U CN 200820080260U CN 201188583 Y CN201188583 Y CN 201188583Y
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model relates to a control circuit of a zero-voltage zero-current soft-switching inverter arc welding power supply, which is suitable for the technical field of welding. The control circuit comprises a pulse generating circuit, a slope compensation circuit, an arithmetic circuit, a protective circuit, an action spot deciding circuit, a lagging leg pulse width regulating circuit, a programmable logic device and an isolating amplifier circuit. The pulse generating circuit adopts a current mode PWM integrated controller to generate PWM pulse signals in two paths, and the PWM pulse signals are sent into the programmable logic device; the programmable logic device is programmed and is cooperated with the lagging leg pulse width regulating circuit to regulate the PWM pulse width; leading leg driving signals PWM 1, PWM2 and lagging leg driving signals PWM 3, PWM 4 can be generated by the programmable logic device. The circuit avoids the phenomenon that electric welding machines work in a forcedly-switching state in high-power output, therefore, the reliability of electric welding machines is enhanced.
Description
Technical field
The utility model relates to a kind of control circuit of zero voltage zero current soft-switching arc welding inverter, is applicable to welding technology field.
Background technology
Traditional arc welding inverter main circuit power device works in the hard switching mode, and its course of work switching loss is big, switch stress is big, has influenced its reliability.Adopt soft switch technique can improve the switch environment of power device, thereby improve the reliability of welding machine.Adopt insulated gate bipolar transistor (IGBT) at high-power arc welding inverter main circuit power device at present, there is the bigger tail current that takes off in it, and has bigger turn-off power loss and stress more.2 IGBT are zero voltage switch (ZVS) to adopt full-bridge zero-voltage zero current pulse-width modulation (FB-ZVZCS-PWM) technology can make wherein, other 2 IGBT are zero current (ZCS) switch, can overcome above-mentioned shortcoming, thereby be more suitable in high-power arc welding inverter.
In the control mode of full-bridge zero-voltage zero-current soft switch, a kind of control mode has obtained more concern in recent years.The characteristics of this control mode are: 180 ° of complementary conductings of two of a brachium pontis switching tubes in the circuit, the conducting EDM Generator of Adjustable Duty Ratio of two switching tubes of another brachium pontis.For example, in positive half period, switching tube Q
1, Q
4Conducting simultaneously, switching tube Q
4Open-minded always in positive half period, and switching tube Q
1Control requires only to open a period of time according to duty ratio; In like manner, in negative half-cycle, switching tube Q
2, Q
3Conducting simultaneously, switching tube Q
3Open-minded always in negative half-cycle, and switching tube Q
2Control requires only to open a period of time according to duty ratio.Switching tube Q
1And Q
2Respectively at switching tube Q
4With switching tube Q
3Turn-off, as shown in the figure before.Can define switching tube Q
1And Q
2The brachium pontis of forming is leading arm, and its drive signal is PWM1 and PWM2, and switching tube Q
4With switching tube Q
3The brachium pontis of being formed is called lagging leg, and its drive signal is PWM3 and PWM4.This control can realize the zero voltage switch (ZVS) of leading-bridge switching tube and the Zero Current Switch (ZCS) of lagging leg switching tube.In the existing this control method, when drive signal is maximum pulse width, the drive signal pulsewidth of two of the diagonal angle IGBT is identical each other, the drive signal of lagging leg and leading arm overlaps, as shown in Figure 6, can not create the time for the circulation on the former limit of transformer, this moment, lagging leg can't be realized Zero Current Switch.Therefore, this kind control method can not be implemented in the soft switch under the maximum load situation, and Fig. 1 is the generator characteristic curve of the electric welding machine of this control method control.
The utility model content
The purpose of this utility model has been to overcome the above-mentioned deficiency of prior art, and a kind of control circuit of zero voltage zero current soft-switching arc welding inverter is provided.This circuit is operated in the hard switching state when having avoided the output of electric welding machine high power, has improved the reliability of electric welding machine, can make electric welding machine when small-power is exported simultaneously, and main circuit transfers half-bridge mode to, strengthens control precision.
To achieve these goals, the utility model has been taked following technical scheme.Include pulse generating circuit 1, slope compensation circuit 2, computing circuit 3, protective circuit 4, working point decision circuit 5, lagging leg pulse width modulation circuit 6, circuits for triggering 7, programmable logic device 8 and isolating amplifier circuit 9.Wherein: the output current set point Ig of electric welding machine and the actual output current Iout of electric welding machine link to each other with the input of computing circuit 3, and the actual output current Iout of electric welding machine also links to each other with the input of working point decision circuit 5; The output of computing circuit 3 links to each other with the input of pulse generating circuit 1, also links to each other with the input of lagging leg pulse width modulation circuit 6 simultaneously; The output of slope compensation circuit 2 links to each other with the input of pulse generating circuit 1; The synchronizing signal SYS1 output of pulse generating circuit 1 links to each other with circuits for triggering 7 inputs, the pulse signal PULSE1 of pulse generating circuit 1 links to each other with the input of PULSE2 output with programmable logic device 8, and pulse generating circuit 1 synchronous sawtooth signal Vswt output links to each other with lagging leg pulse width modulation circuit 6 inputs; The CLK1 signal output part that lagging leg pulse width modulation circuit 6 produces links to each other with programmable logic device 8 inputs, the working point is set electric current I set and is linked to each other with the input of working point decision circuit 5, and the Ip output of working point decision circuit 5 links to each other with the input of programmable logic device 8; The output of protective circuit 4 links to each other with the input of programmable logic device 8 with pulse generating circuit 1; The pulse signal CLK2 output of circuits for triggering 7 links to each other with the input of programmable logic device 8 with synchronizing signal SYS2 output; Leading arm drive signal PWM1, PWM2 that programmable logic device 8 produces and the output of lagging leg drive signal PWM3, PWM4 link to each other with the input of isolating amplifier circuit 9.
The control method of the control circuit of zero voltage zero current soft-switching arc welding inverter, this method is carried out according to the following steps:
(1) as voltage deviation signal Vea during less than Vmin, PULSE1 and PULSE2 signal that pulse generating circuit produces are low level, send into programmable logic device 8, direct without logical operation as leading arm drive signal PWM1 and PWM2, the SYS2 signal that CLK1 and PULSE1, PULSE2 and circuits for triggering produce carries out logical operation and produces PWM3 and PWM4 in programmable logic device, this moment, main circuit was operated under the half-bridge mode;
(2) as voltage deviation signal Vea during greater than Vmin, and the actual output current Iout of electric welding machine sets electric current I set (90% of electric welding machine maximum output current less than the working point, Iset can adjust according to the IGBT ability to bear that adopts) time, PULSE1 and PULSE2 signal that pulse generating circuit produces are pwm pulse signal, send into programmable logic device 8, direct without logical operation as leading arm drive signal PWM1 and PWM2; The SYS2 signal that CLK1 and PULSE1, PULSE2 and circuits for triggering produce carries out logical operation and produces lagging leg drive signal PWM3 and PWM4 in programmable logic device, this moment, main circuit was operated under the full-bridge mode of finite both driving;
(3) as voltage deviation signal Vea during greater than Vmin, and the actual output current Iout of electric welding machine sets electric current I set (90% of electric welding machine maximum output current greater than the working point, Iset can adjust according to the IGBT ability to bear that adopts) time, PULSE1 and PULSE2 signal that pulse generating circuit produces are pwm pulse signal, the CLK2 that produces with circuits for triggering carries out AND operation in programmable logic device 8, the back is as leading arm drive signal PWM1 and PWM2 respectively the pulse duration of PULSE1 and PULSE2 to be reduced certain hour (close the primary current of having no progeny more than or equal to leading arm and decay to zero required time t), and the SYS2 signal of CLK1 and PULSE1 and PULSE2 and circuits for triggering generation carries out logical operation and produces lagging leg drive signal PWM3 and PWM4 in programmable logic device.
The size of Vmin in step 1, step 2 and the step 3 is the critical comparison value that pulse generating circuit can output pwm signal.
T value in the step 3 is:
Compared with prior art, the utlity model has following advantage:
1) cooperates the programmable logic device chip by a Schmidt trigger circuit, make drive waveforms PWM1, PWM2, PWM3, the PWM4 of IGBT when maximum pulse width, leading arm PWM1, PWM2 be lead-lag arm PWM3, PWM4 certain hour still, so just created condition for the Zero Current Switch of lagging leg, when making maximum pulse width, still can realize soft switch.Avoid electric welding machine when high power is exported, to be operated in the hard switching state, improved the reliability of electric welding machine.
2) reduce IGBT and drive pulsewidth, when the driving pulsewidth vanishing of leading arm, the driving pulsewidth of lagging leg still exists, and this moment, main circuit of the welding machine was transformed under the half-bridge mode by full-bridge mode, was suitable for small-power output.
Description of drawings
Fig. 1 is the generator characteristic curve that does not adopt the utility model circuit control electric welding machine;
Fig. 2 is the generator characteristic curve that adopts the utility model circuit control electric welding machine;
Fig. 3 is a full-bridge zero-voltage zero current soft-switching arc welding inverter main circuit;
Fig. 4 is an entire system block diagram of the present utility model;
Fig. 5 is an operational flow diagram of the present utility model;
Fig. 6 is the maximum pulse width drive waveforms that does not adopt the utility model circuit;
Fig. 7 is the maximum pulse width drive waveforms that adopts the utility model circuit;
Fig. 8 is circuit theory diagrams of the present utility model;
Fig. 9 is the drive waveforms figure under the half-bridge mode of the present utility model;
The schematic diagram that leading arm drive waveforms when Figure 10 is the utility model maximum pulse width produces;
Figure 11 is the logic relation picture of the input/output signal in the programmable logic controller (PLC).
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail.
Present embodiment is by increasing by one road circuits for triggering, when the IGBT drive signal is maximum pulse width, make the drive signal of leading arm and the pulse signal of circuits for triggering generation carry out AND operation, can make leading arm turn-off certain hour in advance than lagging leg, as shown in Figure 7, reduced the voltage of high power output services point, for the circulation on the former limit of transformer in the welder power has been created the time, realized the soft switch under the maximum load situation, controlled the generator characteristic curve of electric welding machine for adopting the utility model control circuit at Fig. 2.Simultaneously when power output hour, drive waveforms becomes the half-bridge driven mode by the full-bridge type of drive, is fit to small-power output.
As shown in Figure 8, present embodiment mainly includes compositions such as computing circuit, pulse generating circuit, working point decision circuit, circuits for triggering, programmable logic device.
(1) computing circuit and pulse generating circuit: the actual output current Iout of electric welding machine connects 2 pin of operational amplifier LF353 through resistance R 4, output current set point Ig connects 2 pin of LF353 through resistance R 5,2 pin connecting resistance R16 and the capacitor C 4 of LF353,3 pin are by resistance R 15 ground connection, 8 pin connect+15 volts of power supplys, + 15 volts of power supplys are by capacitor C 17 ground connection, 4 pin connect-15 volts of power supplys,-15 volts of power supplys are by capacitor C 16 ground connection, 1 pin meets capacitor C 4 and C5,1 pin of operational amplifier LF353 produces voltage deviation signal Vea through 5 pin that R26 meets PWM integrated manipulator UC3846, connects the resistance R 2 in the lagging leg pulse width modulation circuit simultaneously.1 pin of UC3846 is by R6 and R17 ground connection, meet reference voltage VREF by R3, connect capacitor C 8 between 2 pin of UC3846 and 3 pin, 4 pin of UC3846 connect slope compensation circuit, 6 pin of UC3846 link to each other with 7 pin, 8 pin of UC3846 are by capacitor C 6 and C7 ground connection, 9 pin of UC3846 are by resistance R 18 and R19 ground connection, 11 pin connecting resistance R27, R27 meets programmable logic device GAL18V10 simultaneously by resistance R 28 ground connection, 14 pin connecting resistance R29, R29 meets programmable logic device GAL18V10 simultaneously by resistance R 30 ground connection, and 15 pin of UC3846 connect+15 volts of power supplys, + 15 volts of power supplys are by capacitor C 9 ground connection, 13 pin of UC3846 connect+15 volts of power supplys by R20, pass through C10, C11 ground connection, the 12 pin ground connection of UC3846.
(2) 10 pin of lagging leg pulse width modulation circuit: LM339 connect resistance R 26 in the computing circuit by resistance R 2, by capacitor C 1 ground connection, 11 pin connect 8 pin of UC3846 in the pulse generating circuit by resistance R 1, by R7 ground connection, 13 pin of LM339 connect+5 volts of power supplys by resistance R 9, meet programmable logic device GAL18V10 simultaneously.
(3) working point decision circuit and circuits for triggering: the actual output current Iout of electric welding machine connects anode and the resistance R 8 of diode D1, the negative electrode of diode D1 and resistance R 8 connect capacitor C 3, connect 8 pin of voltage comparator LM339 simultaneously, 9 pin of LM339 connect+15 volts of power supplys by resistance R 12, by resistance R 11 ground connection, 14 pin connect+5 volts of power supplys by resistance R 10, meet programmable logic device GAL18V10 simultaneously; If Iout is greater than R11 both end voltage Iset, the 14 pin output low levels of LM339 then, CLK2 signal participation that circuits for triggering produce and the AND operation of PULSE1 and PULSE2, as shown in figure 10.5 pin of LM339 connect 10 pin of UC3846 in the pulse generating circuit, simultaneously by resistance R 23 ground connection, 4 pin of LM339 connect+15 volts of power supplys by resistance R 21, by resistance R 22, capacitor C 12 ground connection, 3 pin of LM339 connect+15 volts of power supplys, + 15 volts of power supplys are by C13 ground connection, 2 pin connect+5 volts of power supplys by R25, connect 4 pin of Schmidt trigger CD4098 simultaneously, 4 pin of CD4098 connect programmable logic device by resistance R 14,3 of CD4098,5,16 pin connect+5 volts of power supplys, + 5 volts of power supplys are by C15 ground connection, 1 of CD4098,8 pin ground connection have between 2 pin and the ground between capacitor C 14,2 pin and 3 pin resistance R 24 are arranged.By regulating the size of C14 and R24, then can change the pulse duration of the pulse signal CLK2 of circuits for triggering generation, 6 pin of CD4098 connect programmable logic device by resistance R 13, programmable logic device GAL18V10 produce 4 road pwm signal PWM1, PWM2, PWM3, PWM4 connect isolating amplifier circuit.PWM1 and PWM2 are as leading arm drive signal, and PWM3 and PWM4 are as the lagging leg drive signal.
Describe the circuit working principle in detail below in conjunction with accompanying drawing:
1) when 5 pin of operational amplifier LF353 produces voltage deviation signal Vea less than Vmin (for the PWM integrated manipulator selected for use the critical comparison value can output pwm signal the time), PULSE1 and PULSE2 signal that pulse generating circuit produces are low level, send into programmable logic device 8, direct without logical operation as leading arm drive signal PWM1 and PWM2, CLK1 and PULSE1, the SYS2 signal that PULSE2 and circuits for triggering produce carries out logical operation and produces lagging leg drive signal PWM3 and PWM4 in programmable logic device, this moment, main circuit was operated under the half-bridge mode, and drive waveforms as shown in Figure 9.
2) as voltage deviation signal Vea during greater than Vmin (for the PWM integrated manipulator selected for use the critical comparison value can output pwm signal the time), and the actual output current Iout of electric welding machine sets electric current I set (90% of electric welding machine maximum output current less than the working point, Iset can adjust according to the IGBT ability to bear that adopts) time, PULSE1 and PULSE2 signal that pulse generating circuit produces are pwm pulse signal, send into programmable logic device, direct without logical operation as leading arm drive signal PWM1 and PWM2 signal; The SYS2 signal that CLK1 and PULSE1, PULSE2 and circuits for triggering produce carries out logical operation and produces lagging leg drive signal PWM3 and PWM4 in programmable logic device, this moment, main circuit was operated under the full-bridge mode of finite both driving.
3) as voltage deviation signal Vea during greater than Vmin (for the PWM integrated manipulator selected for use the critical comparison value can output pwm signal the time), and the actual output current Iout of electric welding machine sets electric current I set (90% of electric welding machine maximum output current greater than the working point, Iset can adjust according to the IGBT ability to bear that adopts) time, PULSE1 and PULSE2 signal that pulse generating circuit produces are pwm pulse signal, and the CLK2 that circuits for triggering produce is (by changing the time of integration that capacitor C 14 and resistance R 24 are arranged between CD40982 pin and the ground, then can change the pulse duration of CLK2, pulse duration with CLK is set at 22us in the present embodiment) in programmable logic device, carrying out AND operation, pulse duration with PULSE1 and PULSE2 reduces certain hour (this time is 3us in the example originally executing) respectively, the back is as leading arm drive signal PWM1 and PWM2, CLK1 and PULSE1, the SYS2 signal that PULSE2 and circuits for triggering produce carries out logical operation and produces PWM3 and PWM4 in programmable logic device.Figure 10 is that leading arm drive signal PWM1 and PWM2 produce schematic diagram.When wherein SYS1 is maximum pulse width output, the dead band signal between PULSE1 and the PULSE2, pulse duration is 5us, frequency is 40KHz; CLK2 produces the signal that obtains by SYS 1 through Schmidt trigger, and its rising edge is identical with the SYS1 signal, and frequency is all 40KHz, and pulse duration is 22us, and the pulse duration of PULSE1 and PULSE2 is 20us.Can calculate the part that CLK2 and PULSE1 and PULSE2 pulse duration coincide is 22us-5us=17us, therefore CLK2 and PULSE1 and PULSE2 carry out the PWM1 that produces after the AND operation and PWM2 signal and have reduced 3us than the pulse duration of PULSE1 and PULSE2, and the soft switch when realizing maximum pulse width provides circulation time.
The size of Vmin is critical comparison value that can output pwm signal for the PWM integrated manipulator selected for use, and the integrated control chip of the PWM that adopts among the design is UC3846, and critical comparison value is 0.5V.
The operation relation in programmable logic device in step 1, step 2, step 3 as shown in figure 11.
CLK1 links to each other with the input of inverter NOT1, the output of NOT1 respectively with three inputs with or door 1 link to each other with 5 input, three inputs with or door 4 and 2 output and three inputs with or the input of door 1 link to each other, three inputs with or the output of door 1 and three inputs with or 2 input link to each other;
SYS2 respectively with inverter NOT2 and three the input with or the door 8,9 input links to each other, the output of NOT1 and three the input with or the door 2,4 link to each other with 6 input, three inputs with or door 3 output and low level " " with three inputs with or 4 input link to each other, three inputs with or door 4 output and three inputs with or the input of door 3 link to each other, low level " " with three inputs with or door 3 link to each other with 2 input, three inputs with or door 3 output and three inputs with or door 4 link to each other with 6 input, three inputs with or door 2 output and three inputs with or the input of door 5 link to each other, three inputs with or the output of door 5 respectively with three inputs with or 6, the input of four inputs or door OR2 and OR3 links to each other;
PULSE2 links to each other with the input of inverter NOT3, the output of NOT3 respectively with three inputs with or door 7 link to each other with 11 input, three inputs with or door 10 and 8 output and three inputs with or the input of door 7 link to each other, three inputs with or door 7 output and three inputs with or the input of door 8 link to each other
PULSE1 links to each other with the input of inverter NOT4, the output of NOT4 and three the input with or the door 8,10 link to each other with 12 input, three inputs with or door 9 and 12 output and three inputs with or the input of door 10 link to each other, three inputs with or door 10 output and three inputs with or the input of door 9 link to each other, three inputs with or door 9 output and three inputs with or door 10 link to each other with 12 input, three inputs with or door 8 output and three inputs with or the input of door 11 link to each other, three inputs with or door 11 output respectively with three inputs with or door 12, the input of four inputs or door OR2 and OR3 links to each other, three inputs with or the output of door 12 respectively with three inputs with or 10, the input of four inputs or door OR2 and OR3 links to each other.
Claims (1)
1, the control circuit of zero voltage zero current soft-switching arc welding inverter includes pulse generating circuit (1), slope compensation circuit (2), computing circuit (3), protective circuit (4); It is characterized in that: also include working point decision circuit (5), lagging leg pulse width modulation circuit (6), circuits for triggering (7), programmable logic device (8) and isolating amplifier circuit (9); Wherein: the output current set point Ig of electric welding machine and the actual output current Iout of electric welding machine link to each other with the input of computing circuit (3), and the actual output current Iout of electric welding machine also links to each other with the input of working point decision circuit (5); The output of computing circuit (3) links to each other with the input of pulse generating circuit (1), also links to each other with the input of lagging leg pulse width modulation circuit (6) simultaneously; The output of slope compensation circuit (2) links to each other with the input of pulse generating circuit (1); The synchronizing signal SYS1 output of pulse generating circuit (1) links to each other with circuits for triggering (7) input, the pulse signal PULSE1 of pulse generating circuit (1) links to each other with the input of PULSE2 output with programmable logic device (8), and pulse generating circuit (1) sawtooth signal Vswt output synchronously links to each other with lagging leg pulse width modulation circuit (6) input; The CLK1 signal output part that lagging leg pulse width modulation circuit (6) produces links to each other with programmable logic device (8) input, the working point is set electric current I set and is linked to each other with the input of working point decision circuit (5), and the judgement signal Ip output of working point decision circuit (5) links to each other with the input of programmable logic device (8); The guard signal SHUT output of protective circuit (4) links to each other with the input of programmable logic device (8) with pulse generating circuit (1); The pulse signal CLK2 output of circuits for triggering (7) links to each other with the input of synchronizing signal SYS2 output with programmable logic device (8); Leading arm drive signal PWM1, PWM2 that programmable logic device (8) produces and the output of lagging leg drive signal PWM3, PWM4 link to each other with the input of isolating amplifier circuit (9).
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CNU2008200802604U CN201188583Y (en) | 2008-04-30 | 2008-04-30 | Control circuit with zero-voltage and zero-current as well as soft switch for arc-welding inverter |
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CNU2008200802604U CN201188583Y (en) | 2008-04-30 | 2008-04-30 | Control circuit with zero-voltage and zero-current as well as soft switch for arc-welding inverter |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101618472B (en) * | 2009-08-06 | 2012-07-04 | 唐山松下产业机器有限公司 | Soft switching inversion welding machine |
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2008
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101618472B (en) * | 2009-08-06 | 2012-07-04 | 唐山松下产业机器有限公司 | Soft switching inversion welding machine |
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GR01 | Patent grant | ||
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Effective date of abandoning: 20080430 |
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