CN201188536Y - Protector for over voltage, undervoltage and lack phase of power supply - Google Patents
Protector for over voltage, undervoltage and lack phase of power supply Download PDFInfo
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- CN201188536Y CN201188536Y CNU2008201147520U CN200820114752U CN201188536Y CN 201188536 Y CN201188536 Y CN 201188536Y CN U2008201147520 U CNU2008201147520 U CN U2008201147520U CN 200820114752 U CN200820114752 U CN 200820114752U CN 201188536 Y CN201188536 Y CN 201188536Y
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Abstract
A protector of power supply for overvoltage, under voltage and lack-phase relates to electric power control equipment. The protector is characterized in that the input end of a sample circuit is connected with the output end of a main circuit breaker, the output end of the sample circuit is connected with one input end of a logic identifying circuit, the output end of a reference circuit is connected with the other input end of the logic identifying circuit, the output end of the logic identifying circuit is connected with the input end of a time delay circuit, the output end of the time delay circuit is connected with the input end of a switching control circuit, and the output end of the switching control circuit is connected with an input end of the main circuit breaker. The utility model has the advantages that the protector of power supply for overvoltage, under voltage and lack-phase is not influenced by the current and the voltage of a circuit load loop, has high sensitivity, high reliability, low cost and small volume, and can be used as an accessory to be assembled to breakers of different products.
Description
Technical field
The utility model relates to electric control appliance, a kind of specifically overvoltage of power supply under voltage open phase protector.
Background technology
Existing three-phase power consumption equipment is under-voltage or owe to move mutually because of electrical network or circuit question through regular meeting, finally causes power consumption equipment to damage.Under-voltage open-phase protection product on the market adopts current sampling or phase line to zero sampling, the cost height, and volume is big, influenced by the load circuit current/voltage, and protective value is poor.
The utility model content
At the defective that exists in the prior art; the purpose of this utility model is to provide a kind of overvoltage of power supply under voltage open phase protector; not influenced by the circuit load loop current not influenced by the circuit load loop voltage; highly sensitive; the reliability height; cost is low, and volume is little, can be used as the circuit breaker that annex is coupled to different product.
For reaching above purpose, the technical scheme that the utility model is taked is:
A kind of overvoltage of power supply under voltage open phase protector; it is characterized in that: the input of sample circuit is connected with the output of main circuit breaker; an input of the output of sample circuit and logic identification circuit is connected; another input of the output of reference circuit and logic identification circuit is connected; the output of logic identification circuit is connected with the input of delay circuit; the output of delay circuit is connected with the input of ON-OFF control circuit, and the output of ON-OFF control circuit is connected with the input of main circuit breaker.
On the basis of technique scheme, said logic identification circuit comprises at least one positive-negative-positive triode, the emitter of the positive-negative-positive triode in the output of reference circuit and the logic identification circuit is connected, the base stage of the positive-negative-positive triode in the output of sample circuit and the logic identification circuit is connected, and the collector electrode of the positive-negative-positive triode in the logic identification circuit and the input of delay circuit are connected.
On the basis of technique scheme, said sample circuit is by diode D13, diode D14, diode D15, resistance R 15, resistance R 16, resistance R 17, resistance R 18, capacitor C 6, bidirectional diode D18 forms, the positive pole of diode D13 is connected with the C of main circuit breaker, the positive pole of diode D14 is connected with the A of main circuit breaker, the positive pole of diode D15 is connected with the B of main circuit breaker, diode D13, diode D14, the negative pole of diode D15 all with an end of resistance R 15, one end of resistance R 18 connects, one end of the other end of resistance R 15 and resistance R 16 is connected, one end of the other end of resistance R 18 and resistance R 17 is connected, the other end of resistance R 16 is connected with the other end of resistance R 17, capacitor C 6 is connected in parallel on resistance R 17 two ends, the end of bidirectional diode D18 is connected with the positive pole of capacitor C 6, and the control utmost point of the controllable silicon Q3 of the other end of bidirectional diode D18 and ON-OFF control circuit is connected; Said logic identification circuit is by capacitor C 4, triode T1, capacitor C 5, resistance R 13, resistance R 14 is formed, one end of the base stage B of triode T1 and resistance R 14 is connected, the other end of resistance R 14 respectively with the positive pole of capacitor C 5, the resistance R 15 of sample circuit is connected with the public connecting end of resistance R 16, the negative pole of capacitor C 5 is connected with the emitter E of triode T1, the emitter E of triode T1 is connected with the public connecting end of the resistance R of reference circuit 4 with resistance R 9, the collector electrode C of triode T1 is connected with an end of resistance R 13, the other end of resistance R 13 is connected with the positive pole of capacitor C 4, and the negative pole of capacitor C 4 is connected with the negative pole of the capacitor C of sample circuit 6; Said reference circuit is made up of resistance R 4, resistance R 9, diode D17, one end of resistance R 4 is connected with an end of resistance R 9, the emitter E of triode T1 respectively, the end of the control coil L of the other end of resistance R 4 and magnetictrip is connected, and the negative pole of the other end of the control coil L of magnetictrip and the diode D10 of rectification circuit is connected; The other end of resistance R 9 is connected with the negative pole of diode D17, and the negative pole of the capacitor C 4 of the positive pole of diode D17 and logic identification circuit is connected; Said delay circuit is made up of capacitor C 3, resistance R 10, resistance R 11, resistance R 12, diode D16, capacitor C 4 parallel connections of resistance R 12 and logic identification circuit, one end of the positive pole of capacitor C 4 and resistance R 11 is connected, the other end of resistance R 11 is connected with an end of resistance R 10, the positive pole of capacitor C 3, the positive pole of diode D16 respectively, the other end of resistance R 10 is connected with the negative pole of capacitor C 4, the negative pole of capacitor C 3 is connected with the negative pole of capacitor C 4, and the control utmost point of the controllable silicon Q3 of the negative pole of diode D16 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 5, resistance R 6, resistance R 7, resistance R 8, capacitor C 1, capacitor C 2, controllable silicon Q1, controllable silicon Q2, controllable silicon Q3 forms, the public connecting end of the control coil L of resistance R 14 and magnetictrip is connected with an end of resistance R 1, one end of the other end of resistance R 1 and resistance R 2 is connected, one end of the other end of resistance R 2 and resistance R 3 is connected, the other end of resistance R 3 is connected with the negative pole of the capacitor C of delay circuit 3, controllable silicon Q1 and resistance R 1 parallel connection, controllable silicon Q2 and resistance R 2 parallel connections, controllable silicon Q3 and resistance R 3 parallel connections, the control utmost point of controllable silicon Q1 respectively with an end of resistance R 6, one end of resistance R 8 connects, the other end of resistance R 6 is connected with the public connecting end of resistance R 1 with resistance R 2, one end of the other end of resistance R 8 and capacitor C 2 is connected, the other end of capacitor C 2 is connected with the negative pole of the capacitor C of delay circuit 3, the control utmost point of controllable silicon Q2 respectively with an end of resistance R 5, one end of resistance R 7 connects, the other end of resistance R 5 is connected with the public connecting end of resistance R 2 with resistance R 3, one end of the other end of resistance R 7 and capacitor C 1 is connected, and the other end of capacitor C 1 is connected with the negative pole of the capacitor C of delay circuit 3; Said rectification circuit is made up of 12 diode D1～D12, diode D1, D4, D7, the series connection of D10 both positive and negative polarity is one group, diode D2, D5, D8, the series connection of D11 both positive and negative polarity is one group, diode D3, D6, D9, the series connection of D12 both positive and negative polarity is one group, the positive pole of diode D1, the positive pole of diode D2 is connected with the positive pole of diode D3, the negative pole of diode D10, the negative pole of diode D11 is connected with the negative pole of diode D12, the positive pole of diode D3 is connected with the negative pole of capacitor C 3, the public connecting end of diode D4 and diode D7 is connected with diode D14, the public connecting end of diode D5 and diode D8 is connected with diode D15, and the public connecting end of diode D6 and diode D9 is connected with diode D13.
On the basis of technique scheme, said logic identification circuit comprises at least one operational amplifier, an input of the output of reference circuit and operational amplifier is connected, another input of the output of sample circuit and operational amplifier is connected, and the output of operational amplifier is connected with the input of delay circuit.
On the basis of technique scheme, said sample circuit is by resistance R 4, resistance R 5, resistance R 6, resistance R 10, resistance R 11, resistance R 12, diode D4, diode D5, diode D8, diode D9, diode D12, diode D13, capacitor C 4, resistance R 14 is formed, one end of resistance R 4 and the C of main circuit breaker are connected, one end of resistance R 5 and the B of main circuit breaker are connected, one end of resistance R 6 and the A of main circuit breaker are connected, one end of the other end of resistance R 4 and resistance R 10 is connected, one end of the other end of resistance R 5 and resistance R 11 is connected, one end of the other end of resistance R 6 and resistance R 12 is connected, the other end of resistance R 10 respectively with the positive pole of diode D4, the negative pole of diode D5 connects, the other end of resistance R 11 respectively with the positive pole of diode D8, the negative pole of diode D9 connects, the other end of resistance R 12 respectively with the positive pole of diode D12, the negative pole of diode D13 connects, diode D4, D8, the negative pole of D12 connects, diode D5, D9, the positive pole of D13 connects, the positive pole of capacitor C 4 is connected with the negative pole of diode D12, the negative pole of capacitor C 4 is connected with the positive pole of diode D13, resistance R 14 and capacitor C 4 parallel connections; Said logic identification circuit is by resistance R 15, resistance R 16, resistance R 18, resistance R 19, operational amplifier A, operational amplifier D, diode D14, diode D15, resistance R 20, resistance R 21, capacitor C 8, resistance R 22 is formed, the inverting input of operational amplifier A respectively with the positive pole of the capacitor C 4 of sample circuit, the in-phase input end of operational amplifier D connects, the in-phase input end of operational amplifier A respectively with an end of resistance R 18, one end of resistance R 19 connects, the output of operational amplifier A is connected with the positive pole of diode D14, the inverting input of operational amplifier D respectively with an end of resistance R 15, one end of resistance R 16 connects, the output of operational amplifier D is connected with the positive pole of diode D15, after being connected, the other end of the other end of resistance R 15 and resistance R 18 is connected to VCC, the other end of the other end of resistance R 16 and resistance R 19 is connected the back at the negative pole that is connected to capacitor C 4, after the negative pole of the negative pole of diode D14 and diode D15 is connected again respectively with an end of resistance R 20, one end of resistance R 21 connects, the other end of resistance R 20 is connected with the negative pole of capacitor C 4, the other end of resistance R 21 respectively with the positive pole of capacitor C 8, the in-phase input end of the operational amplifier B of delay circuit connects, the negative pole of capacitor C 8 is connected with the negative pole of capacitor C 4, one end of resistance R 22 is connected with the negative pole of capacitor C 4, the other end of resistance R 22 respectively with the negative pole of the capacitor C 9 of reference circuit, the in-phase input end of operational amplifier C connects; Said reference circuit is made up of capacitor C 9, operational amplifier C, resistance R 24, the positive pole of capacitor C 9 is connected to VCC, the inverting input of operational amplifier C is connected with the in-phase input end of operational amplifier A, one end of the output of operational amplifier C and resistance R 24 is connected, and the inverting input of the operational amplifier B of the other end of resistance R 24 and delay circuit is connected; Said delay circuit is made up of resistance R 23, operational amplifier B, resistance R 25, one end of the inverting input of operational amplifier B and resistance R 23 is connected, the other end of resistance R 23 is connected with VCC, one end of the output of operational amplifier B and resistance R 25 is connected, and the base stage B of the triode Q1 of the other end of resistance R 25 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by relay K 1, resistance R 26, triode Q1 forms, the emitter E of triode Q1 is connected with the negative pole of capacitor C 4,1 one pins of the collector electrode C of triode Q1 and relay K are connected, another pin of relay K 1 is connected with an end of resistance R 26, the normally opened contact of relay K 1 is connected with the B of main circuit breaker, the end of the control coil L of the normally-closed contact of relay K 1 and magnetictrip is connected, the other end of the control coil L of magnetictrip and the C of main circuit breaker are connected, and the Vin of the three terminal regulator VR1 of the other end of resistance R 26 and rectification circuit is connected; Said rectification circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 7, resistance R 8, resistance R 9, capacitor C 1, capacitor C 2, capacitor C 3, diode D2, diode D3, diode D6, diode D7, diode D10, diode D11, diode D16, resistance R 13, capacitor C 5, capacitor C 7, three terminal regulator VR1 forms, one end of resistance R 1 respectively with the C of main circuit breaker mutually, one end of capacitor C 1 connects, one end of the other end of resistance R 1 and resistance R 7 is connected, one end of resistance R 2 respectively with the B of main circuit breaker mutually, one end of capacitor C 2 connects, one end of the other end of resistance R 2 and resistance R 8 is connected, one end of resistance R 3 respectively with the A of main circuit breaker mutually, one end of capacitor C 3 connects, one end of the other end of resistance R 3 and resistance R 9 is connected, after the other end of the other end of capacitor C 1 and resistance R 7 is connected respectively with the positive pole of diode D2, the negative pole of diode D3 connects, after the other end of the other end of capacitor C 2 and resistance R 8 is connected respectively with the positive pole of diode D6, the negative pole of diode D7 connects, after the other end of the other end of capacitor C 3 and resistance R 9 is connected respectively with the positive pole of diode D10, the negative pole of diode D11 connects, diode D2, D6, the negative pole of D10 connects, diode D3, D7, the positive pole of D11 connects, one end of resistance R 13 is connected with the negative pole of diode D10, the other end of resistance R 13 respectively with the negative pole of diode D16, the positive pole of capacitor C 5, the Vin of three terminal regulator VR1 connects, the positive pole of diode D16 respectively with the positive pole of diode D11, GND, the negative pole of capacitor C 5 connects, the GND end of three terminal regulator VR1 is connected with GND, the Vout of three terminal regulator VR1 respectively with the positive pole of capacitor C 7, VCC connects, and the negative pole of capacitor C 7 is connected with GND.
The advantage of overvoltage of power supply under voltage open phase protector described in the utility model is: not influenced by the circuit load loop current and not influenced by the circuit load loop voltage; highly sensitive, the reliability height, cost is low; volume is little, can be used as the circuit breaker that annex is coupled to different product.
Description of drawings
The utility model has following accompanying drawing:
The theory diagram of Fig. 1 overvoltage of power supply under voltage open phase protector
The circuit diagram of Fig. 2 overvoltage of power supply under voltage open phase protector embodiment 1
The circuit diagram of Fig. 3 overvoltage of power supply under voltage open phase protector embodiment 2
Embodiment
Below in conjunction with accompanying drawing the utility model is described in further detail.
Fig. 1 is the theory diagram of overvoltage of power supply under voltage open phase protector described in the utility model; the input of sample circuit is connected with the output of main circuit breaker; an input of the output of sample circuit and logic identification circuit is connected; another input of the output of reference circuit and logic identification circuit is connected; the output of logic identification circuit is connected with the input of delay circuit; the output of delay circuit is connected with the input of ON-OFF control circuit, and the output of ON-OFF control circuit is connected with the input of main circuit breaker.
On the basis of technique scheme, said logic identification circuit comprises at least one positive-negative-positive triode, the emitter of the positive-negative-positive triode in the output of reference circuit and the logic identification circuit is connected, the base stage of the positive-negative-positive triode in the output of sample circuit and the logic identification circuit is connected, and the collector electrode of the positive-negative-positive triode in the logic identification circuit and the input of delay circuit are connected.For example: as shown in Figure 2, said sample circuit is by diode D13, diode D14, diode D15, resistance R 15, resistance R 16, resistance R 17, resistance R 18, capacitor C 6, bidirectional diode D18 forms, the positive pole of diode D13 is connected with the C of main circuit breaker, the positive pole of diode D14 is connected with the A of main circuit breaker, the positive pole of diode D15 is connected with the B of main circuit breaker, diode D13, diode D14, the negative pole of diode D15 all with an end of resistance R 15, one end of resistance R 18 connects, one end of the other end of resistance R 15 and resistance R 16 is connected, one end of the other end of resistance R 18 and resistance R 17 is connected, the other end of resistance R 16 is connected with the other end of resistance R 17, capacitor C 6 is connected in parallel on resistance R 17 two ends, the end of bidirectional diode D18 is connected with the positive pole of capacitor C 6, and the control utmost point of the controllable silicon Q3 of the other end of bidirectional diode D18 and ON-OFF control circuit is connected; Said logic identification circuit is by capacitor C 4, triode T1, capacitor C 5, resistance R 13, resistance R 14 is formed, one end of the base stage B of triode T1 and resistance R 14 is connected, the other end of resistance R 14 respectively with the positive pole of capacitor C 5, the resistance R 15 of sample circuit is connected with the public connecting end of resistance R 16, the negative pole of capacitor C 5 is connected with the emitter E of triode T1, the emitter E of triode T1 is connected with the public connecting end of the resistance R of reference circuit 4 with resistance R 9, the collector electrode C of triode T1 is connected with an end of resistance R 13, the other end of resistance R 13 is connected with the positive pole of capacitor C 4, and the negative pole of capacitor C 4 is connected with the negative pole of the capacitor C of sample circuit 6; Said reference circuit is made up of resistance R 4, resistance R 9, diode D17, one end of resistance R 4 is connected with an end of resistance R 9, the emitter E of triode T1 respectively, the end of the control coil L of the other end of resistance R 4 and magnetictrip is connected, and the negative pole of the other end of the control coil L of magnetictrip and the diode D10 of rectification circuit is connected; The other end of resistance R 9 is connected with the negative pole of diode D17, and the negative pole of the capacitor C 4 of the positive pole of diode D17 and logic identification circuit is connected; Said delay circuit is made up of capacitor C 3, resistance R 10, resistance R 11, resistance R 12, diode D16, capacitor C 4 parallel connections of resistance R 12 and logic identification circuit, one end of the positive pole of capacitor C 4 and resistance R 11 is connected, the other end of resistance R 11 is connected with an end of resistance R 10, the positive pole of capacitor C 3, the positive pole of diode D16 respectively, the other end of resistance R 10 is connected with the negative pole of capacitor C 4, the negative pole of capacitor C 3 is connected with the negative pole of capacitor C 4, and the control utmost point of the controllable silicon Q3 of the negative pole of diode D16 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 5, resistance R 6, resistance R 7, resistance R 8, capacitor C 1, capacitor C 2, controllable silicon Q1, controllable silicon Q2, controllable silicon Q3 forms, the public connecting end of the control coil L of resistance R 14 and magnetictrip is connected with an end of resistance R 1, one end of the other end of resistance R 1 and resistance R 2 is connected, one end of the other end of resistance R 2 and resistance R 3 is connected, the other end of resistance R 3 is connected with the negative pole of the capacitor C of delay circuit 3, controllable silicon Q1 and resistance R 1 parallel connection, controllable silicon Q2 and resistance R 2 parallel connections, controllable silicon Q3 and resistance R 3 parallel connections, the control utmost point of controllable silicon Q1 respectively with an end of resistance R 6, one end of resistance R 8 connects, the other end of resistance R 6 is connected with the public connecting end of resistance R 1 with resistance R 2, one end of the other end of resistance R 8 and capacitor C 2 is connected, the other end of capacitor C 2 is connected with the negative pole of the capacitor C of delay circuit 3, the control utmost point of controllable silicon Q2 respectively with an end of resistance R 5, one end of resistance R 7 connects, the other end of resistance R 5 is connected with the public connecting end of resistance R 2 with resistance R 3, one end of the other end of resistance R 7 and capacitor C 1 is connected, and the other end of capacitor C 1 is connected with the negative pole of the capacitor C of delay circuit 3; Said rectification circuit is made up of 12 diode D1～D12, diode D1, D4, D7, the series connection of D10 both positive and negative polarity is one group, diode D2, D5, D8, the series connection of D11 both positive and negative polarity is one group, diode D3, D6, D9, the series connection of D12 both positive and negative polarity is one group, the positive pole of diode D1, the positive pole of diode D2 is connected with the positive pole of diode D3, the negative pole of diode D10, the negative pole of diode D11 is connected with the negative pole of diode D12, the positive pole of diode D3 is connected with the negative pole of capacitor C 3, the public connecting end of diode D4 and diode D7 is connected with diode D14, the public connecting end of diode D5 and diode D8 is connected with diode D15, and the public connecting end of diode D6 and diode D9 is connected with diode D13.
On the basis of technique scheme, said logic identification circuit comprises at least one operational amplifier, an input of the output of reference circuit and operational amplifier is connected, another input of the output of sample circuit and operational amplifier is connected, and the output of operational amplifier is connected with the input of delay circuit.For example: as shown in Figure 3, said sample circuit is by resistance R 4, resistance R 5, resistance R 6, resistance R 10, resistance R 11, resistance R 12, diode D4, diode D5, diode D8, diode D9, diode D12, diode D13, capacitor C 4, resistance R 14 is formed, one end of resistance R 4 and the C of main circuit breaker are connected, one end of resistance R 5 and the B of main circuit breaker are connected, one end of resistance R 6 and the A of main circuit breaker are connected, one end of the other end of resistance R 4 and resistance R 10 is connected, one end of the other end of resistance R 5 and resistance R 11 is connected, one end of the other end of resistance R 6 and resistance R 12 is connected, the other end of resistance R 10 respectively with the positive pole of diode D4, the negative pole of diode D5 connects, the other end of resistance R 11 respectively with the positive pole of diode D8, the negative pole of diode D9 connects, the other end of resistance R 12 respectively with the positive pole of diode D12, the negative pole of diode D13 connects, diode D4, D8, the negative pole of D12 connects, diode D5, D9, the positive pole of D13 connects, the positive pole of capacitor C 4 is connected with the negative pole of diode D12, the negative pole of capacitor C 4 is connected with the positive pole of diode D13, resistance R 14 and capacitor C 4 parallel connections; Said logic identification circuit is by resistance R 15, resistance R 16, resistance R 18, resistance R 19, operational amplifier A, operational amplifier D, diode D14, diode D15, resistance R 20, resistance R 21, capacitor C 8, resistance R 22 is formed, the inverting input of operational amplifier A respectively with the positive pole of the capacitor C 4 of sample circuit, the in-phase input end of operational amplifier D connects, the in-phase input end of operational amplifier A respectively with an end of resistance R 18, one end of resistance R 19 connects, the output of operational amplifier A is connected with the positive pole of diode D14, the inverting input of operational amplifier D respectively with an end of resistance R 15, one end of resistance R 16 connects, the output of operational amplifier D is connected with the positive pole of diode D15, after being connected, the other end of the other end of resistance R 15 and resistance R 18 is connected to VCC, the other end of the other end of resistance R 16 and resistance R 19 is connected the back at the negative pole that is connected to capacitor C 4, after the negative pole of the negative pole of diode D14 and diode D15 is connected again respectively with an end of resistance R 20, one end of resistance R 21 connects, the other end of resistance R 20 is connected with the negative pole of capacitor C 4, the other end of resistance R 21 respectively with the positive pole of capacitor C 8, the in-phase input end of the operational amplifier B of delay circuit connects, the negative pole of capacitor C 8 is connected with the negative pole of capacitor C 4, one end of resistance R 22 is connected with the negative pole of capacitor C 4, the other end of resistance R 22 respectively with the negative pole of the capacitor C 9 of reference circuit, the in-phase input end of operational amplifier C connects; Said reference circuit is made up of capacitor C 9, operational amplifier C, resistance R 24, the positive pole of capacitor C 9 is connected to VCC, the inverting input of operational amplifier C is connected with the in-phase input end of operational amplifier A, one end of the output of operational amplifier C and resistance R 24 is connected, and the inverting input of the operational amplifier B of the other end of resistance R 24 and delay circuit is connected; Said delay circuit is made up of resistance R 23, operational amplifier B, resistance R 25, one end of the inverting input of operational amplifier B and resistance R 23 is connected, the other end of resistance R 23 is connected with VCC, one end of the output of operational amplifier B and resistance R 25 is connected, and the base stage B of the triode Q1 of the other end of resistance R 25 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by relay K 1, resistance R 26, triode Q1 forms, the emitter E of triode Q1 is connected with the negative pole of capacitor C 4,1 one pins of the collector electrode C of triode Q1 and relay K are connected, another pin of relay K 1 is connected with an end of resistance R 26, the normally opened contact of relay K 1 is connected with the B of main circuit breaker, the end of the control coil L of the normally-closed contact of relay K 1 and magnetictrip is connected, the other end of the control coil L of magnetictrip and the C of main circuit breaker are connected, and the Vin of the three terminal regulator VR1 of the other end of resistance R 26 and rectification circuit is connected; Said rectification circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 7, resistance R 8, resistance R 9, capacitor C 1, capacitor C 2, capacitor C 3, diode D2, diode D3, diode D6, diode D7, diode D10, diode D11, diode D16, resistance R 13, capacitor C 5, capacitor C 7, three terminal regulator VR1 forms, one end of resistance R 1 respectively with the C of main circuit breaker mutually, one end of capacitor C 1 connects, one end of the other end of resistance R 1 and resistance R 7 is connected, one end of resistance R 2 respectively with the B of main circuit breaker mutually, one end of capacitor C 2 connects, one end of the other end of resistance R 2 and resistance R 8 is connected, one end of resistance R 3 respectively with the A of main circuit breaker mutually, one end of capacitor C 3 connects, one end of the other end of resistance R 3 and resistance R 9 is connected, after the other end of the other end of capacitor C 1 and resistance R 7 is connected respectively with the positive pole of diode D2, the negative pole of diode D3 connects, after the other end of the other end of capacitor C 2 and resistance R 8 is connected respectively with the positive pole of diode D6, the negative pole of diode D7 connects, after the other end of the other end of capacitor C 3 and resistance R 9 is connected respectively with the positive pole of diode D10, the negative pole of diode D11 connects, diode D2, D6, the negative pole of D10 connects, diode D3, D7, the positive pole of D11 connects, one end of resistance R 13 is connected with the negative pole of diode D10, the other end of resistance R 13 respectively with the negative pole of diode D16, the positive pole of capacitor C 5, the Vin of three terminal regulator VR1 connects, the positive pole of diode D16 respectively with the positive pole of diode D11, GND, the negative pole of capacitor C 5 connects, the GND end of three terminal regulator VR1 is connected with GND, the Vout of three terminal regulator VR1 respectively with the positive pole of capacitor C 7, VCC connects, and the negative pole of capacitor C 7 is connected with GND.
Said main circuit breaker can adopt existing techniques in realizing in the technique scheme, for example: can be the main circuit breaker of LPM with model; Said magnetictrip can adopt existing techniques in realizing, for example: can be the magnetictrip of MX with model.Magnetictrip is made up of magnetictrip control coil L, yoke, moving iron core, static iron core, spring, push rod usually.
The advantage of overvoltage of power supply under voltage open phase protector described in the utility model is: not influenced by the circuit load loop current and not influenced by the circuit load loop voltage; highly sensitive, the reliability height, cost is low; volume is little, can be used as the circuit breaker that annex is coupled to different product.
The composition and the operation principle of each part of circuit are described one by one below in conjunction with Fig. 2:
Sample circuit is made up of diode D13, diode D14, diode D15, resistance R 15, resistance R 16, resistance R 17, resistance R 18, capacitor C 6, bidirectional diode D18.Diode D13, diode D14, the positive pole of diode D15 connects the A phase of power supply respectively, the B phase, the C phase, its negative pole also connects together back connecting resistance R15 and resistance R 18 and the common port that connects, the end of the other end connecting resistance R16 of resistance R 15, the ground end of another termination rectification circuit of resistance R 16, the other end connecting resistance R17 of resistance R 18, the positive terminal of diode D18 and capacitor C 6, the negative terminal of the other end of resistance R 17 and capacitor C 6 links together and connects the ground of rectification circuit, the control utmost point of another termination ON-OFF control circuit controllable silicon Q3 of diode D18, this connecting circuit constitutes sample circuit, under-voltage, the phase shortage sampled signal is sent into the logic identification circuit from the resistance R 15 and the common point taking-up of resistance R 16, and the overvoltage sampled signal takes out the control utmost point input of the controllable silicon Q3 that sends into ON-OFF control circuit from the resistance R 17 and the common point of resistance R 18.
The logic identification circuit is made up of C4, T1, C5, R13, R14.The 12V voltage of rectification circuit voltage stabilizing output is as the emitter of the benchmark level access T1 of logic identification circuit, and sampled signal connects the end of R14 and the positive pole of C5 from the common point of R15 and R16.The base stage of another termination T1 of R14, the collector electrode of T1 is connected with R13, another termination delay circuit of R13.The concrete connection is that the base stage B of triode T1 and an end of resistance R 14 are connected, the other end of resistance R 14 is connected with positive pole, resistance R 15 and the public connecting end of resistance R 16 of capacitor C 5 respectively, the negative pole of the public connecting end of resistance R 4, resistance R 9 and capacitor C 5 is connected with the emitter E of triode T1, the collector electrode C of triode T1 is connected with an end of resistance R 13, the other end of resistance R 13 is connected with the positive pole of capacitor C 4, and the negative pole of capacitor C 4 is connected with the negative pole of the capacitor C of sample circuit 6;
Delay circuit is made up of C3, R10, R11, R12, D16.R11 is connected with the positive pole of C4 and R13 one end of logic identification circuit with R12 and after connecting, the ground end of another termination rectification circuit of C4 and R12, the other end of R11 is connected with an end and the positive pole of C3 and the positive pole of D16 of R10, the other end of R10 and the negative pole of C3 connect the ground end of rectification circuit, the logic identification signal is delayed time through delay circuit, is sent into the control utmost point of ON-OFF control circuit Q3 by the negative electrode output of D16
ON-OFF control circuit is made up of R1, R2, R3, R5, R6, R7, R8, C1, C2, Q1, Q2, Q3.R1, R2, be parallel between the positive pole and negative pole of rectification circuit after the R3 series connection, the negative electrode of Q1 is connected with the anode of Q2 with the common point of R1 and R2 and is connected, R6 and R8 also are connected in the control utmost point of Q1, the other end of R6 is connected to the common point of R1 and R2, the end of another termination C2 of R8, the ground end of another termination rectification circuit of C2, the negative electrode of Q2 links to each other with the anode of Q3 and is connected with the common point of R2 and R3, R5 is connected between the control utmost point and negative electrode of Q2, R7 one end connects the control utmost point of Q2, one end links to each other with C1, the ground end of another termination rectification circuit of C1, the negative electrode of Q3 is connected to the ground end of rectification circuit, and the control coil L of magnetictrip is connected to the positive pole of rectification circuit output and the Q1 anode of ON-OFF control circuit.
Reference circuit is made up of R4, R9, D17.R9 and R4 also are connected in the emitter of T1, and the R4 other end is connected to the anode of rectification circuit, and the other end of R9 links to each other with the negative electrode of D17, and the anode of D17 connects the ground of rectification circuit.
Rectifier power source is a full-wave rectifier power supply, is made up of D1～D12 and resistance.
The operation principle of overvoltage of power supply under voltage open phase protector described in the utility model is as follows: overvoltage of power supply under voltage open phase protector described in the utility model is by rectification circuit; sample circuit; reference circuit; the logic identification circuit; delay circuit; ON-OFF control circuit; control circuit is formed; wherein; the output of sample circuit inserts the base stage of the triode T1 of logic identification circuit; the output of reference circuit inserts the emitter of the triode T1 of logic identification circuit; the output control signal of logic identification circuit is by the collector electrode input time delay circuit of triode T1; the output of delay circuit inserts and comprises the silicon controlled ON-OFF control circuit, and the magnetictrip control coil of control circuit is connected to silicon controlled anode in rectification circuit and the ON-OFF control circuit.Magnetictrip can be installed in the main circuit breaker in the main circuit power supply, utilizes the magnetictrip acting to promote the breaker open operation of main circuit.When the major loop electrical network just often; sampled signal is greater than base-level signal, logical circuit output low level, not conducting of ON-OFF control circuit; when three phase mains during under-voltage or phase shortage; sampled signal is differentiated the output high level less than base-level signal through the logic identification circuit, the trigger switch control circuit conducting after the delay circuit time-delay of this high level; the magnetictrip control coil of control circuit is got; thereby make the breaker open operation in the main circuit, cut off the power supply of power consumption equipment, the protection power consumption equipment.When overvoltage appears in electrical network; the mid-point voltage of R17 and R18 is greater than the threshold voltage of bidirectional diode D18; the bidirectional diode conducting; the conducting of trigger switch control circuit; the magnetictrip control coil of control circuit is got; thereby make the breaker open operation in the main circuit, cut off the power supply of power consumption equipment, the protection power consumption equipment.Specifically, the sample circuit of being made up of D13, D14, D15, R15, R16 is delivered to sampled signal the base stage of the T1 of the logical circuit of being made up of C4, T1, C5, R13, R14.By T1 with sampled signal be connected on the T1 emitter and compare by the reference voltage source that R4, R9, D17 form, regulating R15, R16 makes its midpoint potential just often be higher than reference level at line voltage, because triode T1 is a positive-negative-positive, triode ends when base voltage is higher than emitter voltage, logic identification circuit output low level, electric network source is under-voltage or during phase shortage, the sampling voltage signal is less than reference voltage 12V, the conducting of triode positively biased, the logic identification circuit is exported high level, realizes the logic discrimination function of under-voltage phase shortage.This level triggers the ON-OFF control circuit of being made up of R1, R2, R3, R5, R6, R7, R8, C1, C2, Q1, Q2, Q3 via the delay circuit time-delay back that C3, R10, R11, R12, D16 form; make the controllable silicon conducting; the solenoid of Drive and Control Circuit makes the breaker open operation in the main circuit; cut off the power supply of power consumption equipment, the protection power consumption equipment.Delay circuit can effectively be avoided the instantaneous interference signal in the electric power network, has improved the reliability and stability of protector greatly.Regulating R18, R17 makes its midpoint potential just often be lower than the threshold voltage of bidirectional diode at line voltage; when being higher than default overvoltage value, line voltage make R18, R17 make its midpoint potential be higher than the threshold voltage of bidirectional diode; the conducting of bidirectional diode D18 conducting trigger switch control circuit; the magnetictrip control coil is got; drive the breaker open operation of main circuit; cut off the power supply of power consumption equipment, the protection power consumption equipment.
Claims (5)
1. overvoltage of power supply under voltage open phase protector; it is characterized in that: the input of sample circuit is connected with the output of main circuit breaker; an input of the output of sample circuit and logic identification circuit is connected; another input of the output of reference circuit and logic identification circuit is connected; the output of logic identification circuit is connected with the input of delay circuit; the output of delay circuit is connected with the input of ON-OFF control circuit, and the output of ON-OFF control circuit is connected with the input of main circuit breaker.
2. overvoltage of power supply under voltage open phase protector as claimed in claim 1; it is characterized in that: said logic identification circuit comprises at least one positive-negative-positive triode; the emitter of the positive-negative-positive triode in the output of reference circuit and the logic identification circuit is connected; the base stage of the positive-negative-positive triode in the output of sample circuit and the logic identification circuit is connected, and the collector electrode of the positive-negative-positive triode in the logic identification circuit and the input of delay circuit are connected.
3. overvoltage of power supply under voltage open phase protector as claimed in claim 2, it is characterized in that: said sample circuit is by diode D13, diode D14, diode D15, resistance R 15, resistance R 16, resistance R 17, resistance R 18, capacitor C 6, bidirectional diode D18 forms, the positive pole of diode D13 is connected with the C of main circuit breaker, the positive pole of diode D14 is connected with the A of main circuit breaker, the positive pole of diode D15 is connected with the B of main circuit breaker, diode D13, diode D14, the negative pole of diode D15 all with an end of resistance R 15, one end of resistance R 18 connects, one end of the other end of resistance R 15 and resistance R 16 is connected, one end of the other end of resistance R 18 and resistance R 17 is connected, the other end of resistance R 16 is connected with the other end of resistance R 17, capacitor C 6 is connected in parallel on resistance R 17 two ends, the end of bidirectional diode D18 is connected with the positive pole of capacitor C 6, and the control utmost point of the controllable silicon Q3 of the other end of bidirectional diode D18 and ON-OFF control circuit is connected; Said logic identification circuit is by capacitor C 4, triode T1, capacitor C 5, resistance R 13, resistance R 14 is formed, one end of the base stage B of triode T1 and resistance R 14 is connected, the other end of resistance R 14 respectively with the positive pole of capacitor C 5, the resistance R 15 of sample circuit is connected with the public connecting end of resistance R 16, the negative pole of capacitor C 5 is connected with the emitter E of triode T1, the emitter E of triode T1 is connected with the public connecting end of the resistance R of reference circuit 4 with resistance R 9, the collector electrode C of triode T1 is connected with an end of resistance R 13, the other end of resistance R 13 is connected with the positive pole of capacitor C 4, and the negative pole of capacitor C 4 is connected with the negative pole of the capacitor C of sample circuit 6; Said reference circuit is made up of resistance R 4, resistance R 9, diode D17, one end of resistance R 4 is connected with an end of resistance R 9, the emitter E of triode T1 respectively, the end of the control coil L of the other end of resistance R 4 and magnetictrip is connected, and the negative pole of the other end of the control coil L of magnetictrip and the diode D10 of rectification circuit is connected; The other end of resistance R 9 is connected with the negative pole of diode D17, and the negative pole of the capacitor C 4 of the positive pole of diode D17 and logic identification circuit is connected; Said delay circuit is made up of capacitor C 3, resistance R 10, resistance R 11, resistance R 12, diode D16, capacitor C 4 parallel connections of resistance R 12 and logic identification circuit, one end of the positive pole of capacitor C 4 and resistance R 11 is connected, the other end of resistance R 11 is connected with an end of resistance R 10, the positive pole of capacitor C 3, the positive pole of diode D16 respectively, the other end of resistance R 10 is connected with the negative pole of capacitor C 4, the negative pole of capacitor C 3 is connected with the negative pole of capacitor C 4, and the control utmost point of the controllable silicon Q3 of the negative pole of diode D16 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 5, resistance R 6, resistance R 7, resistance R 8, capacitor C 1, capacitor C 2, controllable silicon Q1, controllable silicon Q2, controllable silicon Q3 forms, the public connecting end of the control coil L of resistance R 14 and magnetictrip is connected with an end of resistance R 1, one end of the other end of resistance R 1 and resistance R 2 is connected, one end of the other end of resistance R 2 and resistance R 3 is connected, the other end of resistance R 3 is connected with the negative pole of the capacitor C of delay circuit 3, controllable silicon Q1 and resistance R 1 parallel connection, controllable silicon Q2 and resistance R 2 parallel connections, controllable silicon Q3 and resistance R 3 parallel connections, the control utmost point of controllable silicon Q1 respectively with an end of resistance R 6, one end of resistance R 8 connects, the other end of resistance R 6 is connected with the public connecting end of resistance R 1 with resistance R 2, one end of the other end of resistance R 8 and capacitor C 2 is connected, the other end of capacitor C 2 is connected with the negative pole of the capacitor C of delay circuit 3, the control utmost point of controllable silicon Q2 respectively with an end of resistance R 5, one end of resistance R 7 connects, the other end of resistance R 5 is connected with the public connecting end of resistance R 2 with resistance R 3, one end of the other end of resistance R 7 and capacitor C 1 is connected, and the other end of capacitor C 1 is connected with the negative pole of the capacitor C of delay circuit 3; Said rectification circuit is made up of 12 diode D1～D12, diode D1, D4, D7, the series connection of D10 both positive and negative polarity is one group, diode D2, D5, D8, the series connection of D11 both positive and negative polarity is one group, diode D3, D6, D9, the series connection of D12 both positive and negative polarity is one group, the positive pole of diode D1, the positive pole of diode D2 is connected with the positive pole of diode D3, the negative pole of diode D10, the negative pole of diode D11 is connected with the negative pole of diode D12, the positive pole of diode D3 is connected with the negative pole of capacitor C 3, the public connecting end of diode D4 and diode D7 is connected with diode D14, the public connecting end of diode D5 and diode D8 is connected with diode D15, and the public connecting end of diode D6 and diode D9 is connected with diode D13.
4. overvoltage of power supply under voltage open phase protector as claimed in claim 1; it is characterized in that: said logic identification circuit comprises at least one operational amplifier; an input of the output of reference circuit and operational amplifier is connected; another input of the output of sample circuit and operational amplifier is connected, and the output of operational amplifier is connected with the input of delay circuit.
5. overvoltage of power supply under voltage open phase protector as claimed in claim 4, it is characterized in that: said sample circuit is by resistance R 4, resistance R 5, resistance R 6, resistance R 10, resistance R 11, resistance R 12, diode D4, diode D5, diode D8, diode D9, diode D12, diode D13, capacitor C 4, resistance R 14 is formed, one end of resistance R 4 and the C of main circuit breaker are connected, one end of resistance R 5 and the B of main circuit breaker are connected, one end of resistance R 6 and the A of main circuit breaker are connected, one end of the other end of resistance R 4 and resistance R 10 is connected, one end of the other end of resistance R 5 and resistance R 11 is connected, one end of the other end of resistance R 6 and resistance R 12 is connected, the other end of resistance R 10 respectively with the positive pole of diode D4, the negative pole of diode D5 connects, the other end of resistance R 11 respectively with the positive pole of diode D8, the negative pole of diode D9 connects, the other end of resistance R 12 respectively with the positive pole of diode D12, the negative pole of diode D13 connects, diode D4, D8, the negative pole of D12 connects, diode D5, D9, the positive pole of D13 connects, the positive pole of capacitor C 4 is connected with the negative pole of diode D12, the negative pole of capacitor C 4 is connected with the positive pole of diode D13, resistance R 14 and capacitor C 4 parallel connections; Said logic identification circuit is by resistance R 15, resistance R 16, resistance R 18, resistance R 19, operational amplifier A, operational amplifier D, diode D14, diode D15, resistance R 20, resistance R 21, capacitor C 8, resistance R 22 is formed, the inverting input of operational amplifier A respectively with the positive pole of the capacitor C 4 of sample circuit, the in-phase input end of operational amplifier D connects, the in-phase input end of operational amplifier A respectively with an end of resistance R 18, one end of resistance R 19 connects, the output of operational amplifier A is connected with the positive pole of diode D14, the inverting input of operational amplifier D respectively with an end of resistance R 15, one end of resistance R 16 connects, the output of operational amplifier D is connected with the positive pole of diode D15, after being connected, the other end of the other end of resistance R 15 and resistance R 18 is connected to VCC, the other end of the other end of resistance R 16 and resistance R 19 is connected the back at the negative pole that is connected to capacitor C 4, after the negative pole of the negative pole of diode D14 and diode D15 is connected again respectively with an end of resistance R 20, one end of resistance R 21 connects, the other end of resistance R 20 is connected with the negative pole of capacitor C 4, the other end of resistance R 21 respectively with the positive pole of capacitor C 8, the in-phase input end of the operational amplifier B of delay circuit connects, the negative pole of capacitor C 8 is connected with the negative pole of capacitor C 4, one end of resistance R 22 is connected with the negative pole of capacitor C 4, the other end of resistance R 22 respectively with the negative pole of the capacitor C 9 of reference circuit, the in-phase input end of operational amplifier C connects; Said reference circuit is made up of capacitor C 9, operational amplifier C, resistance R 24, the positive pole of capacitor C 9 is connected to VCC, the inverting input of operational amplifier C is connected with the in-phase input end of operational amplifier A, one end of the output of operational amplifier C and resistance R 24 is connected, and the inverting input of the operational amplifier B of the other end of resistance R 24 and delay circuit is connected; Said delay circuit is made up of resistance R 23, operational amplifier B, resistance R 25, one end of the inverting input of operational amplifier B and resistance R 23 is connected, the other end of resistance R 23 is connected with VCC, one end of the output of operational amplifier B and resistance R 25 is connected, and the base stage B of the triode Q1 of the other end of resistance R 25 and ON-OFF control circuit is connected; Said ON-OFF control circuit is by relay K 1, resistance R 26, triode Q1 forms, the emitter E of triode Q1 is connected with the negative pole of capacitor C 4,1 one pins of the collector electrode C of triode Q1 and relay K are connected, another pin of relay K 1 is connected with an end of resistance R 26, the normally opened contact of relay K 1 is connected with the B of main circuit breaker, the end of the control coil L of the normally-closed contact of relay K 1 and magnetictrip is connected, the other end of the control coil L of magnetictrip and the C of main circuit breaker are connected, and the Vin of the three terminal regulator VR1 of the other end of resistance R 26 and rectification circuit is connected; Said rectification circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 7, resistance R 8, resistance R 9, capacitor C 1, capacitor C 2, capacitor C 3, diode D2, diode D3, diode D6, diode D7, diode D10, diode D11, diode D16, resistance R 13, capacitor C 5, capacitor C 7, three terminal regulator VR1 forms, one end of resistance R 1 respectively with the C of main circuit breaker mutually, one end of capacitor C 1 connects, one end of the other end of resistance R 1 and resistance R 7 is connected, one end of resistance R 2 respectively with the B of main circuit breaker mutually, one end of capacitor C 2 connects, one end of the other end of resistance R 2 and resistance R 8 is connected, one end of resistance R 3 respectively with the A of main circuit breaker mutually, one end of capacitor C 3 connects, one end of the other end of resistance R 3 and resistance R 9 is connected, after the other end of the other end of capacitor C 1 and resistance R 7 is connected respectively with the positive pole of diode D2, the negative pole of diode D3 connects, after the other end of the other end of capacitor C 2 and resistance R 8 is connected respectively with the positive pole of diode D6, the negative pole of diode D7 connects, after the other end of the other end of capacitor C 3 and resistance R 9 is connected respectively with the positive pole of diode D10, the negative pole of diode D11 connects, diode D2, D6, the negative pole of D10 connects, diode D3, D7, the positive pole of D11 connects, one end of resistance R 13 is connected with the negative pole of diode D10, the other end of resistance R 13 respectively with the negative pole of diode D16, the positive pole of capacitor C 5, the Vin of three terminal regulator VR1 connects, the positive pole of diode D16 respectively with the positive pole of diode D11, GND, the negative pole of capacitor C 5 connects, the GND end of three terminal regulator VR1 is connected with GND, the Vout of three terminal regulator VR1 respectively with the positive pole of capacitor C 7, VCC connects, and the negative pole of capacitor C 7 is connected with GND.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201147520U CN201188536Y (en) | 2008-05-14 | 2008-05-14 | Protector for over voltage, undervoltage and lack phase of power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201147520U CN201188536Y (en) | 2008-05-14 | 2008-05-14 | Protector for over voltage, undervoltage and lack phase of power supply |
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| Publication Number | Publication Date |
|---|---|
| CN201188536Y true CN201188536Y (en) | 2009-01-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008201147520U Expired - Fee Related CN201188536Y (en) | 2008-05-14 | 2008-05-14 | Protector for over voltage, undervoltage and lack phase of power supply |
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| CN (1) | CN201188536Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102760619A (en) * | 2012-07-13 | 2012-10-31 | 上海电器科学研究院 | Undervoltage tripper |
| CN104078928A (en) * | 2013-03-29 | 2014-10-01 | 松下电器产业株式会社 | Undervoltage tripping device of circuit breaker and over/undervoltage tripping device |
| CN104577979A (en) * | 2015-01-28 | 2015-04-29 | 长城电器集团有限公司 | Novel residual current circuit-breaker circuit |
-
2008
- 2008-05-14 CN CNU2008201147520U patent/CN201188536Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102760619A (en) * | 2012-07-13 | 2012-10-31 | 上海电器科学研究院 | Undervoltage tripper |
| CN102760619B (en) * | 2012-07-13 | 2014-09-10 | 上海电器科学研究院 | Undervoltage tripper |
| CN104078928A (en) * | 2013-03-29 | 2014-10-01 | 松下电器产业株式会社 | Undervoltage tripping device of circuit breaker and over/undervoltage tripping device |
| CN104078928B (en) * | 2013-03-29 | 2018-04-03 | 松下知识产权经营株式会社 | The under voltage tripping device of circuit-breaker and excessively under voltage tripping device |
| CN104577979A (en) * | 2015-01-28 | 2015-04-29 | 长城电器集团有限公司 | Novel residual current circuit-breaker circuit |
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Granted publication date: 20090128 Termination date: 20130514 |