CN201178403Y

CN201178403Y - IPM protection apparatus

Info

Publication number: CN201178403Y
Application number: CNU200720309555XU
Authority: CN
Inventors: 袁海龙; 周旭光; 杨广明; 张飞; 何耀华; 周伟; 韦世敏
Original assignee: BYD Co Ltd
Current assignee: BYD Co Ltd
Priority date: 2007-12-27
Filing date: 2007-12-27
Publication date: 2009-01-07
Anticipated expiration: 2017-12-27

Abstract

The utility model provides an IPM protector including a main controller which is provided with a guard signal input end. The IPM protector further comprises a square wave detection circuit, a AND gate and a trigger. The main controller is provided with a square wave signal output end which is connected to an input end of the square wave detection circuit; an output end of the square wave detection circuit is connected to an input end of the AND gate; and an output end of the AND gate is connected to the guard signal input end of the main controller. The IPM protector can not only protect the IPM when the IPM is in abnormal condition, but also protect the IPM when the CPU of the main controller is in abnormal condition.

Description

The protective device of a kind of IPM

Technical field

The utility model relates to Intelligent Power Module (Intelligent Power Module, i.e. IPM), more particularly relates to the protective device of a kind of IPM.

Background technology

IPM is integrated device for power switching IGBT and drive circuit thereof; and the built-in protective circuit that also possesses short circuit, under voltage, overcurrent, fault detection capability such as overheated; IPM is little with its volume, switching speed is fast, loss is little, low in energy consumption, advantage such as antijamming capability is strong obtains more and more widely application in field of power electronics; IPM is the important component part of power system of electric automobile at present, and operation has important function to its security performance for car load.

Because the built-in protective circuit of IPM does not have retentivity; the protection of IPM perfect system must be assisted peripheral protective circuit; the CPU that the fault-signal of IPM self is delivered to master controller by the fault-signal output of IPM does Interrupt Process; master controller blocks the output of the control signal PWM waveform of IPM, thereby can make things convenient for, protection device effectively.Usually the peripheral protective circuit of IPM is only protected at the working condition of IPM; and do not provide protection at the CPU working condition of master controller; for the CPU of master controller, only utilize the house dog of himself carrying to carry out resetting etc. after fault detect, the fault.

Yet, when being applied to systems such as electric automobile at IPM, owing to be loaded with multiple power supply and body electric system on the electric automobile, electromagnetic interference signal in the car is particularly strong, simultaneously, the suddenly variation of automobile permanent magnet synchronous motor load will cause current break, also the master controller in the car is caused stronger influence, may cause the CPU deadlock of motor master controller when serious even cause house dog to be lost efficacy, CPU can't normally be resetted.When CPU can't reset; the guard signal of the protective circuit output of existing IPM can't cause the response of CPU effectively; thereby can not provide normal protection to IPM; especially when the deadlock situation appears in CPU; signal to IPM output may perseverance be a high level; make the long-time conducting of IGBT, bear excessive conducting electric current, cause the damage of IGBT.And the protective circuit of existing IPM can not provide the protection when the deadlock situation occurring at CPU.

The utility model content

The utility model can not provide the shortcoming of protection at the abnormality of the CPU of master controller at the protective device of IPM of the prior art; the protective device of a kind of IPM is provided, this device can realize at the protection of CPU abnormality and have simple in structure, be subjected to the little advantage of annoyance level.

The utility model provides the protective device of a kind of IPM; the protective device of this IPM comprises master controller; master controller has the guard signal input; wherein; the protective device of this IPM also comprise the square wave testing circuit and with door, master controller also has the square-wave signal output, described square-wave signal output is connected to the input of square wave testing circuit; the output of square wave testing circuit is connected to the input with door, is connected to the guard signal input of master controller with the output of door.

The protective device of a kind of IPM that the utility model provides, owing to adopted the square wave testing circuit, whether the CPU that this square wave testing circuit can detect master controller according to the signal that receives from the square-wave signal output of master controller operate as normal, and output characterize master controller CPU whether operate as normal signal to and door, be connected to the guard signal input of IPM with another input of door, pass through trigger output protection signal again to master controller with the output of door, so all can the output protection signal during any one when receiving from the fault-signal of the fault-signal output of IPM and detecting the CPU abnormal work of master controller, the output that the notice master controller blocks the PWM waveform, protect IPM, and in the protective device of IPM of the prior art, the fault-signal output of IPM is the guard signal input that is directly connected to master controller, the protective device of IPM of the prior art like this only can be at the sign short circuit of the fault-signal output of IPM output, under voltage, the signal of abnormalities such as overcurrent provides protection to IPM, and can not provide protection to the CPU abnormality, it is insecure that the house dog that only depends on CPU to carry in the electromagnetic environment in the car of complexity provides the protection at the CPU abnormality, and the house dog that the protective device of the IPM that the utility model provides can carry at the CPU of master controller was lost efficacy or protection result when unreliable, relied on square wave testing circuit in it protection module that comprises that protection to the abnormality of the CPU of the master controller in the protective device still can be provided; Simultaneously owing to only adopt simple circuit element in the square wave testing circuit; than the house dog of forming by oscillator and frequency divider etc.; be subjected to the influence of electromagnetic interference little, more reliable at the protection of CPU abnormality, so just improved the fail safe and the reliability of system.

Description of drawings

Fig. 1 is the composition frame chart according to the protective device of IPM of the present utility model;

Fig. 2 is the circuit diagram according to square wave testing circuit of the present utility model;

Embodiment

As shown in Figure 1; the protective device of the IPM that the utility model provides comprises master controller 1; master controller 1 has the guard signal input; wherein; the protective device 3 of this IPM also comprise square wave testing circuit 20, with door 21 and trigger 22; master controller 1 also has the square-wave signal output; described square-wave signal output is connected to the input of square wave testing circuit 20; the fault-signal output of the output of square wave testing circuit 20 and IPM 4 is connected respectively to and door two inputs of 21, is connected to the guard signal input of master controller 1 with the output of door 21.

The protective device 3 of described IPM can also comprise trigger 22; the input that is connected trigger 22 with the output of door 21; the output of trigger 22 is connected to the guard signal input of master controller 1; master controller 1 also has protection reset signal output, and described protection reset signal output is connected to the clear terminal of trigger 22.

Whether the CPU that square wave testing circuit 20 is used for determining master controller 1 operate as normal, exports the signal whether CPU that characterizes master controller 1 situation of crashing occurs according to the signal that the square-wave signal output from master controller 1 receives.As when this square wave testing circuit 20 when master controller 1 receives normal square-wave signal, can export high level, on the contrary output low level then, the deadlock situation appears in the CPU that characterizes master controller 1.This square wave testing circuit 20 can be realized with mode known in those skilled in the art.According to a kind of execution mode, as shown in Figure 2, square wave testing circuit 20 comprises differential circuit, the first metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2 and electrochemical capacitor C2, the square-wave signal output of master controller 1 is connected to the input of differential circuit, the output of differential circuit is connected to the grid of the first metal-oxide-semiconductor Q1, be connected with electrochemical capacitor C2 between the drain electrode of the first metal-oxide-semiconductor Q1 and the source electrode, its source ground, its grid is connected to its source electrode by a resistance, its drain electrode is connected to power supply by resistance, its drain electrode also is connected to the grid of the second metal-oxide-semiconductor Q2 by resistance, the source ground of this second metal-oxide-semiconductor Q2, its drain electrode is connected to power supply by resistance, is connected with electric capacity between its drain electrode and the source electrode, and the drain electrode of this second metal-oxide-semiconductor Q2 is connected to and door 21.Differential circuit can be the RC differential circuit, comprise capacitor C 1 and resistance R 1, one end of capacitor C 1 is as the input of differential circuit, the square-wave signal output that connects master controller 1, the other end of capacitor C 1 is connected to an end of resistance R 1, and the other end of resistance R 1 is connected to the grid of metal-oxide-semiconductor Q1 as the output of differential circuit.When master controller 1 is exported normal square-wave signal to square wave testing circuit 20, this square wave can be at the positive half cycle moment conducting metal-oxide-semiconductor Q1 of its waveform through the RC differential circuit, because metal-oxide-semiconductor Q1 source electrode place is connected with electrochemical capacitor C2, the capability value of this electrochemical capacitor is 3.3uF-470uF, as being 47uF, this electrochemical capacitor C2 makes the energy of positive half cycle conducting almost all be absorbed by C2, and when turn-offing, the negative half period Q1 of waveform absorbs the energy of power Vcc, therefore the grid of metal-oxide-semiconductor Q2 can't conducting, the drain electrode output high level of Q2; When master controller 1 can't send square-wave signal, it is that high level or low level all can't make the Q1 conducting to 20 outputs of square wave testing circuit, and power Vcc is added on the grid of Q2 for a long time, makes the Q2 conducting, because so the source ground of Q2 is the drain electrode output low level of Q2.The drain electrode of Q2 is the output of square wave testing circuit 20.

As long as have one to be output as low level in the fault-signal output of the output of square wave testing circuit 20 and IPM 4; through with door 21 with regard to output low level; then characterize and be in abnormal operating state; need protect IPM; the input that is connected trigger 22 with door 21 outputs; the protection reset signal output output protection reset signal of master controller 1 is to the reset signal of trigger 22 as trigger 22; when system restoration just often; the protection reset signal end output protection signal of master controller 1 is removed the guard signal that sends to master controller 1 to the clear terminal of trigger.

Trigger 22 can be trigger known in those skilled in the art, and rest-set flip-flop for example shown in Figure 1, this rest-set flip-flop are that trailing edge is effective, and promptly when the level of R end or S end from high to low the time, Q end output level changes, and its truth table is as shown in table 1.The S that is connected to rest-set flip-flop with door 21 outputs holds, and the protection reset signal output of master controller 1 is connected to the R end, and the Q end of rest-set flip-flop is connected to the guard signal input of master controller 1 through not gate.Think guard signal when the guard signal input of supposing master controller 1 receives signal for low level, the protection to IPM is implemented in the output that needs to block the PWM waveform.Thus, when operate as normal, R=1, S=1, Q=0 then, the guard signal that is sent to the guard signal input of master controller 1 through not gate is 1, shows to be in normal operating conditions; When breaking down (any one in the fault-signal output of the output of square wave testing circuit 20 and IPM 4 is low level), S becomes 0, Q=1 then, the guard signal that is sent to the guard signal input of master controller 1 through not gate is 0, notice master controller 1 is in the abnormal work state, blocks the output of PWM waveform and implements IPM is protected; When recovering normal operating conditions, in the time of need resetting, the protection reset signal output output protection reset signal of master controller 1 puts 0 with the clear terminal R of rest-set flip-flop, makes to remove the guard mode to IPM by output Q=0.

Table 1

R	S	Q
R	S	Q	0	0	Unstable
0	1	0	0	0	Unstable
0	1	0	1	0	1
1	1	Keep	1	0	1

IPM 4 is connected with master controller 1; receive the PWM waveform of master controller 1 output; usually; IPM 4 comprises IGBT, drive circuit and built-in protective circuit; the PWM waveform that receives from master controller 1 drove IGBT afterwards through drive circuit; the built-in protective circuit of IPM has short circuit, under voltage, overcurrent and malfunction monitoring function such as overheated; when being used to detect arbitrary fault; block gate-drive; turn-off IPM 4; the fault-signal output of IPM 4 is used to export the fault-signal that characterizes these abnormalities simultaneously, characterizes when being generally low level to be in abnormality.IPM 4 can adopt the product of plug rice control (SEMIKRON) company.All fault-signals of the fault-signal output of IPM 4 output can be carried out behind the logic and operation and the output signal of square wave testing circuit 20 together via with door 21 and trigger 22 to master controller 1 output protection signal; thereby finish protection to IPM 4; in addition also can with the output signal of every road fault-signal of the fault-signal output of IPM 4 output and square wave testing circuit 20 together via with door 21 and trigger 22 to master controller 1 output protection signal, like this can be so that show the fault type of IPM 4.

Master controller 1 comprises CPU and adjunct circuit, CPU output PWM waveform to IPM 4 so that IPM 4 work, CPU also export one tunnel duty ratio be 50% PWM square-wave waveform to square wave testing circuit 20, be the square wave of 5KHz as frequency, be used to characterize whether operate as normal of CPU.The CPU of master controller 1 can select any microcontroller that can realize above-mentioned functions known in those skilled in the art for use, as the model of selecting company of Texas Instruments (TI) for use is the digital signal processor (DSP) of TMS320F2812, this DSP is 32 fixed-point DSP chip under the TMS320C2000 platform, both had digital signal processing capability, had powerful incident management ability and embedded Control function again.Adjunct circuit can comprise three-state transceiver, as 74HC573.The PWM waveform that DSP produces can be sent to IPM 4 again via three-state transceiver.As those skilled in the known, can realize protection by software or hardware mode.The implementation of software can be handled for guard signal being input to master controller 1; after confirming, master controller 1 utilizes the PWM drive signal of interruption or software switching-off IPM again; such as in system based on DSP control; guard signal can be input to the power drive protection pin (PDPINT) of DSP; DSP interrupted when this PDPINT was low level, stopped the output pwm signal to IPM.The implementation of hardware can be for being input to guard signal the Enable Pin of three-state transceiver; when the signal that is sent to Enable Pin was high level, all outputs of three-state transceiver were changed to high-impedance state, blocked the pwm signal to IPM output; thereby turn-off IPM 4, realize protection.For reaching the high reliability to the protection of IPM 4, the mode that adopts software and hardware to combine usually realizes the protection to IPM 4.Like this; master controller 1 can have two guard signal inputs; can be from the first guard signal input input protection signal with the protection of software mode realization to IPM 4; can be the PDPINT of DSP as the first guard signal input; can be from the second guard signal input input protection signal with the protection of hardware mode realization to IPM 4; can be the Enable Pin of three-state transceiver as the second guard signal input; can use in two guard signal inputs any one to realize protection to IPM 4; be preferably and use two guard signal inputs simultaneously; the mode that combines with software and hardware realizes the protection to IPM 4; this moment, the output of trigger 22 was divided into two-way; one the road is connected to one of them guard signal input; another road is connected to another guard signal input by not gate; connect the second guard signal input (being the Enable Pin of three-state transceiver) as trigger Q end among Fig. 1, Q holds through the non-first guard signal input (being the PDPINT of DSP) that is connected to behind the door.Of particular note; usually; when the signal from the first guard signal input (being the PDPINT of DSP) input is low level; block the output of PWM waveform; enforcement is to the protection of IPM 4, and from the second guard signal input (being the Enable Pin of three-state transceiver), when the signal of input is high level; just block the output of PWM waveform, implement protection IPM4.

In addition; as those skilled in the known; because the electric pressure of the fault-signal of IPM 4 is higher than the electric pressure of the CPU of master controller 1; thereby the fault-signal of IPM 4 will just can be input to CPU via light-coupled isolation module 2; to realize electic protection, so the fault-signal of IPM 4 also will be via light-coupled isolation again via being input to CPU with door, trigger etc. in the utility model to CPU.So the utility model provide the protective device 3 of IPM also comprise light-coupled isolation module 2, an end of light-coupled isolation module 2 connects the fault-signal output of IPM 4, the other end connects the input with door 21.

When the protective device 3 of the IPM that uses the utility model to provide; can come together to realize protection according to the fault-signal of IPM 4 output and the signal that characterizes the CPU working condition to IPM 4; as long as the signal of the sign CPU working condition of the fault-signal of IPM failure output terminal output and 20 outputs of square wave testing circuit has one to be low level; trigger 22 with regard to the output protection signal to master controller 1; make master controller 1 stop 4 output PWM waveforms, thereby realize protection IPM 4 to IPM.

Claims

1. the protective device of an IPM; the protective device of this IPM (3) comprises master controller (1); master controller (1) has the guard signal input; it is characterized in that; the protective device of this IPM (3) also comprise square wave testing circuit (20) and with door (21); master controller (1) also has the square-wave signal output; described square-wave signal output is connected to the input of square wave testing circuit (20); the output of square wave testing circuit (20) is connected to the input with door (21), is connected to the guard signal input of master controller (1) with the output of door (21).

2. the protective device of IPM according to claim 1; it is characterized in that; the protective device of this IPM (3) also comprises trigger (22); the input that is connected trigger (22) with the output of door (21); the output of trigger (22) is connected to the guard signal input of master controller (1); master controller (1) also has protection reset signal output, and described protection reset signal output is connected to the clear terminal of trigger (22).

3. the protective device of IPM according to claim 2 is characterized in that, trigger (22) is a rest-set flip-flop.

4. the protective device of IPM according to claim 2; it is characterized in that; master controller (1) has two guard signal inputs; the output of trigger (22) is divided into two-way; one the road is connected to one of them guard signal input, and another road is connected to another guard signal input by not gate.

5, the protective device of IPM according to claim 1 is characterized in that, the protective device of IPM also comprises light-coupled isolation module (2), and an end of light-coupled isolation module (2) connects the fault-signal output of IPM, and the other end connects the input with door.

6. the protective device of IPM according to claim 1; it is characterized in that; square wave testing circuit (20) comprises differential circuit; the first metal-oxide-semiconductor Q1; the second metal-oxide-semiconductor Q2 and electrochemical capacitor C2; the square-wave signal output of master controller (1) is connected to the input of differential circuit; the output of differential circuit is connected to the grid of the first metal-oxide-semiconductor Q1; be connected with electrochemical capacitor C2 between the drain electrode of the first metal-oxide-semiconductor Q1 and the source electrode; its source ground; its grid is connected to its source electrode by a resistance; its drain electrode is connected to power supply by resistance; its drain electrode also is connected to the grid of the second metal-oxide-semiconductor Q2 by resistance; the source ground of this second metal-oxide-semiconductor Q2; its drain electrode is connected to power supply by resistance, is connected with electric capacity between its drain electrode and the source electrode, and the drain electrode of this second metal-oxide-semiconductor Q2 is connected to and door (21).

7. the protective device of IPM according to claim 6; it is characterized in that differential circuit comprises capacitor C 1 and resistance R 1, an end of capacitor C 1 connects the square-wave signal output of master controller (1); the other end connects an end of resistance R 1, and an end of resistance R 1 connects the grid of the first metal-oxide-semiconductor Q1.

8. the protective device of IPM according to claim 6 is characterized in that, the capacity of electrochemical capacitor C2 is 3.3uF-470uF.