CN201170798Y - Electric load analogue circuit - Google Patents
Electric load analogue circuit Download PDFInfo
- Publication number
- CN201170798Y CN201170798Y CNU2008200446347U CN200820044634U CN201170798Y CN 201170798 Y CN201170798 Y CN 201170798Y CN U2008200446347 U CNU2008200446347 U CN U2008200446347U CN 200820044634 U CN200820044634 U CN 200820044634U CN 201170798 Y CN201170798 Y CN 201170798Y
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- China
- Prior art keywords
- voltage
- load
- field effect
- coupled
- mos field
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- Expired - Fee Related
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Abstract
The utility model provides an electronic load analog circuit, which is coupled with the load ends of a circuit board. One load end is coupled with one end of two parallel resistors. The other ends of the parallel resistors are connected with the drain electrodes of an N-MOS field effect tube respectively. The source electrode of the N-MOS field effect tube is connected with the other load end, and grounded. A grid is coupled with the output end of a voltage comparator. The non-inverting input end of the voltage comparator is coupled with a drive voltage by connecting with a resistor in series; the inverted input end of the voltage comparator is coupled with a direct current voltage source. In this way, when the circuit board works normally or in the instant when the power supply is turned off, at least one drive voltage is higher or lower than, or equal to the level of the direct current voltage source; the voltage comparator corresponding to the drive voltage controls the conduction or the disconnection of the corresponding N-MOS field effect tube; the corresponding parallel resistors are connected or disconnected between the load ends; accordingly, the output resistance of a circuit, namely, the voltage of the load ends, varies correspondingly, thus smoothening the undershoot waveforms of the voltages of the load ends.
Description
[technical field]
The relevant a kind of electronic load circuit of simulating pure resistance of the utility model, it is in the moment of circuit board power remove respective change resistance, with level and smooth following to waveform.
[background technology]
Generally speaking, to circuit board, can use electronic load to load when especially motherboard carries out VRD (Voltage Regulation Down, voltage-regulation standard) test.Because of electronic load and the long inductive effect that load line produced, cause this circuit board power remove moment these electronic load two ends voltage (Undershoot) appears dashing down, on waveform, be shown as the negative voltage valley, this situation can be more obvious when doing high-current test, and undue following dashing can cause pseudo clock, and then causes test data mistake (maloperation).
In view of above-mentioned, in fact be necessary to develop a kind of electronic load mimic channel, in circuit board power remove moment respective change resistance, smoothly by inductive effect cause following to waveform.
[summary of the invention]
Therefore, the purpose of this utility model promptly provides a kind of electronic load mimic channel, load between the load end of circuit board, in this circuit board power remove moment respective change resistance, smoothly by inductive effect cause following to waveform.
For reaching above-mentioned purpose, the utility model provides a kind of electronic load mimic channel, be coupled to the load end of circuit board, a load end two parallel resistances, one end that is coupled wherein, these parallel resistance other ends connect N-MOS field effect transistor drain electrode respectively, these N-MOS field effect transistor source electrodes connect another load end and ground connection, grid couples a voltage comparator output terminal respectively, these voltage comparator in-phase input ends couple driving voltage by being connected in series a resistance respectively, the inverting input direct current voltage source that is coupled, positive power source terminal coupling positive voltage source, negative power end ground connection.So when circuit board operate as normal or power remove moment, wherein at least one driving voltage is higher than and is equal to or less than the direct voltage source level, the voltage comparator corresponding with this driving voltage controlled corresponding N-MOS field effect transistor conducting or ended, corresponding parallel resistance inserts or disconnects between this load end, then the output resistance of this circuit is the load terminal voltage respective change, and is level and smooth down towards waveform.
Compared with prior art, the utility model utilizes pure resistance circuit replacement electronic load in the market to load on the load end of circuit board, under this circuit board power remove load terminal voltage occurs towards moment of waveform, the output change in resistance of this circuit, then the voltage between the load end rises, thereby reaches level and smooth following purpose towards waveform.
[description of drawings]
Fig. 1 is the circuit diagram of electronic load mimic channel of the present utility model.
[embodiment]
Consult Fig. 1, be the circuit diagram of electronic load mimic channel of the present utility model, this circuit is coupled to two load ends 31,32 of circuit board 3, wherein, this load end 31 coupling n (n=2,3 ... N) individual parallel resistance one end is two parallel resistance R in the present embodiment
1, R
2, these parallel resistances R
1, R
2The other end connects a N-channel MOS field effect transistor (present embodiment is a N channel depletion type field effect transistor) Q respectively
1, Q
2Drain D
1, D
2, these N-MOS field effect transistor Q
1, Q
2Source S
1, S
2Connect another load end 32 and ground connection, and these N-MOS field effect transistor Q
1, Q
2Grid G
1, G
2Couple the output terminal 11,21 of a voltage comparator 1,2 respectively, the in-phase input end 13,23 of these voltage comparators 1,2 is respectively by serial connection one resistance R
3, R
4Couple external drive voltage EN1, EN2, and this in-phase input end 13,23 filter capacitor C that also is coupled respectively
1, C
2To ground, inverting input 12, the 22 couplings one direct current voltage source DC of this voltage comparator 1,2, positive power source terminal 14,24 couplings one positive voltage source V
CC, this positive voltage source V
CCAlso be coupled filter capacitor C to ground, negative power end 15,25 ground connection.
The principle that is combined as this circuit of example explanation with two N-MOS field effect transistor and two voltage comparators: under the normal operating conditions, driving voltage EN1, EN2 output voltage are higher than respectively and equal, are lower than direct voltage source DC level, be that normal phase input end 13,23 voltages of voltage comparator 1,2 are higher than respectively and equal, are lower than inverting input 12,22 voltages, then output terminal 11,21 is respectively high and low level, N-MOS field effect transistor Q
1, Q
2Conducting respectively, end, this moment, the output resistance of this circuit only was parallel resistance R
1Resistance; The moment of breaking circuit plate 3 power supplys, voltage dashes (negative voltage valley) down between the load end 31,32, draw the output voltage of this circuit promptly to reduce this circuit output resistance on the need, then the output voltage of power-off while driving voltage EN2 is converted to be higher than and equals direct voltage source DC level, be that normal phase input end 23 voltages of voltage comparator 2 are higher than and equal inverting input 22 voltages, then output terminal 21 is a high level, N-MOS field effect transistor Q
2Conducting, parallel resistance R
2Also load between the load end 31,32, this moment, the output resistance of this circuit was resistance R
1, R
2Resistance in parallel total, as parallel resistance R
1, R
2When the resistance order of magnitude was close, resistance in parallel total reduced, and then voltage rises between the load end 31,32, on leave behind towards waveform, reached the purpose of the utility model.
Wherein, filter capacitor C, C
1, C
2Draw positive voltage source V respectively
CC, the radio-frequency component among two driving voltage EN1, the EN2 goes into ground.
In addition, in order to improve the waveform smoothness, the also desirable n=3 of the number of parallel resistance, N-channel MOS field effect transistor, voltage comparator and resistance in this circuit, 4,5 etc.
Claims (4)
1, a kind of electronic load mimic channel, be coupled to the load end of circuit board, it is characterized in that: load end coupling at least two parallel resistances one end wherein, these parallel resistance other ends connect N-MOS field effect transistor drain electrode respectively, these N-MOS field effect transistor source electrodes connect another load end and ground connection, grid couples a voltage comparator output terminal respectively, these voltage comparator in-phase input ends couple driving voltage by being connected in series a resistance respectively, the inverting input direct current voltage source that is coupled, so when circuit board operate as normal or power remove moment, wherein at least one driving voltage is higher than and is equal to or less than the direct voltage source level, the voltage comparator corresponding with this driving voltage controlled corresponding N-MOS field effect transistor conducting or ended, corresponding parallel resistance inserts or disconnects between this load end, then the output resistance of this circuit is the load terminal voltage respective change, and is level and smooth down towards waveform.
2, electronic load mimic channel as claimed in claim 1 is characterized in that: the positive power source terminal coupling positive voltage source of these voltage comparators, negative power end ground connection.
3, electronic load mimic channel as claimed in claim 2 is characterized in that: the in-phase input end of these voltage comparators and positive voltage source also are coupled a filter capacitor respectively to ground.
4, electronic load mimic channel as claimed in claim 1 is characterized in that: this N-MOS field effect transistor is a N channel depletion type field effect transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2008200446347U CN201170798Y (en) | 2008-03-07 | 2008-03-07 | Electric load analogue circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2008200446347U CN201170798Y (en) | 2008-03-07 | 2008-03-07 | Electric load analogue circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201170798Y true CN201170798Y (en) | 2008-12-24 |
Family
ID=40209851
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNU2008200446347U Expired - Fee Related CN201170798Y (en) | 2008-03-07 | 2008-03-07 | Electric load analogue circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN201170798Y (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105700611A (en) * | 2016-03-18 | 2016-06-22 | 重庆长安汽车股份有限公司 | Adjustable constant current electronic load |
CN111404521A (en) * | 2020-04-29 | 2020-07-10 | 贵州振华群英电器有限公司(国营第八九一厂) | Forced turn-off circuit of direct-current solid-state relay and application |
-
2008
- 2008-03-07 CN CNU2008200446347U patent/CN201170798Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105700611A (en) * | 2016-03-18 | 2016-06-22 | 重庆长安汽车股份有限公司 | Adjustable constant current electronic load |
CN111404521A (en) * | 2020-04-29 | 2020-07-10 | 贵州振华群英电器有限公司(国营第八九一厂) | Forced turn-off circuit of direct-current solid-state relay and application |
CN111404521B (en) * | 2020-04-29 | 2023-08-15 | 贵州振华群英电器有限公司(国营第八九一厂) | Forced turn-off circuit of direct-current solid relay and application |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081224 Termination date: 20110307 |