CN201130927Y - Clock circuit and electronic device having the same - Google Patents

Clock circuit and electronic device having the same Download PDF

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Publication number
CN201130927Y
CN201130927Y CNU2007200287030U CN200720028703U CN201130927Y CN 201130927 Y CN201130927 Y CN 201130927Y CN U2007200287030 U CNU2007200287030 U CN U2007200287030U CN 200720028703 U CN200720028703 U CN 200720028703U CN 201130927 Y CN201130927 Y CN 201130927Y
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China
Prior art keywords
major loop
output
electric capacity
clock circuit
clock
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Expired - Fee Related
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CNU2007200287030U
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Chinese (zh)
Inventor
郑力鑫
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Qingdao Hisense Electronics Co Ltd
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Qingdao Hisense Electronics Co Ltd
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Priority to CNU2007200287030U priority Critical patent/CN201130927Y/en
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Abstract

The utility model provides a clock circuit, aiming to obtain high precision and highly stable frequency by use of relatively low costs, which comprises a main loop, a feedback network, and a clock output end; wherein, the main loop comprises an input end and an output end; the feedback network comprises a crystal oscillator, a first capacitor, and a second capacitor; wherein, two ends of the crystal oscillator are respectively connected with one end of the first capacitor and one end of the second capacitor, and moreover, the input end and output end of the main loop are respectively connected; the other ends of the first capacitor and the second capacitor are grounded, and the clock output end is connected with the output end of the main loop. The clock circuit has the advantages of simpler structure, lower costs, simpler matching of the parameters of various elements, lower power consumption, and the reliability of providing the frequency required by the chip.

Description

Clock circuit and electronic equipment with this circuit
Technical field
The utility model relates to a kind of clock circuit, relates to a kind of clock circuit that comprises crystal oscillator more specifically.
Background technology
Along with the development of electronics technology, the function of electronic equipment is become stronger day by day, and the function of same class of electronic devices is also more and more.Yet along with electronic functionalities from strength to strength, electronic equipment requires also more and more higher for the structure of itself, because most electronic product all is to realize main function by several chip, and for most digit chip, clock is the basic of its work, and the difference of clock frequency has directly determined the speed of electronic product, and whether stablizing of clock also determined whether stablizing of electronic product.
With the television product is example, along with the rise of panel TV, before television function has surmounted far away can only TV reception stage, television set not only can teleview, receive broadcasting, even can also realize online or the like multiple function.Meanwhile, the chip on the TV motherboard is increasingly sophisticated, and these chips all are digit chips, and the functional module that needs a frequency to take place---clock circuit is to the ground mass of his work.
Yet present most clock circuit all is to carry out different designs according to different electronic products, because these clock circuit specific aims are stronger, a kind of clock circuit can only be used on specific electronic product, and versatility is not strong.The then price comparison costliness of clock circuit that some versatilities are stronger is unfavorable for reducing cost.
The utility model content
In order to address the above problem, clock circuit of the present utility model is with the critical piece of crystal oscillator as vibration, because the stability of crystal oscillator frequency of oscillation and precision are all than higher, so clock circuit of the present utility model can be met the clock reference of chip demand.
Concrete, the utility model provides a kind of clock circuit, comprise major loop, feedback network and output terminal of clock, described major loop comprises input and output, described feedback loop comprises crystal oscillator, first electric capacity and second electric capacity, the two ends of described crystal oscillator connect described first electric capacity and second electric capacity, one end on the one hand respectively, the input and the output that connect described major loop on the other hand respectively, the other end ground connection of described first electric capacity and second electric capacity, described output terminal of clock links to each other with the output of major loop.
The input of above-mentioned major loop can link to each other by one first resistance with output.
Above-mentioned first resistance can be adjustable resistance.
The output of above-mentioned major loop can connect an end of described crystal oscillator by second resistance.
Above-mentioned major loop comprises a reverser, and the input of reverser connects the input of major loop, and the output of reverser connects the output of major loop.
Further, the utility model also provides a kind of electronic equipment with above-mentioned clock circuit, comprise clock circuit, this clock circuit comprises major loop, feedback network and output terminal of clock, described major loop comprises input and output, described feedback loop comprises crystal oscillator, first electric capacity and second electric capacity, the two ends of described crystal oscillator connect described first electric capacity and second electric capacity, one end on the one hand respectively, the input and the output that connect described major loop on the other hand respectively, the other end ground connection of described first electric capacity and second electric capacity, described output terminal of clock links to each other with the output of major loop.
The input of above-mentioned major loop can link to each other by one first resistance with output.
Above-mentioned first resistance can be adjustable resistance.
The output of above-mentioned major loop can connect an end of described crystal oscillator by second resistance.
Above-mentioned major loop comprises a reverser, and the input of reverser connects the input of major loop, and the output of reverser connects the output of major loop.
Clock circuit of the present utility model is used the frequency that lower cost obtains degree of precision and higher stability.The utility model circuit is simple, and cost is lower, and the parameter matching of various elements is fairly simple, and power consumption is less, the frequency that can provide chip to need reliably.
Description of drawings
Figure 1 shows that a kind of circuit diagram of clock circuit of the present utility model.
Figure 2 shows that the equivalent electric circuit of crystal oscillator shown in Figure 1.
Figure 3 shows that the reactance-frequency characteristics of crystal oscillator shown in Figure 1.
Embodiment
The utility model is described in more detail below in conjunction with the drawings and specific embodiments.
Figure 1 shows that the circuit diagram of clock circuit of the present utility model.As shown in the figure, clock circuit of the present utility model comprises major loop 110, feedback network 120 and output terminal of clock 130, major loop 110 comprises input and output, feedback loop 120 comprises crystal oscillator Y1, capacitor C 1 and capacitor C 2, the two ends of crystal oscillator Y1 connect capacitor C 1 and capacitor C 2 on the one hand respectively, the input and the output that connect major loop 110 on the other hand respectively, the other end of capacitor C 1 and capacitor C 2 is ground connection simultaneously, and output terminal of clock 130 links to each other with the output of major loop 110.
Major loop 110 shown in the figure is made of reverser U1, does not have other peripheral components, and certainly, major loop 110 also can be an amplifier, or adds some peripheral components by amplifier, inverter and form, and the utility model is not limited thereto.Crystal oscillator Y1 can be a quartz oscillator, its frequency of oscillation can be selected according to the needs of electronic equipment, for example frequency of oscillation is the quartz oscillator of 12M, capacitor C 1 and capacitor C 2 are the building-out capacitor of crystal oscillator Y1, and crystal oscillator Y1 and capacitor C 1, capacitor C 2 constitute feedback network 120.The value of capacitor C 1 and capacitor C 2 can be identical, for example 20 pico farads.
Crystal oscillator Y1 is the main devices of clock circuit of the present utility model, is that example is described below with the quartz oscillator.Quartz oscillator is a kind of resonating device that utilizes the piezoelectric effect of quartz crystal (crystalline solid of silicon dioxide) to make, its basic comprising roughly is: downcut thin slice from a quartz crystal by certain azimuth and (abbreviate wafer as, it can be square, rectangle or circle etc.), the coating silver layer is as electrode on its two corresponding surfaces, respectively welding a lead-in wire on each electrode receives on the pin, add package casing and just constituted quartz-crystal resonator, abbreviate quartz crystal or crystal, crystal oscillator as.Its product is generally with metal shell encapsulation, also useful glass shell, pottery or Plastic Package.
Piezoelectric effect is a specific character of quartz oscillator.If add an electric field on two electrodes of quartz crystal, wafer will produce mechanical deformation.Otherwise, if apply mechanical pressure, then on the corresponding direction of wafer, will produce electric field in the both sides of wafer, this physical phenomenon is called piezoelectric effect.If add alternating voltage on the two poles of the earth of wafer, wafer will produce mechanical oscillation, and the mechanical oscillation of wafer simultaneously can produce alternating electric field again.In the ordinary course of things, the amplitude of wafer mechanical oscillation and the amplitude of alternating electric field are very small, but when the frequency that adds alternating voltage is a certain particular value, amplitude obviously strengthens, more much bigger than the amplitude under other frequencies, this phenomenon is called piezoelectric resonator, and the resonance phenomena in it and LC loop is quite similar.The cutting mode of its resonance frequency and wafer, geometry, size etc. are relevant.
The equivalent electric circuit of quartz-crystal resonator as shown in Figure 2.When crystal does not vibrate, so long regard it as a plate condenser and call electrostatic capacitance C, its size is relevant with physical dimension, the electrode area of wafer, and generally several approximately PF are to tens PF.When crystal oscillation, the inertia of mechanical oscillation can come equivalence with inductance L.The value of general L is that tens mH are to hundreds of mH.The elasticity of wafer can be come equivalence with capacitor C, and the value of C is very little, generally has only 0.0002~0.1pF.The loss that causes because of friction during the wafer vibration comes equivalence with R, and its numerical value is about 100 Ω.Because the equivalent inductance of wafer is very big, and C is very little, R is also little, so the quality factor q in loop is very big, can reach 1000~10000.The resonance frequency that adds wafer itself is only relevant with cutting mode, geometry, the size of wafer basically, and can do accurately, and therefore the oscillating circuit that utilizes quartz resonator to form can obtain very high frequency stability.
From the equivalent electric circuit of quartz-crystal resonator as can be known, it has two resonance frequencys, that is: when L, C, R branch road generation series resonance, and its equiva lent impedance minimum (equaling R).Series connection is wiped vibration frequency and is represented that with fs quartz crystal is wiped vibration frequency fs for series connection and is pure resistive; When frequency is higher than fs, L, C, R branch road be the perception, can with capacitor C generation parallel resonance, its frequency in parallel is represented with fd.According to the equivalent electric circuit of quartz crystal, can qualitatively draw it reactance-frequency characteristics as shown in Figure 3.As seen when frequency was lower than series resonance frequency fs or frequency and is higher than parallel connection and wipes vibration frequency fd, quartz crystal was capacitive.Only in the extremely narrow scope of fs<f<fd, quartz crystal is perception.
Clock circuit of the present utility model is except major loop 110, feedback network 120 and output terminal of clock 130, and clock circuit of the present utility model can also comprise resistance R 1 and resistance R 2.As shown in the figure, resistance R 1 is connected the two ends of major loop 110, and resistance R 2 then is connected between output terminal of clock 130 and the feedback network 120.Resistance R 1 and R2 can regulate the feedback factor of feedback network 120, and the output that can prevent inverter U1 is overdrived to crystal oscillator Y1's, thereby have avoided the damage of crystal oscillator Y1.Because the frequency accuracy of crystal oscillator Y1 and stability are than higher, thereby the frequency characteristic of feedback network 120 is than higher, so the final frequency that produces is more stable.The clock frequency of this practical circuit is regulated more convenient.The crystal oscillator of using different frequencies of oscillation instead can obtain different frequencies.The time that starting of oscillation needs can be regulated by R1, and the value of general R1 can be between 820K to 30M.If in order to regulate the starting of oscillation time more easily, R1 also can be an adjustable resistance.For this circuit, starting of oscillation time lengthening, frequency stability meeting variation; And opposite, reduce the starting of oscillation time, frequency stability can improve.
Clock circuit of the present utility model is a main element with the crystal oscillator, and resistance and electric capacity in the collocation constitute feedback loop.This feedback loop constitutes oscillator with the inverter in the major loop, and frequency is obtained by the output of inverter.The utility model adopts crystal oscillator and peripheral resistance-capacitance network to constitute feedback network, and realize in parallel with inverter, and its configuration circuit is fairly simple, need not the setting of special setting element parameter.The frequency that needs can be adjusted easily, and precision and stability can be guaranteed.
Certainly; above-mentioned explanation is not to be to restriction of the present utility model; the utility model also is not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present utility model also should belong to protection range of the present utility model.

Claims (10)

1, a kind of clock circuit, comprise major loop, feedback network and output terminal of clock, it is characterized in that: described major loop comprises input and output, described feedback loop comprises crystal oscillator, first electric capacity and second electric capacity, the two ends of described crystal oscillator connect described first electric capacity and second electric capacity, one end on the one hand respectively, the input and the output that connect described major loop on the other hand respectively, the other end ground connection of described first electric capacity and second electric capacity, described output terminal of clock links to each other with the output of major loop.
2, clock circuit according to claim 1 is characterized in that: the input of described major loop links to each other by first resistance with output.
3, clock circuit according to claim 2 is characterized in that: described first resistance is adjustable resistance.
4, clock circuit according to claim 2 is characterized in that: the output of described major loop connects an end of described crystal oscillator by second resistance.
5, according to the arbitrary described clock circuit of claim 1-4, it is characterized in that: described major loop comprises a reverser, and the input of reverser connects the input of major loop, and the output of reverser connects the output of major loop.
6, a kind of electronic equipment, comprise clock circuit, this clock circuit comprises major loop, feedback network and output terminal of clock, it is characterized in that: described major loop comprises input and output, described feedback loop comprises crystal oscillator, first electric capacity and second electric capacity, the two ends of described crystal oscillator connect described first electric capacity and second electric capacity, one end on the one hand respectively, the input and the output that connect described major loop on the other hand respectively, the other end ground connection of described first electric capacity and second electric capacity, described output terminal of clock links to each other with the output of major loop.
7, electronic equipment according to claim 6 is characterized in that: the input of described major loop links to each other by first resistance with output.
8, electronic equipment according to claim 7 is characterized in that: described first resistance is adjustable resistance.
9, electronic equipment according to claim 7 is characterized in that: the output of described major loop connects an end of described crystal oscillator by second resistance.
10, according to the arbitrary described electronic equipment of claim 6-9, it is characterized in that: described major loop comprises a reverser, and the input of reverser connects the input of major loop, and the output of reverser connects the output of major loop.
CNU2007200287030U 2007-09-27 2007-09-27 Clock circuit and electronic device having the same Expired - Fee Related CN201130927Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2007200287030U CN201130927Y (en) 2007-09-27 2007-09-27 Clock circuit and electronic device having the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2007200287030U CN201130927Y (en) 2007-09-27 2007-09-27 Clock circuit and electronic device having the same

Publications (1)

Publication Number Publication Date
CN201130927Y true CN201130927Y (en) 2008-10-08

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNU2007200287030U Expired - Fee Related CN201130927Y (en) 2007-09-27 2007-09-27 Clock circuit and electronic device having the same

Country Status (1)

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CN (1) CN201130927Y (en)

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GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20081008

Termination date: 20110927