CN201111021Y - Equipment interconnection equipment based on USB interface - Google Patents
Equipment interconnection equipment based on USB interface Download PDFInfo
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- CN201111021Y CN201111021Y CNU2007201186624U CN200720118662U CN201111021Y CN 201111021 Y CN201111021 Y CN 201111021Y CN U2007201186624 U CNU2007201186624 U CN U2007201186624U CN 200720118662 U CN200720118662 U CN 200720118662U CN 201111021 Y CN201111021 Y CN 201111021Y
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Abstract
The utility model discloses a device interconnection device based on a USB interface, comprising an embedded CPU, an FPGA chip used for dynamic configuration of the USB interface, a FLASH program memory and a DRAM data memory; wherein the embedded CPU is connected with the FPGA chip in a local bus way and the FPGA chip is connected with a plurality of USB interfaces by the high-speed I / O ports of the FPGA chip; besides, the CPU is also connected with the program memory FLASH and the data memory DRAM. Various USB devices are ensured for organic connection and communication through the control of the CPU.
Description
[technical field]
The utility model relates to the consumption electronic products technical field, particularly a kind of USB interface-based apparatus interconnection device.
[background technology]
At present, the USB interface technology has been widely used in computing machine and the consumption electronic product, though USB interface can realize the exchange of equipment room data, but to be not a kind of proper peerings connect agreement for it, in the USB connected system, must have a main frame to exist, communication also is to be based upon on principal and subordinate's control relation basis.That is to say that in the USB connected system both sides of exchanges data are active and passive relation, the equipment that is in Host Status is possessed of control power, and is in the Be Controlled state and be in from the equipment of state.Design around this control center of computing machine at the beginning of the usb protocol exploitation, just computing machine is main control person in the USB linked system, and it is responsible for the distribution of USB peripheral ID and the exchange control of data.Along with becoming increasingly abundant of USB device product, more USB product has been the peripheral equipment of computing machine no longer, many these equipment also have the main control ability of USB such as equipment such as TV, PDA, digital cameras, and just computer no longer has been the main body of USB linked system.When such equipment needs mutual exchanges data and communicates by letter, the situation that a plurality of HOST controllers occurred, the equipment that has a HOST USB control function such as TV and computer, TV and TV, PDA and TV etc. can't directly connect USB and communicate by letter together the time.For this reason, when USB develops into USB2.0, proposed the treating method of OTG (on the go), the method is to add USB HOST function on the basis of USBDEVICE, possesses certain principal and subordinate's switching capability.But still can not satisfy the needs that interconnect between the various USB device.
[novel content]
For addressing the above problem, fundamental purpose of the present utility model is to provide a kind of USB interface-based apparatus interconnection device.
For achieving the above object, the technical scheme of this creation is: a kind of USB interface-based apparatus interconnection device comprises embedded type CPU, is used for fpga chip, FLASH program storage, the DRAM data-carrier store of dynamic-configuration USB interface; Wherein, embedded type CPU connects fpga chip with local bus bus mode, and fpga chip utilizes its High Speed I/O mouth to connect a plurality of USB interface; In addition, CPU also is connected with program storage FLASH and data-carrier store DRAM.
Further, described Flash program storage stores the IP kernel of configuration USB interface in the required embedded OS of this device operation, USB driver, apparatus interconnection exchange agreement, the fpga chip.
Further, described IP kernel is divided into HOST and two kinds of nuclears of DEVICE, in order to FPGA is configured as the hardware cell with usb function, can become this interface HOST or the DEVICE equipment of USB according to the equipment situation.
Further, described embedded type CPU is responsible for the control of whole device, specifically comprise dynamic-configuration to FPGA, USB device identification, drive and load and the execution control of equipment room exchange agreement.
Further, described FPGA is in dynamic-configuration and two states of operation under the control of embedded type CPU, and CPU disposes the IP kernel that this FPGA goes up USB interface according to the character HOST or the DEVICE of the equipment of insertion.
Compared to prior art, a kind of USB interface-based devices interconnect device of the utility model, possess a plurality of USB interface, and each USB interface can be HOST pattern or DEVICE pattern by flexible configuration, bonding apparatus interconnecting and switching agreement, by the control of CPU, guarantee between the various USB device can organic connection with communicate by letter.
[description of drawings]
Fig. 1 is a functional-block diagram of the present utility model;
Fig. 2 is the running software process flow block diagram in the utility model.
[embodiment]
Please refer to shown in Figure 1ly, a kind of USB interface-based apparatus interconnection device of the utility model comprises embedded type CPU, is used for fpga chip, FLASH program storage, the DRAM data-carrier store of dynamic-configuration USB interface; Wherein, embedded type CPU connects fpga chip with local bus bus mode, and fpga chip utilizes its High Speed I/O mouth to connect a plurality of USB interface; In addition, CPU also is connected with program storage FLASH and data-carrier store DRAM.
Embedded type CPU is responsible for the control of whole device, comprises that specifically dynamic-configuration, the identification of USB device, the driving to FPGA loads, the execution Control work of equipment room exchange agreement; FPGA is in order to realize the physical connection of a plurality of USB device; The Flash program storage stores the IP kernel of configuration USB interface in the required embedded OS of this device operation, USB driver, apparatus interconnection exchange agreement, the fpga chip.Wherein, embedded OS is responsible for driving providing of system resource in the operation of loading, exchange agreement program of code and the device data exchange; The USB driver then mainly is the access that guarantees compatible various USB device, and system is to the read-write control of this equipment; The apparatus interconnection exchange agreement mainly is to connect and communication in order to the discovery of variety classes, heterogeneity USB device, software.Specifically comprise the visit ID of this device setting, the work such as data access mode between unified each USB device are registered, distributed to the USB device of carrying out physical connection in this device operation system; IP kernel is in order to be configured as FPGA the hardware cell with usb function, and it is divided into HOST and two kinds of nuclears of DEVICE, this interface is become HOST or the DEVICE equipment of USB according to the equipment situation.Under the control of embedded type CPU, FPGA is in dynamic-configuration and two states of operation, and also being CPU disposes the IP kernel that this FPGA goes up USB interface according to the character HOST or the DEVICE of the equipment of insertion, thereby sets up basic USB bottom communication.Concrete, when insertion equipment was DEVICE (slave unit), the USB interface on this FPGA was configured to HOST (main control) pattern; When inserting HOST (main control) equipment, the USB interface on this FPGA is configured to DEVICE (slave unit) pattern.
When equipment is connected to this device, at first the I/O mouth that is connected on the USB interface of FPGA can judge that just current device is main or slave unit according to the power pins level of the equipment of insertion, this moment, FPGA can feed back to CPU to the result who detects, after CPU obtains information from FPGA, from FLASH, take out the configuration code of FPGA, be configured in configuration code in this FPGA the corresponding interface unit dynamically and form hardware cell.After this, the software that operates among the CPU can further detect the type and the model of this equipment, and calls the corresponding driving program.After being this port loading equipemtn driving, basic usb communication is set up.Operate in the data exchange processing software among the CPU, further distribute specific I D information and in operating system, register last type setting data access interface according to this equipment for the USB interface of setting up basic communication.When the another one USB device need be visited the USB device of this port, at first it will search for the facility information of having registered in system, and found the ID of these equipment, just found the access interface of these equipment at last.After two equipment are set up its correspondence, under the control of exchanges data process, just can realize the free exchanges data of two equipment rooms.
Please refer to shown in Figure 2ly, during application, os starting is at first done initialization to CPU and peripheral equipment thereof, then FPGA is done simple initial configuration, makes each USB interface have port detection function.After FPGA is initialised end, the os starting application program, and whether the port of constantly inquiring about on the FPGA has equipment to insert.When the equipment of detecting is linked on the USB port of FPGA, it is main or slave unit that application program can further detect this equipment, and whether be high level, if be high level if promptly detecting this device power supply (DPS) incoming end, then access device is a main equipment, otherwise is slave unit.After judging master-slave equipment, CPU takes out the configuration code of FPGA to the FPGA dynamic-configuration from FLASH.Equipping rules is if access device is a main equipment, then to dispose the IP kernel from USB; If the access slave unit then disposes the IP kernel of main USB.
After FPGA carried out dynamic-configuration, operating system needed further to detect the specific category and the model of this USB device, so that load the corresponding driving program.After driver successfully loaded, exchanges data software was this devices allocation ID and to its registration, so that the miscellaneous equipment search.After success was registered, system set up unified data access passage for this equipment.Promptly when miscellaneous equipment inserts, can carry out exchanges data and communicate by letter by so unified passage.
Most preferred embodiment described above only is that the utility model is set forth and illustrated, but is not limited to disclosed any concrete form, and it is possible carrying out many modifications and variations.
Claims (1)
1. USB interface-based apparatus interconnection device, the FLASH program storage that comprise embedded type CPU, links to each other with CPU, DRAM data-carrier store is characterized in that: also comprise the fpga chip that also is useful on the dynamic-configuration USB interface; Wherein, embedded type CPU connects fpga chip with local bus bus mode, and fpga chip utilizes its High Speed I/O mouth to connect a plurality of USB interface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CNU2007201186624U CN201111021Y (en) | 2007-02-12 | 2007-02-12 | Equipment interconnection equipment based on USB interface |
Applications Claiming Priority (1)
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CNU2007201186624U CN201111021Y (en) | 2007-02-12 | 2007-02-12 | Equipment interconnection equipment based on USB interface |
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CN201111021Y true CN201111021Y (en) | 2008-09-03 |
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CNU2007201186624U Expired - Fee Related CN201111021Y (en) | 2007-02-12 | 2007-02-12 | Equipment interconnection equipment based on USB interface |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102508810A (en) * | 2011-10-08 | 2012-06-20 | 中兴通讯股份有限公司 | Switching device and switching method |
CN102609035A (en) * | 2011-01-24 | 2012-07-25 | 上海风格信息技术有限公司 | Self-adaption modular circuit based on embedded system and self-adaption method thereof |
CN101751978B (en) * | 2008-12-01 | 2012-12-26 | 研祥智能科技股份有限公司 | Electronic disk based on NAND FLASE and operation and control method thereof |
CN106598901A (en) * | 2016-12-08 | 2017-04-26 | 邦彦技术股份有限公司 | System and chip for converting Local Bus into USB based on FPGA |
-
2007
- 2007-02-12 CN CNU2007201186624U patent/CN201111021Y/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101751978B (en) * | 2008-12-01 | 2012-12-26 | 研祥智能科技股份有限公司 | Electronic disk based on NAND FLASE and operation and control method thereof |
CN102609035A (en) * | 2011-01-24 | 2012-07-25 | 上海风格信息技术有限公司 | Self-adaption modular circuit based on embedded system and self-adaption method thereof |
CN102609035B (en) * | 2011-01-24 | 2015-05-27 | 上海风格信息技术股份有限公司 | Self-adaption modular circuit based on embedded system and self-adaption method thereof |
CN102508810A (en) * | 2011-10-08 | 2012-06-20 | 中兴通讯股份有限公司 | Switching device and switching method |
CN102508810B (en) * | 2011-10-08 | 2018-01-23 | 中兴通讯股份有限公司 | A kind of switching device and forwarding method |
CN106598901A (en) * | 2016-12-08 | 2017-04-26 | 邦彦技术股份有限公司 | System and chip for converting Local Bus into USB based on FPGA |
WO2018103113A1 (en) * | 2016-12-08 | 2018-06-14 | 邦彦技术股份有限公司 | Fpga-based system for converting local bus into usb, and chip |
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Granted publication date: 20080903 Termination date: 20150212 |
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EXPY | Termination of patent right or utility model |