CN201087945Y - Device for eliminating multipath echo - Google Patents
Device for eliminating multipath echo Download PDFInfo
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- CN201087945Y CN201087945Y CNU2007200752066U CN200720075206U CN201087945Y CN 201087945 Y CN201087945 Y CN 201087945Y CN U2007200752066 U CNU2007200752066 U CN U2007200752066U CN 200720075206 U CN200720075206 U CN 200720075206U CN 201087945 Y CN201087945 Y CN 201087945Y
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- baseband signal
- digital
- signal processor
- multipath echo
- gate array
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Abstract
The utility model provides a device eliminating a multipath echo. The device is applicable to the multipath communication condition and is used for eliminating the multipath echo. The prior arithmetic for eliminating the multipath echo is generally realized by adopting a locale programmable gate array component, and the realizing cost is higher. The utility model is realized by adopting a mode for combining a digital signal processor and the locale programmable gate array component, the arithmetic is divided into two parts which are respectively finished by a locale programmable gate array module with dense calculation and a baseband signal processing module. The locale programmable gate array module is realized by adopting the locale programmable gate array component, and the baseband signal processing module is realized by adopting the digital signal processor. A locale programmable gate array component with low cost and a digital signal processor with low cost can be adopted to realize the elimination of the multipath echo, thereby lowering the realizing cost.
Description
Technical field
The utility model relates to a kind of digital signal processing device, particularly a kind of device of eliminating multipath echo.
Background technology
Multipath echo is a kind of radio-wave reflection phenomenon, mainly be that the transmitted wave of radio base station has been run into object and reflected, the echo of reflection is received by the reception antenna of radio base station again, and the echo of reflection can exert an influence to the radio base station received signal, this situation just is called as multipath echo to be disturbed, and this interference phenomenon all may take place in mobile base station and broadcast base station.
At present, eliminating multipath echo generally all is the algorithm that adopts specific elimination multipath echo, and these algorithms all are known, and the realization of eliminating the multipath echo method is based on on-the-spot configurable gate array device at present and realizes that cost is higher.
Therefore, how to realize that a kind of device of eliminating multipath echo has cheaply become the technical problem that industry needs to be resolved hurrily.
The utility model content
Technical problem to be solved in the utility model is to provide a kind of device of eliminating multipath echo cheaply.
In order to solve the problems of the technologies described above, the utility model provides a kind of device of eliminating multipath echo, and it comprises: a Field Programmable Gate Array is used for the digital signal that receives is carried out digital filtering, and is translated into corresponding digital baseband signal; And a baseband signal processor, to the described digital baseband signal that receives carry out handle after, output again; Wherein, described Field Programmable Gate Array further comprises: at least one down conversion filter, be used for digital signal filter to receiving, and make it to be converted to digital baseband signal; One receives storage control, is used to control the transmission of described digital baseband signal; One reception memorizer is used to store described digital baseband signal, when described reception memorizer is filled with, produces an interruption, reads data in the reception memorizer to notify described baseband signal processor, and carries out corresponding data processing; One sends memory, is used to store the data result via after the described baseband signal processor execution data processing; One sends storage control, is used to control the transmission of described data result; And a up-converting filter, be used for after the described data result filtering, again output.
The digital signal that described Field Programmable Gate Array receives further comprises digital received signal and digital reference signal, correspondingly, described Field Programmable Gate Array comprises two down conversion filters, respectively digital received signal and the digital reference signal that receives is converted to corresponding digital baseband received signal and digital baseband reference signal.
Further, adopt external memory access bus, I between described Field Programmable Gate Array and the baseband signal processor
2A kind of mode in C or the spi bus realizes that exchanges data connects, and adopts at least between the two and receive the interrupt signal line, read to finish holding wire and write and finish holding wire as connecting signal.
Further, finish holding wire and link to each other with reading by receiving the interrupt signal line between described reception storage control and the baseband signal processor; Finish holding wire and link to each other by writing between described transmission storage control and the baseband signal processor.
When described reception memorizer is filled with, the described reception interrupt signal of described reception storage control zero clearing line.
When described baseband signal processor reading of data was finished, described the reading of described reception storage control set finished holding wire, and described the reading of zero clearing finished holding wire and read until next time and finish after the scheduled time; When detecting, described reception storage control describedly reads when finishing holding wire and being set the described reception interrupt signal of described reception storage control set line.
When the data after described baseband signal processor will be handled write and send memory and finish, described baseband signal processor set said write was finished holding wire, and the zero clearing said write is finished holding wire and write until next time and finish after the scheduled time.
When described transmission storage control detected said write and finishes holding wire and be set, the data result in the described transmission memory of described transmission memory controller controls transferred to described up-converting filter.
The utility model has adopted the digital processing device to add the assembled scheme of field programmable gate array, algorithm is divided into two parts, finish by the field programmable gate array module and the baseband signal processing module of computation-intensive respectively, this field programmable gate array module adopts Field Programmable Gate Array to realize, baseband signal processing module then adopts digital signal processor to realize, can adopt a Field Programmable Gate Array cheaply and a digital signal processor cheaply to realize the elimination of multipath echo like this, thereby reduce the realization cost.
Description of drawings
Fig. 1 is the structural representation of elimination multipath echo device of the present utility model.
Embodiment
Below will be described in further detail in conjunction with specific embodiments elimination multipath echo device of the present utility model.
The structure of the device 1 of elimination multipath echo of the present utility model as shown in Figure 1, this device 1 comprises a Field Programmable Gate Array 10 and a baseband signal processor 20, wherein, Field Programmable Gate Array 10 is used for the digital signal that receives is carried out digital filtering, and being translated into corresponding digital baseband signal, baseband signal processor 20 then is used for output again after the received digital baseband signal execution processing.In the present embodiment, Field Programmable Gate Array 10 can adopt the XC4VLX25 chip of Xilinx company, and baseband signal processor 20 can adopt the BF531 digital signal processor of the Blackfin series of Analog Devices Inc.
Field Programmable Gate Array 10 of the present utility model further comprises: down conversion filter 12, receive storage control 13, reception memorizer 14, send memory 15, send storage control 16 and up-converting filter 17, wherein, down conversion filter 12 is used for the digital signal filter to receiving, make it to be converted to digital baseband signal, in the present embodiment, comprise that two down conversion filters 12 receive a digital received signal and a digital reference signal respectively, and be converted into corresponding digital baseband received signal and digital baseband reference signal; Receive the transmission that storage control 13 is used for the control figure baseband signal, in the present embodiment, receive between storage control 13 and the baseband signal processor 20 with reception interrupt signal line 30 and read and finish holding wire 32 and be connected and shake hands; Reception memorizer 14 is used to store described digital baseband signal, when reception memorizer 14 is filled with, produce an interruption, read data in the reception memorizer 14 with notice baseband signal processor 20, and carry out corresponding data processing, in the present embodiment, adopt data/address bus 40 to be connected between described reception memorizer 14 and the baseband signal processor 20, for example, as external memory access bus, I
2Any data/address bus implementation in C or the spi bus; Transmission memory 15 is used to store the data result via after the described baseband signal processor 20 execution data processing, in the present embodiment, send between memory 15 and the baseband signal processor 20 and also adopt data/address bus 40 to be connected, for example external memory access bus, I
2Any data/address bus implementation in C or the spi bus; Send the transmission that storage control 16 is used to control described data result, in the present embodiment, finish holding wire 34 and be connected and shake hands to write between described transmission storage control 16 and the baseband signal processor 20; And up-converting filter 17 is used for output again after the described data result filtering.
Aforementioned each functional module can adopt Field Programmable Gate Array 10, and promptly the look-up table and the multiplier that are provided of XC4VLX25 chip realized, do not give unnecessary details again at this.In the present embodiment, the capacity of described reception memorizer 14 and transmission memory 15 all is 64 bytes.
The algorithm of eliminating multipath echo uses the C speech encoding to realize, and the SDK (Software Development Kit) generation target machine sign indicating number that adopts Analog Devices Inc to provide, and deposits baseband signal processor 20 in, promptly in the program storage 22 of BF531 chip.
In the present embodiment, the handshake communication connected mode of XC4VLX25 chip and BF531 chip is as follows in more detail:
Receive interrupt signal line 30, the general pin F15 of XC4VLX25 chip is connected to the external interrupt input PF0 of BF531 chip;
Read and finish holding wire 32, the general pin E15 of XC4VLX25 chip is connected to the general pin PF1 of BF531 chip;
Write and finish holding wire 34, the general pin E6 of XC4VLX25 chip is connected to the general pin PF2 of BF531 chip.
Below in conjunction with Fig. 1 the working method of elimination multipath echo device of the present utility model is described in detail:
At first, receive a digital received signal by Field Programmable Gate Array 10, the digital received signal is by down conversion filter 12, become a digital baseband received signal, simultaneously, Field Programmable Gate Array 10 also receives a digital reference signal, and digital reference signal becomes a digital baseband reference signal by down conversion filter 12; Digital baseband received signal and digital baseband reference signal are under the control that receives storage control 13, deposit reception memorizer 14 in, when reception memorizer 14 is filled with, receive storage control 13 zero clearings and receive interrupt signal line 30, and produce an interruption, with notice baseband signal processor 20 reading of data; Have no progeny in having produced reception, baseband signal processor 20 enters one and receives Interrupt Process service routine, reading of data from reception memorizer 14.
After baseband signal processor 20 reading of data were finished, set was read and is finished holding wire 32, and after the scheduled time, for example 100 milliseconds, zero clearing is read and finished holding wire 32, withdraws from interrupt service routine simultaneously; Finish holding wire 32 for behind the height when reception storage control 13 detects to read, i.e. set receives interrupt signal line 30, eliminates interrupt signal; Baseband signal processor 20 operations are stored in the data of the algorithm of the elimination multipath echo in the program storage 22 with the processing reception, and the data result after will handling writes transmission memory 15.
After baseband signal processor 20 write the data result end, set writes finished holding wire 34, and after the scheduled time, for example 100 milliseconds, zero clearing writes finishes holding wire 34; Finish holding wire 34 for behind the height when transmission storage control 16 detects to write, the data results that send in the memory 15 are sent to up-converting filter 17; At last, 17 couples of data results carry out filtering by up-converting filter, again output.
In sum, adopt device of the present utility model, only need utilize cheaply Field Programmable Gate Array and cheaply digital signal processor can realize, greatly reduce installation cost.
Claims (11)
1. a device of eliminating multipath echo is characterized in that, the device of described elimination multipath echo comprises:
One Field Programmable Gate Array is used for the digital signal that receives is carried out digital filtering, and is translated into corresponding digital baseband signal; And
One baseband signal processor, after the described digital baseband signal execution processing that receives, output again;
Wherein, described Field Programmable Gate Array further comprises:
At least one down conversion filter is used for the digital signal filter to receiving, and makes it to be converted to digital baseband signal;
One receives storage control, is used to control the transmission of described digital baseband signal;
One reception memorizer is used to store described digital baseband signal, when described reception memorizer is filled with, produces an interruption, reads data in the reception memorizer to notify described baseband signal processor, and carries out corresponding data processing;
One sends memory, is used to store the data result via after the described baseband signal processor execution data processing;
One sends storage control, is used to control the transmission of described data result; And
One up-converting filter is used for after the described data result filtering, again output.
2. the device of elimination multipath echo as claimed in claim 1 is characterized in that, the digital signal that described Field Programmable Gate Array receives further comprises digital received signal and digital reference signal.
3. the device of elimination multipath echo as claimed in claim 2, it is characterized in that, described Field Programmable Gate Array comprises two down conversion filters, respectively digital received signal and the digital reference signal that receives is converted to corresponding digital baseband received signal and digital baseband reference signal.
4. the device of elimination multipath echo as claimed in claim 1 is characterized in that, adopts external memory access bus, I between described Field Programmable Gate Array and the baseband signal processor
2A kind of mode in C or the spi bus realizes that exchanges data connects.
5. the device of elimination multipath echo as claimed in claim 1, it is characterized in that, adopt at least between described Field Programmable Gate Array and the baseband signal processor and receive the interrupt signal line, read to finish holding wire and write and finish holding wire as being connected signal.
6. the device of elimination multipath echo as claimed in claim 5 is characterized in that, finishes holding wire and links to each other with reading by receiving the interrupt signal line between described reception storage control and the baseband signal processor; Finish holding wire and link to each other by writing between described transmission storage control and the baseband signal processor.
7. the device of elimination multipath echo as claimed in claim 6 is characterized in that, when described reception memorizer is filled with, and the described reception interrupt signal of described reception storage control zero clearing line.
8. the device of elimination multipath echo as claimed in claim 6, it is characterized in that, when described baseband signal processor reading of data is finished, described the reading of described reception storage control set finished holding wire, and described the reading of zero clearing finished holding wire and read until next time and finish after the scheduled time.
9. the device of elimination multipath echo as claimed in claim 8 is characterized in that, describedly reads when finishing holding wire and being set the described reception interrupt signal of described reception storage control set line when described reception storage control detects.
10. the device of elimination multipath echo as claimed in claim 6, it is characterized in that, when the data after described baseband signal processor will be handled write and send memory and finish, described baseband signal processor set said write is finished holding wire, and the zero clearing said write is finished holding wire and write until next time and finish after the scheduled time.
11. the device of elimination multipath echo as claimed in claim 10, it is characterized in that, when described transmission storage control detected said write and finishes holding wire and be set, the data result in the described transmission memory of described transmission memory controller controls transferred to described up-converting filter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200752066U CN201087945Y (en) | 2007-09-29 | 2007-09-29 | Device for eliminating multipath echo |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200752066U CN201087945Y (en) | 2007-09-29 | 2007-09-29 | Device for eliminating multipath echo |
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| Publication Number | Publication Date |
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| CN201087945Y true CN201087945Y (en) | 2008-07-16 |
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| CNU2007200752066U Expired - Fee Related CN201087945Y (en) | 2007-09-29 | 2007-09-29 | Device for eliminating multipath echo |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359956B (en) * | 2008-09-12 | 2011-04-20 | 北京创毅视讯科技有限公司 | Repeater |
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2007
- 2007-09-29 CN CNU2007200752066U patent/CN201087945Y/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359956B (en) * | 2008-09-12 | 2011-04-20 | 北京创毅视讯科技有限公司 | Repeater |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Guanglian Electronic Co., Ltd., Shanghai Assignor: Central Academy Guangdian (Group) Co., Ltd., Shanghai Contract fulfillment period: 2007.7.1 to 2012.7.15 Contract record no.: 2008310000113 Denomination of utility model: Device for eliminating multipath echo Granted publication date: 20080716 License type: Exclusive license Record date: 20081006 |
|
| LIC | Patent licence contract for exploitation submitted for record |
Free format text: EXCLUSIVE LICENSE; TIME LIMIT OF IMPLEMENTING CONTACT: 2007.7.1 TO 2012.7.15; CHANGE OF CONTRACT Name of requester: SHANGHAI GUANGLIAN ELECTRONICS CO., LTD. Effective date: 20081006 |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080716 Termination date: 20120929 |