CN201057557Y - Multiple serial port communication set - Google Patents

Multiple serial port communication set Download PDF

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Publication number
CN201057557Y
CN201057557Y CNU2007201181353U CN200720118135U CN201057557Y CN 201057557 Y CN201057557 Y CN 201057557Y CN U2007201181353 U CNU2007201181353 U CN U2007201181353U CN 200720118135 U CN200720118135 U CN 200720118135U CN 201057557 Y CN201057557 Y CN 201057557Y
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CN
China
Prior art keywords
sheffer stroke
module
gate
stroke gate
links
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Expired - Fee Related
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CNU2007201181353U
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Chinese (zh)
Inventor
黄黎明
郭敏强
白骥
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Shenzhen Skyworth RGB Electronics Co Ltd
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Shenzhen Skyworth RGB Electronics Co Ltd
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Priority to CNU2007201181353U priority Critical patent/CN201057557Y/en
Application granted granted Critical
Publication of CN201057557Y publication Critical patent/CN201057557Y/en
Anticipated expiration legal-status Critical
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Abstract

The utility model provides a multi serial port communication device, applied to the communication field, which comprises two kinds of logic devices: a nand gate and a not gate. A plurality of these two kinds of logic devices are connected with a level switching circuit RS232 module, a processor part in a main system unit and a processor part in a subsidiary system unit to form a circuit. The communication between multiple serial ports is controlled through the circuit, which thereby effectively prevents the interference between serial ports; and the cost of the circuit is relatively low.

Description

A kind of multi-serial communication device
Technical field
The utility model belongs to the communications field, relates in particular to a kind of multi-serial communication device.
Background technology
Easy to use, advantages such as transmission is reliable, number of signals is few, technology maturation that the serial communication mode has, thereby widely apply in various electronic products.At present in the consumption electronic product, there are a lot of needs to use the place of serial communication and AccessPort, sometimes or even multi-serial communication.But serial data may cause makeing mistakes of information owing to disturb in transmission course.Like this, use the convenience that just needs to guarantee the exploitation debugging behind the multi-serial communication, the communication of product internal-external accurately, the product convenience of upgrading after sale and safeguarding.Overlap simply with broadcast mode communication and can cause logical miss, can't exactly information be passed to the modular unit of appointment, and increased the difficulty of debugging and the probability of makeing mistakes, product is upgraded after sale to keep in repair and also cannot be obtained reliable guarantee.Though adopt the special-purpose serial ports controller module of industry can solve more above-mentioned problems, can make like this and realize complexity that cost is higher.
The utility model content
The purpose of this utility model is to provide a kind of multi-serial communication device, is intended to solve the problem of the interference between the multi-serial communication.
The utility model is achieved in that a kind of multi-serial communication device, and described multi-serial communication device comprises:
First Sheffer stroke gate (11), one of its input port terminates to the data sending terminal of level shifting circuit RS232 module, and the other end of input port is received the control input/output port CE1 of the processor part in the main system unit;
The 3rd Sheffer stroke gate (13), an end of its input port links to each other with the output terminal of first Sheffer stroke gate (11), and its output terminal links to each other with processor partial data receiving end in the main system unit;
The control input/output port CE1 of the processor part in first not gate (21), its input end and main system unit links to each other;
Second Sheffer stroke gate (12), one end of its input port links to each other with the output terminal of first not gate (21), the other end of its input port links to each other with processor partial data transmitting terminal in the subsystem unit, and its output terminal links to each other with the other end of the input port of the 3rd Sheffer stroke gate (13);
The 4th Sheffer stroke gate (14), an end of its input port links to each other with processor partial data transmitting terminal in the main system unit, and the control input/output port CE2 of the processor part in the other end of its input port and the main system unit links to each other; And
Second not gate (22), its input end links to each other with the output terminal of the 4th Sheffer stroke gate (14), and its output terminal links to each other with processor partial data receiving end in the subsystem unit.
The utility model is controlled communication between many serial ports by adopting these two kinds of logical devices of Sheffer stroke gate and not gate to form a circuit, thereby has prevented the interference between the serial ports effectively, and circuit cost is comparatively cheap.
Description of drawings
Fig. 1 is the circuit structure diagram of the multi-serial communication device that provides of the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Fig. 1 shows the circuit structure of the multi-serial communication device that the utility model provides, and details are as follows:
The circuit of this communicator has used two kinds of logical devices, a kind of right and wrong door, and another kind is a not gate, has adopted 4 Sheffer stroke gates and 2 not gates respectively.What link to each other with these logical devices has RS232, IC (integratedcircuit, integrated circuit) 1, an IC2.The RS232 module is a level shifting circuit.The IC1 module is the processor part in the main system unit.The IC2 module is the processor part in the subsystem unit.
And PC (Personal Computer, PC) (Component ObjectModel, COM) mouth also is connected to the RS232 module to Duan The Component Object Model.The data that one end of first Sheffer stroke gate, 11 input ports (1 pin of first Sheffer stroke gate 11) is received the RS232 module send (TXD) end, control input and output (IO) mouthful sheet that the other end (2 pin of first Sheffer stroke gate 11) is received the IC1 module simultaneously selects the input end (1 pin of first not gate 21) of 1 (CE1) and first not gate 21, the output terminal of first not gate 21 (2 pin of first not gate 21) is connected to the input end (5 pin of second Sheffer stroke gate 12) of second Sheffer stroke gate 12, the data that second Sheffer stroke gate, the 12 input end other ends (4 pin of second Sheffer stroke gate 12) are connected to the IC2 module send (TXD) end, the output terminal of first Sheffer stroke gate 11 and second Sheffer stroke gate 12 (6 pin of 3 pin of first Sheffer stroke gate 11 and second Sheffer stroke gate 12) is connected respectively to two input end (9 of the 3rd Sheffer stroke gates 13 of the 3rd Sheffer stroke gate 13,10 pin), the output terminal of the 3rd Sheffer stroke gate 13 (8 pin of the 3rd Sheffer stroke gate 13) is connected to Data Receiving (RXD) end of IC1 module.Input one end of the 4th Sheffer stroke gate 14 (12 pin of the 4th Sheffer stroke gate 14) sends (TXD) end with the data of IC1 module and links to each other, and the other end (13 pin of the 4th Sheffer stroke gate 14) selects 2 (CE2) to link to each other with the control IO mouth sheet of IC1 module.The output terminal of the 4th Sheffer stroke gate 14 (11 pin of the 4th Sheffer stroke gate 14) links to each other with the input end (3 pin of second not gate 22) of second not gate 22, and second not gate, 22 output terminals (4 pin of second not gate 22) link to each other with Data Receiving (RXD) end of IC2 module.The RXD end of RS232 module links to each other with the TXD end of IC1.
By this circuit, to realize 3 kinds of basic functions between RS232, IC1 and the IC2: debugging/monitoring, internal system communication and PC serial monitoring.
Debugging/monitoring: debugging mainly is that the PC end is downloaded, debugged and monitor at the program of IC1 module.When needing the program of down loading updating main system end, the CE1 that the main system end is put the IO mouth of IC1 module is that high level, CE2 are low level.The input end of first Sheffer stroke gate 11 (2 pin) is a high level, and this moment, first Sheffer stroke gate 11 was lifted a blockade.First not gate, 21 input ends (1 pin) are high level, first not gate, 21 output terminals (2 pin) output low level, promptly enter with the second Sheffer stroke gate input end (5 pin) be low level, then second Sheffer stroke gate, 12 output terminals (6 pin) output high level enters the input end (10 pin) of the 3rd Sheffer stroke gate 13, and this moment, the 3rd Sheffer stroke gate 13 was lifted a blockade.At this moment, the TXD of RS232 module end can be connected to the RXD end of IC1 module.And the TXD of IC1 module end has been connected to the RXD end of RS232 module.Like this, the PC end just can link to each other with IC1 by the RS23 module, and the PC end just can carry out code from the IC1 module to be downloaded and debug function, and the PC end can be monitored IC1.
Because CE1 is a high level, deliver to second Sheffer stroke gate 12 through becoming low level behind first not gate 21, second Sheffer stroke gate 12 is blocked, thereby cut off the path of IC1 module RXD end between holding with IC2 module TXD, so the information of sending of IC2 module can't interfere with communicating by letter between RS232 and the IC1 module.Because CE2 is a low level, the 4th Sheffer stroke gate 14 is blocked, thereby has cut off IC1 module TXD end and communicating by letter that IC2 module RXD holds.Therefore IC2 can not receive unnecessary information.
Internal system communication: mainly be meant communicating by letter between IC1 module and the IC2 module.When communicating between needs IC1 module and the IC2 module, it is low level that the main system end is put IO mouth CE1 earlier, first Sheffer stroke gate 11 is blocked, thereby the TXD that has cut off the RS232 module holds the passage of IC1 module RXD end, and the input end (9 pin) of first Sheffer stroke gate, 11 output high level to the, three Sheffer stroke gates 13.And the low level of CE1 end output becomes high level through first not gate 21 and enters second Sheffer stroke gate 12, second Sheffer stroke gate 12 is lifted a blockade, this moment, IC2 module TXD output terminal can arrive the input end (10 pin) of the 3rd Sheffer stroke gate 13 through second Sheffer stroke gate 12, and import this moment the 3rd Sheffer stroke gate 13 another input end (9 pin) for high level, the 3rd Sheffer stroke gate 13 is lifted a blockade.At this moment, IC2 module TXD output terminal is exactly unobstructed to the passage of IC1 module RXD receiving end.The TXD output terminal of IC2 module sends that information can arrive the IC1 module and the information of the TXD end of RS232 module can't send to the IC1 module.Cause error code with regard to avoiding to communicating by letter between IC1 module and the IC2 module like this.
It is high level that while main system end is put IO mouth CE2 again, high level enters the input end (13 pin) of the 4th Sheffer stroke gate 14, the 4th Sheffer stroke gate 14 is lifted a blockade, IC1 module TXD holds the passage of IC2 module RXD end even connected, and also connects simultaneously to have gone up the passage that IC1 module TXD holds the RXD of RS232 module to hold.So just realized the two-way communication between IC1 module and the IC2 module, the PC end also can receive the information that the IC1 module is sent by the RS232 module simultaneously.
The PC serial monitoring: the RXD end of RS232 module is connected with the TXD end of IC1 module always, can monitor the information that IC1 module TXD end sends at any time, realizes the real-time monitoring of PC end to main system.The IC1 module can be thereby that low level is blocked the path that the 4th Sheffer stroke gate 14 cut-out IC1 module TXD hold IC2 module RXD end by putting IO mouth CE2, some information of specializing in monitoring do not send to the IC2 module when make realizing the PC serial monitoring, thereby avoid the IC2 module because of receiving the garbage consumes resources.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection domain of the present utility model.

Claims (1)

1. a multi-serial communication device is characterized in that, described multi-serial communication device comprises:
First Sheffer stroke gate (11), one of its input port terminates to the data sending terminal of level shifting circuit RS232 module, and the other end of input port is received the control input/output port CE1 of the processor part in the main system unit;
The 3rd Sheffer stroke gate (13), an end of its input port links to each other with the output terminal of first Sheffer stroke gate (11), and its output terminal links to each other with processor partial data receiving end in the main system unit;
The control input/output port CE1 of the processor part in first not gate (21), its input end and main system unit links to each other;
Second Sheffer stroke gate (12), one end of its input port links to each other with the output terminal of first not gate (21), the other end of its input port links to each other with processor partial data transmitting terminal in the subsystem unit, and its output terminal links to each other with the other end of the input port of the 3rd Sheffer stroke gate (13);
The 4th Sheffer stroke gate (14), an end of its input port links to each other with processor partial data transmitting terminal in the main system unit, and the control input/output port CE2 of the processor part in the other end of its input port and the main system unit links to each other; And
Second not gate (22), its input end links to each other with the output terminal of the 4th Sheffer stroke gate (14), and its output terminal links to each other with processor partial data receiving end in the subsystem unit.
CNU2007201181353U 2007-01-19 2007-01-19 Multiple serial port communication set Expired - Fee Related CN201057557Y (en)

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Application Number Priority Date Filing Date Title
CNU2007201181353U CN201057557Y (en) 2007-01-19 2007-01-19 Multiple serial port communication set

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105608041A (en) * 2015-12-30 2016-05-25 南京奥拓电子科技有限公司 Class bus design method based on serial port communication

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105608041A (en) * 2015-12-30 2016-05-25 南京奥拓电子科技有限公司 Class bus design method based on serial port communication

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080507

Termination date: 20150119

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