CN200983085Y - Automatic calibration clock utilizing broadcast time reporting information for precise synchronization - Google Patents
Automatic calibration clock utilizing broadcast time reporting information for precise synchronization Download PDFInfo
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- CN200983085Y CN200983085Y CN 200620009370 CN200620009370U CN200983085Y CN 200983085 Y CN200983085 Y CN 200983085Y CN 200620009370 CN200620009370 CN 200620009370 CN 200620009370 U CN200620009370 U CN 200620009370U CN 200983085 Y CN200983085 Y CN 200983085Y
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Abstract
An auto proofreading time clock that using the broadcasting time-reporting information to realize precise synchronism belonging to the receiving and decoding technology of the time clock and the broadcast, which comprises a receiving circuit a single chip machine that is connected to the circuit and conducts digital to analog conversion and identification with the audio frequency signal and a synchronism time clock circuit that is connected with the receiving circuit and a time-display circuit and a output circuit that is connected with the synchronism time clock. The single chip machine is a high speed single chip machine that has an output terminal with an output time number. The precise synchronism time clock circuit further comprises a non-power off time clock circuit, a high stable crystal oscillator and a synchronism single chip machine. The output terminal of the synchronism is connected with the output terminal of the high speed single chip machine, which can precisely record the departure of the inner second time and the outer second time and output the successive time signal in little tingle. The utility model has stronger time code identification capability, stronger preciseness of time displacement revision, smaller circuit breaking recurrence inaccuracy, thereby can be widely used in the situations such as broadcast, actual time control and time-marking or the like.
Description
Technical field
The present invention relates to clock and broadcast reception decoding device, a kind of design that utilizes time signal in broadcasting information to realize accurate synchronous automatically correcting time clock of more clearly saying so.
Background technology
Traditional synchronous clock can receive radio broadcasting signal seldom.What have promptly allows to receive radio broadcasting signal, the distortion adaptive faculty that broadcast singal is caused through intermediate treatment also a little less than, cause synchronous difficulty.And after outage, even if be connected to the clock circuit that do not have a power failure, still about one second even bigger, the output time before and after being difficult to guarantee to have a power failure is accurately continuous, can not accurately revise the deviation of synchronizing signal for outage reproduction error.
In a word, existing synchronous clock can not be realized synchronously accurate, can not automatic correcting time.Above-mentioned defective causes result of use relatively poor, and then has influenced greatly and apply.
Summary of the invention
Purpose of the present invention is to overcome above-mentioned shortcoming and defect, provides a kind of time signal in broadcasting information of utilizing to realize accurate synchronous automatically correcting time clock.It can identify timing code from the broadcast singal that causes distortion through complicated link, export through the precise synchronization clock circuit again.Its outage reproduction error is better than 2/10000ths seconds, can accurately revise the deviation of synchronizing signal, and anti-distortion, anti-power down have advantage reliable and stable, that be easy to popularize.
In order to achieve the above object, the present invention includes radio broadcasting signal is carried out the receiving circuit of selecting tuning and demodulation, is connected the synchronous clock circuit and time display circuit that is connected with synchronous clock circuit and the output circuit that are connected with single-chip microcomputer to the single-chip microcomputer that carries out digital-to-analog conversion and discriminating from the sound signal of receiving circuit, with receiving circuit with receiving circuit.Single-chip microcomputer is the high-speed microprocessor with lead-out terminal of output time sign indicating number, and synchronous clock circuit is the precise synchronization clock circuit.The precise synchronization clock circuit comprises the clock circuit that do not have a power failure, highly stable crystal oscillator and synchronous single-chip microcomputer.Synchronously single-chip microcomputer be connected with the lead-out terminal of high-speed microprocessor can accurate record in it second constantly and outer second deviation and export continuous time signal constantly with little shake.
High-speed microprocessor and synchronous single-chip microcomputer constitute by the STC12 family chip.Single-chip microcomputer is connected with key circuit synchronously, and through RS485 interface output time signal.Receiving circuit is regulated amplification module through volume and is connected with accessory power outlet with loudspeaker.
Used receiving circuit, display circuit, the output circuit of the present invention is conventional products and is conventional usage, no longer describe in detail, high-speed microprocessor is undertaken the discriminating timing code, single-chip microcomputer in the precise synchronization clock circuit is undertaken by button and is adjusted receive frequency, adjustment time, adjusts time offset and test deviation, video data, timing code output constantly, and division is as follows.
Utilize time signal in broadcasting passing time information, have easy covering, the convenient advantage that receives, broadcast through the link complexity, easily the adverse effect of waveform distortion but also have.The present more use audio process in broadcasting station, very serious to the audio frequency deformation of wave that contains timing code, be difficult to be correctly decoded with the waveform pass zero point interval determining method that technology adopted in the past.The present invention has adopted high-performance, the low-power consumption high-speed microprocessor that contains high-speed A/D converter, earlier audio volume control is carried out the high-speed digital-analog conversion, data before and after analyzing relatively immediately, extract characteristic storage, then the characteristic storage data that contain timing code are further analyzed, parse the timing code that this time tone comprises, amplitude, deformation type to waveform have stronger adaptability, after treating that last sound time tone arrives, high-speed microprocessor is exported date and the hour data of broadcasting station in this hour broadcast immediately.
In order to re-power the continuous time of back reproduction in outage, general synchronous clock all is connected to the clock circuit that do not have a power failure, and makes it low-power consumption to move continuously.Because of its pulse per second (PPS) of the clock circuit that do not have a power failure (as DS1302) of routine in inside, only read-write second above representative meaning, and second starting point is not controlled in it, the one second wide uncertainty of having an appointment, and the output time before and after being difficult to of reading after restoring electricity guarantees to have a power failure is accurately continuous.The present invention by routine do not have a power failure clock circuit and accurate record in it second constantly and outer second deviation and form the precise synchronization clock circuit constantly with the single-chip microcomputer of little shake output continuous time signal.Before the outage, the continuous high-frequency of single-chip microcomputer reads data second of the clock circuit that do not have a power failure, capturing first is not about to this after the repeating data and is defined as second starting point and starts a single-chip microcomputer on-chip timer, the moment deviation of the synchronizing clock signals that test and outside are come, this deviation data is deposited in the flash memory of single-chip microcomputer or DS1302, the deviation data precision can be reduced to 10 microseconds; After the power interruption recovering power supply, the continuous high-frequency of single-chip microcomputer reads data second of the clock circuit that do not have a power failure, capture first and do not read deviation data in the flash memory after the repeating data immediately, after this deviation data do time-delay, clock signal, time continuity error before and after the outage can be reduced to 20 microseconds, promptly 2/100000ths seconds.When the synchronizing clock signals that does not have the outside, single-chip microcomputer is by on-chip timer or the operation of software clock, also realize the split-second precision continuity of outage front and back with method as above, when there is fixed error in known external timing signal, need be more in addition during offset correction to it, after this offset data can be done time-delay together by button input storage and aforesaid deviation data, clock signal.For further improving clock accuracy, the work clock of single-chip microcomputer can be used outside high stability crystal oscillator without the simple crystal oscillator of self instead.
Task of the present invention comes to this and finishes.
The invention provides a kind of time signal in broadcasting information of utilizing and realize accurate synchronous automatically correcting time clock.Its performance time signal in broadcasting covers easily, the convenient advantage that receives, and can identify timing code from the broadcast singal that causes distortion through complicated link, exports through the precise synchronization clock circuit again.Its outage reproduction error is better than 2/10000ths seconds, can accurately revise the deviation of synchronizing signal, and anti-distortion, anti-power down, precision height have advantage reliable and stable, that be easy to popularize.Can be widely used in occasions such as broadcast, real-time time control and time mark.
Description of drawings
Fig. 1 is a structural representation of the present utility model.
Fig. 2 is the utility model electrical schematic diagram.
Embodiment
It comprises carries out the receiving circuit 2 of selecting tuning and demodulation, is connected the synchronous clock circuit and time display circuit 9 that is connected with synchronous clock circuit and the output circuit 11 that are connected with single-chip microcomputer 1 to the single-chip microcomputer 1 that carries out digital-to-analog conversion and discriminating from the sound signal of receiving circuit, with receiving circuit 2 with receiving circuit 2 radio broadcasting signal.Single-chip microcomputer 1 is the high-speed microprocessor with lead-out terminal of output time sign indicating number.Synchronous clock circuit is the precise synchronization clock circuit, and the precise synchronization clock circuit comprises the clock circuit 8 that do not have a power failure, highly stable crystal oscillator 10 and synchronous single-chip microcomputer 7.Single-chip microcomputer 7 is connected with the lead-out terminal of high-speed microprocessor 1 synchronously, can accurately write down and export continuous time signal with outer second moment deviation and with little shake constantly in its interior second.
High-speed microprocessor 1 and synchronous single-chip microcomputer 7 constitute by the STC12 family chip.Single-chip microcomputer 7 is connected with key circuit 12 synchronously, and through RS485 interface 11 output time signals.Receiving circuit 2 is regulated amplification module 3 through volume and is connected with accessory power outlet 5 with loudspeaker 4.
Among Fig. 1 20 is the clock shell, and 21 is circuit board, and 9 is display, and 12 is button, the 22 volume adjusting turn-knobs for volume adjusting amplification module 3.
Fig. 2 is the electrical schematic diagram of circuit board 21 among Fig. 1.1 high-speed microprocessor that carries out digital-to-analog conversion and discriminating for received audio signal among Fig. 2, its sound signal be from receiving circuit 2, and regulate amplification module 3 through volume and deliver to loudspeaker 4 and accessory power outlet 5.Volume is regulated amplification module 3 and is connected to volume adjusting turn-knob 22, and receiving antenna 6 is input to receiving circuit 2.Single-chip microcomputer 7 is according to the frequency of the Data Control receiving circuit 2 of button 12 inputs.
Claims (4)
1, a kind of time signal in broadcasting information of utilizing realizes accurate synchronous automatically correcting time clock, comprise the receiving circuit that radio broadcasting signal is carried out selecting tuning and demodulation, be connected carry out the single-chip microcomputer of digital-to-analog conversion and discriminating from the sound signal of receiving circuit with receiving circuit, the synchronous clock circuit and time display circuit that is connected with synchronous clock circuit and the output circuit that are connected with single-chip microcomputer with receiving circuit, it is characterized in that said single-chip microcomputer is the high-speed microprocessor with lead-out terminal of output time sign indicating number, synchronous clock circuit is the precise synchronization clock circuit, the precise synchronization clock circuit comprises the clock circuit that do not have a power failure, highly stable crystal oscillator and synchronous single-chip microcomputer, synchronously single-chip microcomputer be connected with the lead-out terminal of high-speed microprocessor can accurate record in it second constantly and outer second deviation and export continuous time signal constantly with little shake.
2, realize accurate synchronous automatically correcting time clock according to the said time signal in broadcasting information of utilizing of claim 1, it is characterized in that said high-speed microprocessor contains high-speed A/D converter.
3, realize accurate synchronous automatically correcting time clock according to claim 1 or the 2 said time signal in broadcasting information of utilizing, it is characterized in that said synchronous single-chip microcomputer is connected with key circuit, and through RS485 interface output time signal.
4, realize accurate synchronous automatically correcting time clock according to the said time signal in broadcasting information of utilizing of claim 3, it is characterized in that said receiving circuit is connected with accessory power outlet with loudspeaker through volume adjusting amplification module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620009370 CN200983085Y (en) | 2006-11-09 | 2006-11-09 | Automatic calibration clock utilizing broadcast time reporting information for precise synchronization |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620009370 CN200983085Y (en) | 2006-11-09 | 2006-11-09 | Automatic calibration clock utilizing broadcast time reporting information for precise synchronization |
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| Publication Number | Publication Date |
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| CN200983085Y true CN200983085Y (en) | 2007-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200620009370 Expired - Fee Related CN200983085Y (en) | 2006-11-09 | 2006-11-09 | Automatic calibration clock utilizing broadcast time reporting information for precise synchronization |
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| CN (1) | CN200983085Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101995817A (en) * | 2010-11-19 | 2011-03-30 | 烟台持久钟表集团有限公司 | Marine secondary clock |
| CN101727065B (en) * | 2008-10-24 | 2011-08-10 | 郑州威科姆科技股份有限公司 | High-precision time service method of lock losing clock with two-way IRIG-B code |
| CN104656432A (en) * | 2014-03-06 | 2015-05-27 | 叶健利 | Time display device for broadcast data system |
| CN105022267A (en) * | 2015-07-23 | 2015-11-04 | 深圳思考软件有限公司 | Method and device synchronizing cell phone time to electric device having timing function |
-
2006
- 2006-11-09 CN CN 200620009370 patent/CN200983085Y/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727065B (en) * | 2008-10-24 | 2011-08-10 | 郑州威科姆科技股份有限公司 | High-precision time service method of lock losing clock with two-way IRIG-B code |
| CN101995817A (en) * | 2010-11-19 | 2011-03-30 | 烟台持久钟表集团有限公司 | Marine secondary clock |
| CN101995817B (en) * | 2010-11-19 | 2012-10-03 | 烟台持久钟表集团有限公司 | Marine secondary clock |
| CN104656432A (en) * | 2014-03-06 | 2015-05-27 | 叶健利 | Time display device for broadcast data system |
| CN104656432B (en) * | 2014-03-06 | 2017-06-16 | 叶健利 | Time display device for broadcast data system |
| CN105022267A (en) * | 2015-07-23 | 2015-11-04 | 深圳思考软件有限公司 | Method and device synchronizing cell phone time to electric device having timing function |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |