CN1992290A - Thin film transistor substrate and producing method thereof - Google Patents
Thin film transistor substrate and producing method thereof Download PDFInfo
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- CN1992290A CN1992290A CN 200510121225 CN200510121225A CN1992290A CN 1992290 A CN1992290 A CN 1992290A CN 200510121225 CN200510121225 CN 200510121225 CN 200510121225 A CN200510121225 A CN 200510121225A CN 1992290 A CN1992290 A CN 1992290A
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Abstract
This invention discloses a film transistor substrate manufacturing method, the steps including: provide an insulation substrate; on the insulation substrate, form the grid of the scheduled pattern; on the insulation substrate and the grid, in turn form a grid insulation layer, an amorphous pattern and a doped amorphous pattern; on the grid insulation layer and the doped amorphous pattern, in turn form a transparent conductive metal layer and a source/drain metal layer; in a mask-making process, the transparent conductive metal layer and the source/drain metal layer are exposed, developed and etched, to form source, drain and pixel electrodes. The manufacturing method of the invention can simplify the manufacturing process, and reduce costs. The invention also provides a film transistor substrate.
Description
[technical field]
The present invention relates to a kind of thin film transistor base plate manufacture method, also relate to a kind of thin film transistor base plate that adopts this method to make.
[background technology]
At present, LCD replaces conventional cathode ray tube (the Cathode Ray Tube that is used for calculator gradually, CRT) display, and, because characteristics such as the liquid crystal display utensil is light, thin, little, make its be fit to very much be applied to desktop PC, laptop computer, personal digital assistant (Personal Digital Assistant, PDA), in portable phone, TV and multiple office automation and the audio-visual equipment.Liquid crystal panel is its main element, its generally comprise a thin film transistor base plate, a colored filter substrate and be clipped in this thin film transistor base plate and this colored filter substrate between liquid crystal layer.
Seeing also Fig. 1, is the structural representation of the thin film transistor base plate 100 of a prior art.This thin film transistor base plate 100 comprises that a substrate 101, is positioned at grid 102, in the substrate 101 and is positioned at gate insulator 103, in this grid 102 and this substrate 101 and is positioned on this gate insulator 103 semiconductor layer 104, and is positioned at source electrode 105 and drain electrode 106, on this semiconductor layer 104 and this gate insulator 103 and is positioned at passivation layer 107 and in this gate insulator 103, this source electrode 105 and this drain electrode 106 and is positioned at pixel electrode 108 on this passivation layer 107.
Please refer to Fig. 2, is the prior art manufacture method flow chart of this thin film transistor base plate 100.This manufacture method adopts five road light shield manufacturing process, may further comprise the steps:
One, the first road light shield
(1) forms gate metal layer: a dielectric base is provided, on this dielectric base, forms a gate metal layer and one first photoresist layer in regular turn;
(2) form gate pattern: the pattern with the first road light shield carries out exposure imaging to this first photoresist layer, thereby forms a predetermined pattern; This gate metal layer is carried out etching, and then form the pattern of a grid 102, remove first photoresist layer;
Two, the second road light shield
(3) form gate insulator, amorphous silicon layer and doped amorphous silicon layer: have formation one gate insulator 103, an amorphous silicon layer, doped amorphous silicon layer and one second photoresist layer on the dielectric base of this grid;
(4) form semiconductor layer pattern: the pattern with the second road light shield carries out exposure imaging to this second photoresist layer, thereby forms a predetermined pattern; This doped amorphous silicon layer and this amorphous silicon layer are carried out etching, and then form semiconductor layer 104, remove second photoresist layer with a predetermined pattern;
Three, the 3rd road light shield
(5) formation source/drain metal layer: on this substrate and this semiconductor layer pattern, form one source/drain metal layer and one the 3rd photoresist layer;
(6) formation source/drain metal layer pattern: the pattern with the 3rd road light shield carries out exposure imaging to the 3rd photoresist layer, thereby forms a predetermined pattern; This source/drain metal layer is carried out etching, and then form an one source pole 105 and a drain electrode 106, remove the 3rd photoresist layer;
Four, the 4th road light shield
(7) form passivation layer: deposition one passivation layer and one the 4th photoresist layer in substrate with this grid, source electrode and drain electrode;
(8) form passivation layer pattern: the pattern with the 4th road light shield carries out exposure imaging to the 4th photoresist layer, thereby forms a predetermined pattern; This passivation layer is carried out etching, and then define the pattern of a passivation layer 107, remove the 4th photoresist layer;
Five, the 5th road light shield
(9) form a conductor layer: in substrate, form a conductor layer and one the 5th photoresist layer with this grid, source electrode, drain electrode and passivation layer pattern;
(10) form pixel electrode pattern: the pattern with the 5th road light shield carries out exposure imaging to the 5th photoresist layer, thereby forms a predetermined pattern; This conductor layer is carried out etching, and then define a conductor layer pattern, promptly pixel electrode pattern 108, remove the 5th photoresist layer.
But, this method needs more light shield manufacturing process, and the light shield manufacturing process comparatively complexity and cost are higher usually, thereby make manufacturing cost higher, in addition, in little shadow production process of light shield manufacturing process each time, the pollution of dust and the quality of exposure can directly influence the yield of entire product.
[summary of the invention]
For solving the complicated and cost problem of higher of above-mentioned thin film transistor base plate manufacturing process, be necessary to provide the thin film transistor base plate that a kind of manufacturing process is simple and cost is low.
A kind of above-mentioned manufacturing method of film transistor base plate also is provided.
A kind of thin film transistor base plate, it comprises that a dielectric base, is arranged on grid, on this dielectric base and is arranged on gate insulator, on this grid and is arranged on amorphous silicon pattern on this gate insulator and impurity-doped amorphous silicon pattern, and is arranged on pixel electrode on this impurity-doped amorphous silicon pattern and transparent conductive metal layer, and is arranged on drain electrode and on this pixel electrode and is arranged on source electrode on this transparent conductive metal layer.
A kind of thin film transistor base plate manufacture method, its step comprises: a dielectric base is provided; Deposition one gate metal layer on this dielectric base; In the first road light shield manufacturing process, exposure, development and etching form the grid of predetermined pattern; On this dielectric base and grid, form a gate insulator, an amorphous silicon layer and a doped amorphous silicon layer in regular turn; In the second road light shield manufacturing process, to doped amorphous silicon layer and amorphous silicon layer expose, development and etching, to form impurity-doped amorphous silicon pattern and amorphous silicon pattern; On this gate insulator and impurity-doped amorphous silicon pattern, form a transparent conductive metal layer and one source/drain metal layer in regular turn; In the 3rd road light shield manufacturing process, to transparent conductive metal layer and source/drain metal layer expose, development and etching, to form source electrode, drain electrode and pixel electrode.
Compared with prior art, above-mentioned thin film transistor base plate manufacture method will adopt one light shield manufacturing process to form pixel electrode and source electrode and drain pattern, thereby save the light shield manufacturing process one, and the light shield number of times reduces, simplified manufacturing process can effectively reduce cost.Above-mentioned thin film transistor base plate can adopt this method manufacturing, and manufacturing process is simple.
[description of drawings]
Fig. 1 is the thin film transistor base plate structural representation of prior art.
Fig. 2 is the flow chart of the thin film transistor base plate manufacture method of prior art.
Fig. 3 is a thin film transistor base plate structural representation of the present invention.
Fig. 4 is the flow chart of thin film transistor base plate manufacture method of the present invention.
Fig. 5 is the schematic diagram that forms gate metal layer and photoresist layer.
Fig. 6 is the schematic diagram that forms gate pattern.
Fig. 7 is the schematic diagram that forms gate insulator, amorphous silicon and doped amorphous silicon layer.
Fig. 8 is the schematic diagram that forms amorphous silicon, impurity-doped amorphous silicon pattern.
Fig. 9 is the schematic diagram that forms transparent conductive metal layer, source/drain metal layer and photoresist layer.
Figure 10 is the schematic diagram of thin film transistor base plate manufacture method one light shield manufacture method.
Figure 11 is the schematic diagram that forms the photoresistance pattern.
Figure 12 is the schematic diagram that forms transparent conductive metal layer, this source/drain metal layer pattern and groove.
Figure 13 is the schematic diagram that forms photoresistance, pixel electrode, source electrode and drain pattern.
Figure 14 is the schematic diagram that forms passivation layer.
[embodiment]
Seeing also Fig. 3, is the structural representation that thin film transistor base plate one better embodiment of the present invention is disclosed.This thin film transistor base plate 200 comprises a dielectric base 201, be arranged on a grid 212 and a public electrode 213 on this dielectric base 201, be arranged on the gate insulator 203 on this grid 212 and the public electrode 213, be arranged on an amorphous silicon layer pattern 214 and an impurity-doped amorphous silicon pattern 215 on this gate insulator 203 in regular turn, be arranged on a pixel electrode 216 and a transparent conductive metal layer 226 pattern on impurity-doped amorphous silicon pattern 215 and the gate insulator 203, be arranged on the one source pole 217 on transparent conductive metal layer 226 pattern, be arranged on the drain electrode of one on the pixel electrode 216 218 and and be arranged on this gate insulator 204, source electrode 217, drain electrode 218, passivation layer 209 on pixel electrode 216 and this impurity-doped amorphous silicon pattern 215.
Seeing also Fig. 4, is the flow chart of thin film transistor base plate manufacture method one better embodiment of the present invention.The manufacture method of this thin film transistor base plate 200 comprises three road light shield manufacturing process, and its concrete steps are as follows:
One, the first road light shield
(1) forms gate pattern;
See also Fig. 5, a dielectric base 201 is provided, this dielectric base 201 can be insulation materials such as glass, quartz or pottery; Deposition one gate metal layer 202 on this dielectric base 201, its material can be that aluminium (Al) is metal, molybdenum (Mo), chromium (Cr), tantalum (Ta) or copper (Cu); Deposition one first photoresist layer 231 on this gate metal layer 202.
See also Fig. 6, aim at this first photoresist layer, 231 tops with the pattern of the first road light shield manufacturing process, with this first photoresist layer 231 of ultraviolet light parallel radiation, again this first photoresist layer 231 is developed, thereby can on this first photoresist layer 231, form a predetermined pattern, this gate metal layer 202 is etched with form predetermined grid 212 patterns and public electrode 213 patterns.Remove remaining first photoresist layer 231.
Two, the second road light shield
(2) form gate insulator, amorphous silicon, doped amorphous silicon layer in regular turn;
See also Fig. 7, on this dielectric base 201, grid 212 and public electrode 213 patterns, form the gate insulator 203 that silicon nitride (SiNx) constitutes with chemical gaseous phase depositing process; Use again chemical vapour deposition (CVD) (Chemical Phase Deposition, CVD) method forms an amorphous silicon layer on this gate insulator 203; Carry out one doping process again, this amorphous silicon layer is mixed, form amorphous silicon layer 204 and doped amorphous silicon layer 205.
(3) form amorphous silicon and impurity-doped amorphous silicon pattern;
See also Fig. 8, deposition one second photoresist layer on this doped amorphous silicon layer 205, aim at this second photoresist layer with the pattern of the second road light shield manufacturing process, with this first photoresist layer of ultraviolet light parallel radiation, again this second photoresist layer is developed, this amorphous silicon layer 204 and doped amorphous silicon layer 205 are carried out etching, remove the part that amorphous silicon layer 204 and doped amorphous silicon layer 205 are not covered by the photoresist layer structure, form amorphous silicon pattern 214, impurity-doped amorphous silicon pattern 215.
Three, the 3rd road light shield
(4) form transparent conductive metal layer and source/drain metal layer;
See also Fig. 9, deposition one transparent conductive metal layer 206 on this gate insulator 203 and impurity-doped amorphous silicon pattern 215, this transparent conductive metal layer 206 can be indium tin oxide (Indium Tin Oxide, ITO) or indium-zinc oxide (Indium Zinc Oxide, IZO); Deposition one source/drain metal layer 207 on this transparent conductive metal layer 206, these source/drain metal layer 207 materials can be aluminium alloy, aluminium, molybdenum, tantalum or molybdenum and tungsten alloy; Deposition one the 3rd photoresist layer 241 on this source/drain metal layer 207.
(5) form pixel electrode, source electrode and drain pattern;
See also Figure 10, provide a light shield 250 to aim at the 3rd photoresist layer 241, shine the 3rd photoresist layer 241 with ultraviolet light.This light shield 250 is slit light shield (Slit Mask), and it comprises a slit area 252 and a shading region 251.The light ray energy that the light ray energy that sees through because of this shading region 251 sees through in this slit area 252 is few.Again this photoresist layer 241 is developed, thus formation predetermined pattern as shown in figure 11, and promptly the part corresponding to this slit area 252 remains photoresist layer 242 remains photoresist layer 243 corresponding to the part of this shading region 251 thin thickness.
See also Figure 12, this transparent conductive metal layer 206 and this source/drain metal layer 207 are carried out etching, remove this transparent conductive metal layer 206, this source/drain metal layer 207 and the impurity-doped amorphous silicon pattern 215 of residue photoresistance 242 and 243 unmasked portions, form this required transparent conductive metal layer 206 and the pattern and the groove 260 of this source/drain metal layer 207.As shown in figure 13, again this residue photoresist layer 242,243 is carried out etching, this the source/drain metal layer 207 that makes this residue photoresist layer 242 cover is etched, forms residue photoresistance pattern 265, source electrode 217, drain electrode 218, pixel electrode 216 and residue transparent conductive metal layer 226 pattern.
(6) form passivation layer;
See also Figure 14, remove residue light picture group case 265, deposition one deck passivation layer 209 on this gate insulator 203, source electrode 217, drain electrode 218, pixel electrode 216 and this amorphous silicon pattern 214.
Wherein, by one light shield manufacturing process, can be with these passivation layer 209 patterned process.
Compared with prior art, this manufacture method forms pixel electrode 216 and source electrode 217 and drain electrode 218 by one light shield manufacturing process, thereby saves the light shield manufacturing process one, and the light shield number of times reduces, and simplified manufacturing process can effectively reduce cost.
Claims (10)
1. thin film transistor base plate, it comprises that a dielectric base, is arranged on grid, on this dielectric base and is arranged on gate insulator, on this grid and is arranged on amorphous silicon pattern and impurity-doped amorphous silicon pattern on this gate insulator, it is characterized in that: comprise that also one is arranged on pixel electrode on this impurity-doped amorphous silicon pattern and transparent conductive metal layer, and is arranged on drain electrode and on this pixel electrode and is arranged on source electrode on this transparent conductive metal layer.
2. thin film transistor base plate as claimed in claim 1 is characterized in that: comprise that further one is positioned at the passivation layer on this source electrode, drain electrode, pixel electrode and the impurity-doped amorphous silicon pattern.
3. thin film transistor base plate as claimed in claim 1 is characterized in that: further comprise with this grid being positioned at a public electrode with one deck.
4. thin film transistor base plate as claimed in claim 1 is characterized in that: this source electrode and drain electrode are adopt following material a kind of: tantalum, aluminium alloy, aluminium, molybdenum and molybdenum and tungsten alloy.
5. thin film transistor base plate manufacture method, its step comprises: a dielectric base is provided; Deposition one gate metal layer on this dielectric base; In the first road light shield manufacturing process, exposure, development and etching form the grid of predetermined pattern; On this dielectric base and grid, form a gate insulator, an amorphous silicon layer and a doped amorphous silicon layer in regular turn; In the second road light shield manufacturing process, to doped amorphous silicon layer and amorphous silicon layer expose, development and etching, to form impurity-doped amorphous silicon pattern and amorphous silicon pattern; On this gate insulator and impurity-doped amorphous silicon pattern, form a transparent conductive metal layer and one source/drain metal layer in regular turn; In the 3rd road light shield manufacturing process, to transparent conductive metal layer and source/drain metal layer expose, development and etching, to form source electrode, drain electrode and pixel electrode.
6. thin film transistor base plate manufacture method as claimed in claim 5 is characterized in that: the step that further is included in deposition one passivation layer on this source electrode, drain electrode, impurity-doped amorphous silicon pattern and this pixel electrode.
7. thin film transistor base plate manufacture method as claimed in claim 5, it is characterized in that: the 3rd road light shield processing procedure is included on this source/drain metal layer deposition one photoresist layer, and provides the slit light shield to this photoresist layer exposure with develop to form the step of a photoresist layer pattern.
8. thin film transistor base plate manufacture method as claimed in claim 7 is characterized in that: this photoresist layer pattern comprises the zone that a thickness is thicker and the zone of a thinner thickness.
9. thin film transistor base plate manufacture method as claimed in claim 8, it is characterized in that: the 3rd road light shield processing procedure further comprise with this source/drain metal layer and this photoresist layer pattern thickness the part of thin region overlapping etch away, to form the step of source electrode and drain pattern.
10. thin film transistor base plate manufacture method as claimed in claim 5 is characterized in that: form in the step of grid, when forming the grid of predetermined pattern at the public electrode that forms a predetermined pattern with one deck in the lump.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101212253A CN100454555C (en) | 2005-12-26 | 2005-12-26 | Thin film transistor substrate and producing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101212253A CN100454555C (en) | 2005-12-26 | 2005-12-26 | Thin film transistor substrate and producing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN1992290A true CN1992290A (en) | 2007-07-04 |
| CN100454555C CN100454555C (en) | 2009-01-21 |
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| CNB2005101212253A Expired - Fee Related CN100454555C (en) | 2005-12-26 | 2005-12-26 | Thin film transistor substrate and producing method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102683277A (en) * | 2012-05-08 | 2012-09-19 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and making method thereof |
| WO2013116994A1 (en) * | 2012-02-07 | 2013-08-15 | 深圳市华星光电技术有限公司 | Thin-film transistor array substrate and manufacturing method therefor |
| CN106601669A (en) * | 2016-12-20 | 2017-04-26 | 深圳市华星光电技术有限公司 | Manufacturing method of thin-film transistor array substrate |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100333983B1 (en) * | 1999-05-13 | 2002-04-26 | 윤종용 | thin film transistor array panel for liquid crystal display having wide viewing angle and manufacturing method thereof |
| KR100309209B1 (en) * | 1999-07-31 | 2001-09-29 | 구본준, 론 위라하디락사 | Liquid crystal display and method for fabricating the same |
| JP5408829B2 (en) * | 1999-12-28 | 2014-02-05 | ゲットナー・ファンデーション・エルエルシー | Method for manufacturing active matrix substrate |
| KR101027943B1 (en) * | 2004-05-18 | 2011-04-12 | 엘지디스플레이 주식회사 | An array substrate for a liquid crystal display device and method for fabricating of the same |
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2005
- 2005-12-26 CN CNB2005101212253A patent/CN100454555C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013116994A1 (en) * | 2012-02-07 | 2013-08-15 | 深圳市华星光电技术有限公司 | Thin-film transistor array substrate and manufacturing method therefor |
| CN102683277A (en) * | 2012-05-08 | 2012-09-19 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and making method thereof |
| WO2013166668A1 (en) * | 2012-05-08 | 2013-11-14 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and manufacturing method thereof |
| CN106601669A (en) * | 2016-12-20 | 2017-04-26 | 深圳市华星光电技术有限公司 | Manufacturing method of thin-film transistor array substrate |
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| CN100454555C (en) | 2009-01-21 |
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Granted publication date: 20090121 Termination date: 20201226 |